Search

Satellite imagery and data collection have many advantages over other sources of soil observations. The developments in this field lead to the need of reducing cost with improving image construction methods. The concept of so-called satellite constellation accompanied by 3D vision technique may improve the coverage of a specific area. Here presented a satellite constellation conception is for a 3D reconstruction of urban areas, filling the gap of the required temporal resolution to properly monitor this contribution. Thus, a miniaturization method of space vehicles was proposed using CubeSat constellation resides at an altitude of 500 km. The number of satellites required to meet the challenges of earth observation is nine satellites. To accomplish the main goal, meeting the adequate resolution, a development study around a deployable optic camera is presented for a 3D reconstruction. [ABSTRACT FROM AUTHOR]

Copyright of Informacije MIDEM: Journal of Microelectronics, Electronic Components & Materials is the property of MIDEM Society and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

The paper addresses a simple and fast new approach to implement Artificial Neural Networks (ANN) models for the MOS transistor into SPICE. The proposed approach involves two steps, the modeling phase of the device by NN providing its input/output patterns, and the SPICE implementation process of the resulting model. Using the Taylor series expansion, a neural based small-signal model is derived. The reliability of our approach is validated through simulations of some circuits in DC and small-signal analyses. Artificial Neural Networks, new semiconductor devices, SPICE, Modeling, Taylor series expansion., INTRODUCTION Although the MOS (Metal Oxide Semi-conductor) transistor (1-2) is not a recent semi-conductor device, it remains of a potential interest for large-scale Integrated Circuits (IC) due to its electrical [...]

This paper focuses on the role of the N-[N.sup.+] junction doping profile model of a PiN diode on its turn-off transient and, particularly, the influence of multiple epitaxies in the N-[N.sup.+] profile. A conventional doping profile model has been used in a previous work and an identification procedure for the main design parameters has been demonstrated. However the validity range of identified PiN-diode models appeared quite limited for hard current and voltage conditions. Readers have asked for the effect of a more advanced doping profile. The turn-off transient of an STTB506D device is considered from experimental and simulation point-of-view inside a fully characterized switching cell. A limitation of the conventional doping profile model is demonstrated and explained physically in order to introduce the necessity of a more complex doping profile. An advanced doping profile is then considered and a comparative study between experimental and simulated turn-off transient behavior of the device is established. Index Terms--PiN diode.

Using the binary representation [[SIGMA].sub.i][D.sub.i][2.sup.i] in the Multiplier digital to analog converter (MDAC) synapse designs have crucial drawbacks. Silicon area of transistors, constituting the MDAC circuit, increases exponentially according to the number of bits. This latter is generated by geometric progression of common ratio equal to 2. To reduce this exponential increase to a linear growth, a new synapse named Arithmetic MDAC (AMDAC) is designed. It functions with a new representation based on arithmetic progressions. Using the AMS CMOS 0.35[micro]m technology the silicon area is reduced by a factor of 40%. Key words: MDAC, binary representation, efficient silicon area, INTRODUCTION Neural network are very suitable to resolve problems where conventional resolution methods fall (13). Synapses are the common bloc in neural network. It functions as multipliers. Their roles are [...]

Commercial power diodes are optimized to feature punch-through behavior. However, a tradeoff between the width and the doping level of the diode epitaxial layer leads to various levels of optimization. For a given breakdown voltage, a shorter epitaxial layer width leads to better transient performances. Device datasheets do not cover this issue and a simple experimental setup is presented to assess the optimization conditions inside the diode epitaxial layer. Three commercial devices are tested and experimental results are confronted to device simulations. A good agreement is found. Index Terms--Avalanche, p-type, intrinsic, n-type (P-I-N) diode, punch-through (PT), reverse-recovery.

Abstract: To design a hardware system we may use generated Intellectual Property (IP) cores from a library with optimized parameters. The IP parameters are area minimization, memory use optimization and [...]

Design of integrated power systems requires prototype-less approaches. Accurate simulations are necessary for analysis and verification purposes. Simulation relies on component models and associated parameters. The paper focuses on a step-by-step extraction procedure for the design parameters of a one-dimensional finite-element-method (FEM) model of the PiN diode. The design parameters are also available for diverse physics-based analytical models. The PiN diode remains a complex device to model particularly during switching transients. The paper demonstrates that a simple FEM model may be considered unknowingly of the device exact technology. Heterogeneous simulation is illustrated. The state-of-art of parameter extraction methods is briefly recalled. The proposed procedure is detailed. The diode model and extracted parameters are systematically validated from electro-thermal point-of-view. Validity domains are discussed. Index Terms--Finite-element-method (FEM), PiN diode.