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Impurity-based p-type doping in wide--band-gap semiconductors is inefficient at room temperature for applications such as lasers because the positive-charge carriers (holes) have a large thermal activation energy. We demonstrate high-efficiency p-type doping by ionizing acceptor dopants using the built-in electronic polarization in bulk uniaxial semiconductor crystals. Because the mobile hole gases are field-ionized, they are robust to thermal freezeout effects and lead to major improvements in p-type electrical conductivity. The new doping technique results in improved optical emission efficiency in prototype ultraviolet light-emitting--diode structures. Polarization-induced doping provides an attractive solution to both p- and n-type doping problems in wide--band-gap semiconductors and offers an unconventional path for the development of solid-state deep-ultraviolet optoelectronic devices and wide--band-gap bipolar electronic devices of the future. 10.1126/science.1183226

A study was conducted to develop a transferred-substrate (TS) technology to optimize high-frequency performance by double heterojunction bipolar transistor (DHBT) process. Findings reveal high yield of the TS DHBTs, consistent large-signal modeling, and accurate simulation of complex passive elements.

This paper discusses the impact of transistor performance and operating frequency on the design of monolithic highly efficient RF SiGe power amplifiers (PAs) using on-chip lump-element passives and/or bondwires to approximate the class E switching conditions. Single-stage SiGe PAs were designed and fabricated using both high-breakdown and high-[f.sub.T] devices targeting for the highest power-added-efficiency (PAE). The PAs designed using high-breakdown devices with on-chip tank inductors exhibit similar gain and PAE as those of high-[f.sub.T] devices, but capable of withstanding significantly higher supply voltages and deliver larger output power (> 23 dBm) more reliably. PAE of 68% (900 MHz) and 40% (2.4 GHz) was achieved from these highly integrated suboptimal PAs without using any off-chip matching. The degraded PAE at 2.4 GHz versus 900 MHz is shown to be caused by increased effective ground inductance parasitics, higher loss from both low-Q on-chip tank inductor and increased SiGe device switching loss with reduced power gain. Design insights on how to improve PAE of SiGe PAs at higher RF frequencies are discussed, as we increased the measured PAE of the class E PAs to an impressive 62-65% range at 2.3-2.4 GHz, which is among the best reported in the literature for Si-based monolithic PAs. Index Terms--Breakdown voltage, class E, high efficiency, power amplifier (PA), SiGe heterojunction bipolar transistor (HBT), switch-mode PA, system-on-a-ship (SOC), wideband, wireless sensor.

Current methods of teaching basic amplifier design at the undergraduate level need further development to match today's technological advances. The general class approach to amplifier design is analytical and heavily based on mathematical manipulations. However, the students' mathematical abilities are generally modest, creating a void in which basic design issues are lost. As a result, students are often puzzled when faced with advanced circuit design classes or design challenges presented by the industry. This paper recognizes the existence of such a void in the teaching of amplifier design at the undergraduate level, and proposes a novel graphical approach which presents the complete amplifier design in a visual form that is easy for the students to understand. Moreover, with the aid of computer-aided design (CAD) tools such as PSpice, this graphical approach promotes the students' mastery of the subject. The design of a bipolar junction transistor common-emitter (BJT-CE) amplifier is used here as an illustration of this approach. Index Terms--Amplifiers, bipolar transistor amplifiers, bipolar transistor circuits, circuit analysis, circuit simulation, design methodology, PSpice.

This paper describes a gate control method where an IGBT is controlled in its linear region by means of closed loop control in order to regulate the voltage slope during turn-on and to clamp the voltage of an anti-parallel diode in a source commutated converter. Controlling the voltage slope may be necessary in a high voltage converter to avoid emission of EMI or to avoid triggering oscillations which may cause insulation failure. Controlling the switching trajectory without influence from the device characteristics is important where series-connection is necessary to increase the overall blocking voltage. The control method has been verified by means of a prototype. Index Terms--AC-AC power conversion, electromagnetic interference, insulated gate bipolar transistors, snubbers.

The conventional and widespread modeling of interelectrode capacitances of power MOSFET and insulated gate bipolar transistor is based on a single dipolar representation of the electric charge induced in the intercellular drain region. In this paper, it is proved by some experimental tests that this representation, symbolized by the gate transfer capacitance [C.sub.GD], may not be physics-based, especially under negative gate polarization. Then, it is demonstrated that interelectrode MOS capacitances are fundamentally of three-port coupling origin. A physical capacitive model, available for both gate capacitance and gate transfer capacitance, is detailed, implemented in a simulation software, and compared with experiment. Index Terms--Insulated gate bipolar transistor (IGBT), MOS capacitance, MOSFET, physical modeling, power electronics, semiconductor devices.

In this paper, a novel distributed small-signal heterojunction bipolar transistor (HBT) model at millimeter-wave frequencies is proposed. This new approach integrates the electromagnetic (EM) simulation of the outer extrinsic passive part of an HBT, the coupled transmission lines for the fingers, and the Gupta multiport connection into an efficient global distributed modeling approach. For the first time, the values of the entire HBT intrinsic model elements used in the active elementary cells (AECs) can subsequently be extracted through the explicit analytical expressions derived through the multiport connection method. Good agreement between the measured and the simulated results has been demonstrated. This model has several unique advantages for microwave transistor optimization and synthesis in that the derived explicit analytical expressions are in terms of the effect of the extrinsic parts, allowing the designer to have better control over the whole transistor design. Furthermore, it serves as one of the valuable steps toward global modeling of millimeter-wave devices and circuits. Index Terms--Distributed model, electromagnetic (EM) simulation, global modeling, heterojunction bipolar transistor (HBT), small-signal model.

An original empirical approach to deal with nonlinear dynamic thermal effects in electron devices is proposed. The new technology-independent approach is very compact and easy to implement in computer-aided design tools. Therefore, it can be easily coupled with electrical device models in order to obtain accurate electrothermal models that are suitable for nonconstant-envelope RF applications (e.g., pulsed radar). Model equations and identification procedures are derived in this paper. Validation results and comparison with simplified models are also presented both for a simulated field-effect transistor device, as well as for a real heterojunction bipolar transistor device. Index Terms--Behavioral modeling, electrothermal, electrothermal effects, heterojunction bipolar transistors (HBTs), intermodulation distortion, microwave field-effect transistors (FETs), modeling, nonlinear, self-heating, semiconductor device thermal factors, thermal, thermal impedance, Volterra series.

The application of a particular medium-voltage converter in a certain application depends on numerous criteria. However, in completely new installations, the choice of the system voltage is very often uninhibited of external constraints. Then, the voltage level shall be selected to enable the most efficient power conversion at the lowest cost. This paper is dedicated to help in finding the best voltage level for three-level neutral-point-clamped voltage source converters (3L-NPC VSCs) with respect to the power semiconductor devices. Three insulated-gate-bipolar-transistor-based 3L-NPC VSCs of different voltage levels (2.3, 3.3, and 4.16 kV) are investigated and compared regarding their maximum output power, semiconductor efficiency, and semiconductor cost per MVA output power. The effects of thermal cycling, the loss distribution within the converter, and switching frequencies from 300 to 1050 Hz are considered in the evaluation. Index Terms--Insulated gate bipolar transistor (IGBT) converters, medium-voltage (MV) converters, three-level converters.

In this paper, a case study application of a new device, which is based on a bipolar-MOSFET cascode connection, is presented. The monolithic device can be designed for high-voltage applications up to 1.7-2.2 kV. The basic features of this power device are described in terms of the physical structure and the electrical performance. An application in the field of dc-dc converters is presented, and the drive unit requirements are investigated and discussed through several circuit topologies that are devoted to energizing the four-terminal device. The advantages and the drawbacks of the device are compared with those of a MOSFET in terms of the switching losses and the command circuitry. The correlation between the physical structure of the cascode and its electrical characteristics is explained to better understand some interesting features of the device. Last, the new device is tested by using a forward converter as a workbench to provide converter designers with useful guidelines concerning the switching behavior and the power losses. Index Terms--Bipolar junction transistor (BJT), cascode, forward converter, metal-oxide-semiconductor field-effect transistor (MOSFET).

Several experimental and analytical studies are conducted to examine the transient and operation of a silicon avalanche transistor in the high-current short-pulsing mode. The operation is shown to be highly dependent on the lateral current confinement taking place in the lateral direction.

This paper presents a detailed investigation of the dual base method for intrinsic and extrinsic HBT's base resistance extraction that is of utmost importance for process monitoring and device modeling purpose. Ring emitter test structures layout, dc measurement conditions, and extraction methodology have been improved to get reliable results. A particular attention has been drawn to the external base resistance extraction and the effect of parasitic resistances is highlighted. The method has been generalized for an extraction of the base resistance specific parameters using any number of geometries (widths and lengths) and therefore demonstrates the base resistance scalability. This method is applied to a ST state-of-art fully self aligned double poly BiCMOS SiGeC technology, and results are discussed. Index Terms--Base resistance, bipolar modeling, dual base test structure, sheet resistance.

Both reduction in device sizes and enhanced increase in current densities lead to concern about the impact of the self-heating effect on device electrical characteristics. Moreover, in power transistors applications, devices are connected in parallel, so thermal interaction between devices also has to be considered. E In this paper, a nodal model is proposed in order to take into account temperature variation due to self-heating and thermal coupling. This model associated with the HICUM Level 2 version 2.21 compact model is validated thanks to measurements made on specific test structures. Index Terms--Heterojunction bipolar transistors (HBTs), nodal F model, power bipolar transistors, self-heating, thermal coupling.

This paper presents a direct-analysis technique for transistors with a long-finger structure. The analysis technique is an incorporated simulation between the finite-difference time-domain electromagnetic (EM) and semiconductor device simulations. The co-simulation method can consider various EM couplings and phase shifts on finger electrodes of transistors. The method was applied for InGaP/GaAs HBTs with various finger lengths to investigate gain degradation characteristics as a function of the finger length. As the first step, circuit simulations were done instead of a semiconductor device simulation using SPICE models of the HBT. Both large- and small-signal equivalent-circuit parameters were extracted by measurements to estimate nonlinear and linear characteristics, respectively. Using the extracted small-signal parameters, the gain degradation was estimated. The co-simulation results showed the same tendency as measurement results. Additionally, it was numerically shown that a resistive loss was mainly affected for the gain degradation from a comparison between gold and lossless electrodes. Index Terms--Co-simulation, device simulation, finite difference time domain (FDTD), HBT, long-finger transistor, technology computer-aided design (TCAD).

This paper presents a precise modeling technique to evaluate the impact of high frequency overvoltage in long cable pulsewidth modulation drives. This modeling technique results from the need to correlate the inverter's supply voltage and cable length with the motor's dielectric insulation class. The mathematical formulas describing the transient voltage and current in the cable are developed in the frequency domain. The inverse Laplace transform of the voltage is then applied to obtain the time domain sets of equations for the computation of the overvoltage not only at the motor terminals, but at any point along the cable. The proposed technique is precise and very suitable to adjustable speed drive (ASD) systems. Contrary to existing methods, it does not require any representation of the ASD-system components. This paper includes simulations and experiments that were carried out on an industrial 5 kVA ASD prototype using a four-wire braided-shielded long cable. The measurements of the cable, inverter and motor required characteristics are investigated in detail. The simulation results are then compared with the obtained experimental waveforms so as to validate the modeling technique. At the end, some recommendations, aimed at protecting the motor, are formulated based upon the proposed technique. Index Terms--Cables, electromagnetic interference (EMI), electromagnetic transient propagation, insulated gate bipolar transistors (IGBTs), overvoltage, pulse width modulation (PWM), variable speed drives.

The paper presents analysis and design of a Q-band subharmonic mixer (SHM) with high conversion gain. The SHM consists of a local oscillator (LO) frequency doubler, RF pre-amplifier, and single-ended mixer. The SHM has been fabricated in a high-speed InP double heterojunction bipolar transistor (DHBT) technology using coplanar waveguide structures. To the best of our knowledge, this is the first demonstration of an SHM using InP DHBT technology at millimeter-wave frequencies. The measured results demonstrate a conversion gain of 10.3 dB at 45 GHz with an LO power of only 1 mW. The fundamental mixing product is suppressed by more than 24 dB and the output [P.sub.1 dB] is around -6 dBm. The mixer is broadband with a conversion gain above 7 dB from 40 to 50 GHz. The conversion gain for the fabricated SHM is believed to be among the best ever reported for millimeter-wave SHMs. Index Terms--Coplanar waveguides (CPWs), heterojunction bipolar transistors (HBTs), millimeter-wave circuit, mixer analysis, monolithic microwave integrated circuits (MMICs), nonlinear circuit analysis, subharmonic mixer (SHM).

The technology optimization of a vertical SiGeC heterojunction bipolar transistor (HBT) on thin-film silicon-on-insulator (SOI) substrates is presented. Findings reveal fully functional devices and ideal operation for high and low collector doping.

A full circuit model of an insulated gate bipolar transistor (IGBT) power module tile is obtained using electro-magnetic analysis. A skin depth analysis on the copper and bonding wire interconnects shows that the commonly used low frequency RLC models are not adequate for power modules and reveals the necessity for a frequency dependent impedance. A method is adapted for the design of an f-dependent module tile design circuit for the first time. It is found that the importance of skin depth becomes vital especially for lower voltage ratings and faster edge rate devices as the Fourier transform becomes shifted towards higher frequencies. Analysis of the current sharing capability of the IGBTs as a function of the tile layout showed that an asymmetrical tile yields a faster response from the nearer IGBTs during inductive turn-off and an unbalanced sharing of the reverse recovery current during turn-on. A symmetric tile layout is developed. It is found that the faster current fall-time during turn-off is compensated by higher current tail oscillations thereby bringing no major improvement to the turn-off energy. During turn-on however, the reverse recovery and IGBT turn-on energy dissipation are equally distributed between the IGBTs. Simulating device imbalances also shows that threshold voltage variations have a significant effect on the current and energy sharing at turn-on whereas injection efficiency imbalances have a large influence on turn-off characteristics. The effect of device imbalances is found to decrease for a highly symmetric tile design. It is also shown that equally higher IGBT temperatures tend to improve current sharing so that IGBT module design emphasis should be placed rather on minimizing any differences in the IGBT junction temperatures. The model developed allows PSpice simulation of characteristics previously obtained only through measurements. The impact of the layout design on issues such as cross-talk, mutual inductance and ground bounce may be quickly and accurately assessed for an optimal current sharing capability. Index Terms--Frequency dependent impedance, insulated gate bipolar transistor (IGBT), module, PSpice, sharing, tile.

The market of converters connected to transmission lines continues to require insulated gate bipolar transistors (IGBTs) with higher blocking voltages to reduce the number of IGBTs connected in series in high-voltage converters. To cope with these demands, semiconductor manufactures have developed several technologies. Nowadays, IGBTs up to 6.5-kV blocking voltage and IEGTs up to 4.5-kV blocking voltage are on the market. However, these IGBTs and injection-enhanced gate transistors (IEGTs) still have very high switching losses compared to low-voltage devices, leading to a realistic switching frequency of up to 1 kHz. To reduce switching losses in high-power applications, the auxiliary resonant commutated pole inverter (ARCPI) is a possible alternative. In this paper, switching losses and on-state voltages of NPT-IGBT (3.3 kV-1200 A), FS-IGBT (6.5 kV--600 A), SPT-IGBT (2.5 kV-1200 A, 3.3 kV-1200 A and 6.5 kV-600 A) and IEGT (3.3 kV-1200 A) are measured under hard-switching and zero-voltage switching (ZVS) conditions. The aim of this selection is to evaluate the impact of ZVS on various devices of the same voltage ranges. In addition, the difference in ZVS effects among the devices with various blocking voltage levels is evaluated. Index Terms--Auxiliary resonant commutated pole (ARCP), insulated gate bipolar transistors, soft-switching.

The class-AB/F power amplifier (PA), a multimode PA, which can operate at both class-AB and class-F modes, is analyzed and compared with the conventional class-F and class-AB PAs. The open-circuited third harmonic control circuit enhances the efficiency of the PA without deteriorating the linearity of class-AB mode of the PA. The voltage and current waveforms are simulated to evaluate the appropriate operation for the modes. To demonstrate the multimode PA, the PA is implemented using an InGaP/GaAs HBT process and it is tested with reverse-link IS-95A code division multiple access (CDMA) and PCS1900 global system for mobile communications signals in the personal communications service band. The class-AB operation for a CDMA signal delivers a power-added efficiency (PAE) of 38.9% and an adjacent channel power ratio of--49.5 and -56.5 dBc at the offset of 1.25 and 2.25 MHz, respectively, at the output power of 28 dBm. The maximum PAE of 64.7% under the class-F operation is measured at 32.5-dBm output power for a GSM signal. The class-AB/F PA is a good candidate for the multimode PA of next-generation wireless communication systems. Index Terms--Class AB, class AB/F, class F, code division multiple access (CDMA), efficient, global system for mobile communications (GSM), handset, heterojunction bipolar transistors (HBTs), IS-95A, linear, monolithic microwave integrated circuit (MMIC), multimode, PCS1900, power amplifier (PA).

A new description of the shot noise in HBTs is proposed that accounts for the correlation of the sources. It can easily be included in large-signal models, thus significantly improving the RF noise description. Common nonlinear bipolar transistor models thus far neglect the correlation, which deteriorates the model accuracy towards higher frequencies. It is shown that the collector delay in InGaP/GaAs HBTs dominates the shot noise correlation. Hence, the collector time-delay description of the large-signal model is capable of providing suitable noise correlation time constants. The model is verified against measurements of InGaP/GaAs HBTs with three different epitaxial layer designs. Index Terms--Equivalent circuit, heterojunction bipolar transistor (HBT), noise, semiconductor device modeling, semiconductor device noise, shot noise, white noise.

An n-type lateral insulated gate bipolar transistor (nLIGBT) with double buried layer structure integrated in an existing smart-power junction-isolated technology is analyzed. This device is compared to the rivaling drain extended MOSFET transistor in smart-power junction-isolated technology.

Studies have shown that SiGe heterojunction bipolar transistors (HBTs), which are optimized for high-speed performance in the forward mode of operation, have displayed an excellent performance in the reverse mode of operation. The simultaneous availability of a high-speed performance in the forward mode and a low-power performance in the reverse mode has offered additional flexibility to optimize circuit performance in terms of speed, area and power.

A novel transcranial magnetic stimulation (TMS) device with controllable pulse width (PW) and near-rectangular pulse shape(cTMS) is described. The cTMS device uses an insulated gate bipolar transistor (IGBT) with appropriate snubbers to switch coil currents up to 6 kA, enabling PW control from 5 [micro]s to over 100 [micro]s. The near-rectangular induced electric field pulses use 2%-34% less energy and generate 67%-72% less coil heating compared to matched conventional cosine pulses. CTMS is used to stimulate rhesus monkey motor cortex in vivo with PWs of 20 to 100 [micro]s, demonstrating the expected decrease of threshold pulse amplitude with increasing PW. The technological solutions used in the cTMS prototype can expand functionality, and reduce power consumption and coil heating in TMS, enhancing its research and therapeutic applications. Index Terms--Bioelectric potentials, biomagnetics, biomembranes, electric fields, energy measurement, heating, insulated gate bipolar, transistors, magnetic fields, neuromuscular stimulation, pulse generation, pulse power systems, pulse shaping circuits, pulse width (PW), transcranial magnetic stimulation (TMS).

A 30-GHz-band third harmonic optically injection-locked self-oscillating opto-electronic mixer is implemented with a 10-GHz InP heterojunction bipolar transistor monolithic microwave integrated circuit oscillator. The monolithic self-oscilating mixer can be optically injection locked in wide operating conditions and can perform efficient frequency up- and down-conversion with low-power optical local-oscillator signals. Using the mixer, bi-directional transmission of 32 quadrature amplitude modulation data in a 30-GHz fiber-fed wireless link is successfully demonstration. Index Terms--Fiber-fed wireless link, InP heterojunction bipolar transistor (HBT), monolithic microwave integrated circuit (MMIC), optical injection locking, self-oscillating opto-electronic (O/E) mixer.

Nonlinear distortion of a power amplifier (PA) due to the nonlinear input-output transfer function is studied. The high-order nonlinearity or Fourier components of the output, due to the mixing of input signals, are found to be related to an average integral related to the transfer function, thus giving insight to the cancellation effect of the nonlinearity. A simple formula has been derived to relate the nth-order Fourier component of a nonlinear transfer function with a sinusoidal input to an average integral of the nth-order derivative of the transfer function. The large signal nonlinear distortion of the nth-order can therefore be regarded as a weighted average of the nth-order derivative of the transfer function. For PAs, the averaging effect gives rise to local minima in the intermodulation distortion terms during power sweep because of the cancellation of the positive part and the negative part of the derivative during averaging. We have applied the formula to InGaP heterojunction bipolar transistors PAs and are able to explain most of the observed nonlinear phenomena of the amplifiers. Index Terms--Fourier transforms, heterojunction bipolar transistors (HBT), intermodulation distortion (IMD), nonlinear distortion, power amplifiers (PAs).

Analysts, experimenters, and facilities have fallen into some poor practices in reporting many dosimetry metrics. While the experienced dosimetrist often knows the caveats that apply for a given dosimetry application, without proper reporting critical information is often lost before the data is received by the dosimetrist. In addition, the newcomers to the application of dosimetry are not being educated in the importance of a variation in the irradiation conditions. This paper captures some of the cases where care must be taken in expressing the proper context for a dosimetry metric. Examples focus on the interpretation of the response of a diamond photoconducting detector and a silicon transistor and highlight some common mistakes and some not-so-clear misinterpretations that even the experienced person often makes in this field. A careful study of the underlying physics reveals the non-intuitive trends in some metrics. Suggestions are made on how the community can minimize the chance of a dosimetry-related misinterpretation. Index Terms--Bipolar transistors, dose, dosimetry, dpa, neutron detectors, silicon radiation detectors, uncertainty, 1-MeV(Si) damage.

We present a series of metrics for comparison between displacement damage due to heavy ion and neutron irradiation in silicon bipolar junction transistors. We have compared ion and fast neutron irradiations to determine an ion-to-neutron damage equivalence. We find that a combination of metrics (damage factor, Deep Level Transient Spectroscopy (DLTS) and Annealing Factor) are needed to ensure a comprehensive understanding of the physics involved in the ion-to-neutron conversion. The linearity of the damage factor (primarily probing the base-emitter junction) is not enough to ensure a valid comparison; rather, we must also use additional techniques (DLTS and capacitance measurements) to ensure that collector compensation is not occurring. As a result, care must be taken in choosing the irradiation beam for ion exposures. The displacement damage should peak in the sensitive region of the device to both ensure maximum gain degradation and to minimize collector compensation. Index Terms--Damage equivalence, heavy ion irradiation, neutron damage, silicon bipolar transistor.

The impact of 63.3 MeV proton and 10 keY x-ray irradiation on the DC and AC performance of complementary (npn + pnp) SiGe HBTs on thick-film SOI is investigated. Proton and x-ray induced changes in the forward and inverse Gummel characteristics, the output characteristics, and avalanche multiplication are reported for both npn and pnp SiGe HBTs, at both room temperature (300 K) and at cryogenic temperatures (down to 30 K). Comparison of room temperature and cryogenic data suggests interface trap formation at two distinct physical locations in the transistors. Experimental data and calibrated TCAD simulations are used to compare the radiation response of both thick-film SOI devices and thin-film SOI SiGe HBTs. Index Terms--C-SiGe, heterojunction bipolar transistors, radiation effects, SiGe HBT, silicon-on-insulator, SOI, TCAD.

We investigate the effects of both X-ray and proton irradiation on a novel 200 GHz/90 GHz (npn/pnp) complementary SiGe:C HBT technology. The dc forward mode total dose tolerance of the pnp HBTs is shown to exceed that of the npn HBTs by a significant margin after being subjected to both 63-MeV proton and 10-keV X-ray sources, while the ac characteristics of both devices exhibit no degradation up to X-ray doses as high as 1.8 Mrad(Si[O.sub.2]). Pre- and post-irradiation results from a current feedback operational amplifier implemented in this technology and irradiated up to a dose of 1.8 Mrad(Si[O.sub.2]) are presented, showing no degradation in performance metrics under two low current density bias configurations. Index Terms--Complementary bipolar, heterojunction bipolar transistors, radiation effects, SiGe HBT, silicon-germanium.

Using mixed-mode annealing to help evaluate the responses of modern bipolar transistors, we compare the damage processes associated with X-ray irradiation-induced and hot carrier-induced damage in SiGe HBTs. Stress and radiation measurements indicate that the by-products of both X-ray irradiation-induced and hot carrier-induced trap reactions are identical. We use calculations to better understand the operative damage mechanisms, and find that a hydrogen reaction-diffusion model can predict the observed characteristics of our measurements. Calculations indicate that the transport of hydrogen molecules inside the emitter-base oxides determines the trap generation and recovery processes. Index Terms--Mixed-mode anneal, mixed-mode stress, reaction-diffusion model, SiGe, SiGe HBTs, silicon-germanium, thermal anneal, X-ray irradiation.

The analysis of a multicell topology that is implemented with single-phase nonregenerative cells under an unbalanced ac mains is presented. The study shows that the topology naturally compensates most of the voltage unbalance; for instance, for a 100% voltage unbalance in the ac mains, just 32% reaches the load. For critical applications, a feedforward control technique is proposed in order to compensate the remaining unbalance at the load side. The resulting topology, in combination with the proposed strategy, reduces near to zero the load fundamental voltage unbalance, while the input current unbalance and distortion are also improved. A theoretical analysis that is based on symmetrical components and the experimental results confirm the theoretical considerations. Index Terms--AC-AC power conversion, insulated-gate bipolar transistor, multicell single-phase topology, multilevel system, power electronics, variable-speed drives.

The transient and static behavior of an insulated gate bipolar transistor (IGBT) are analyzed through finite elements simulations and physically based equations. The standard model using a bipolar transistor driven by a MOSFET is abandoned for three partial voltage drops in series, each with its specific static and dynamic behavior. One voltage drop on the internal MOSFET, one on the base and one on the collector-base junction. It is found that the dynamic model can be drastically simplified by focusing on the equivalent electron density. This takes into account the most important phenomena related to the carrier mobilities, necessary for an accurate transient modeling. The specific behavior of the gate-collector capacitance in soft switching conditions is discussed. An equation set based on semiconductor physics is developed to determine the static operating points for each contribution. The importance of the minority carriers transit time in soft switching conditions is then shown. The similarity observed between the waveforms obtained through a finite element simulation and the waveforms obtained using the developed IGBT model within various external structures validates the proposed approach. Index Terms--Insulated gate bipolar transistor (IGBT).

The fabrication of type-II n-p-n InP/GaAsSb/InP double heterostructure bipolar transistors (DHBTs) is discussed. Findings reveal the possibility of combining the InP/GaAsSb DHBT technology with high gain, wide bandwidths, high-current drivability and structure simplicity.