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Radiation-induced dopant passivation is evidenced for the first time in partially-depleted SOI n-channel MOSFETs. Isochronal annealing experiments following 10 Mrad(Si[O.sub.2]) irradiation demonstrate that the neutralization of boron atoms in the NMOSFET body is most pronounced in the 125[degrees]C-150[degrees]C temperature range. This results in an abrupt decrease of the threshold voltage and the subthreshold swing, due to the transition of the body from partial to full depletion. The SOI four-gate transistor, inherently present in the partially-depleted MOSFET structure, is demonstrated to be a very efficient tool for monitoring dopant neutralization through irradiation and annealing. Radiation-induced dopant passivation has important consequences regarding the reliability of short-channel partially-depleted NMOSFETs. Index Terms--Boron passivation, dopant neutralization, four-gate transistor, MOSFET, radiation effects, SOI, total dose.

The depletion-all-around (DAA) operation of the silicon-on-insulator (SOI) four-gate transistor ([G.sup.4]-FET) is presented by using experimental characteristics, three-dimensional (3-D) simulations and analytical modeling. The results have shown that the DAA operation of the SOI [G.sup.4]-FET is very useful for high-performance low-noise radiation-hard analog circuits.

A low-power CMOS bioluminescent bioreporter integrated circuit (BBIC) is designed and fabricated for use in electronic/biological chemical sensing. The bioreporters are placed on a CMOS integrated circuit (IC) that detects bioluminescence, performs signal processing and produces a digital output pulse with a frequency that is proportional to the concentration of the target substance. The digital output pulse that contains the sensor information can then be transmitted to a remote location either wirelessly or via a data cable. The basic building blocks of the integrated circuit are the microluminometer and the transmitter. The microluminometer includes an integrated photodetector and a signal processor and is housed in a rugged inexpensive package that can be used in many remote applications in hazardous environmental monitoring. The total power consumption of the entire signal processing circuitry including the photodiodes is 3 mW from a 3.3-V power supply. This is lowered by a factor of 3 when compared to previous versions of the BBIC. In addition, it also integrates all features of detection, processing and data transmission into one small element. The bioreporter typically contains the IuxCDABE reporter genes. The close proximity of the bioreporter and the sensing element eliminates the need for complex instrumentation to channel light from the bioreporters to the microluminometer. This paper presents an integrated CMOS microluminometer realized in 0.35-[micro]m CMOS process and optimized for the detection of low-level bioluminescence as part of the BBIC. A flow-through test system was designed to expose the BBIC system composed of the microluminometer and the bioreporter Pseudomonas fluorescens 5RL to salicylate for determination of analytical benchmark data. The results obtained from the experiment are currently being used to study enclosures and micro-environment configurations for field-deployable BBICs for environmental monitoring. Index Terms--Bioluminescent bioreporter integrated circuit (BBIC), bioreporters, CMOS photodetectors, microluminometer, whole-cell biosensors.

A custom simulation tool that combines HSPICE and MATLAB to enable time-domain noise analysis is reported. The simulation technique is based on computing the statistics of a random process by ensemble averaging and is applicable to both linear time-invariant (LTI) and linear time-variant (LTV) systems. MATLAB is used to generate a set of representative noise signals, which are imported into HSPICE for simulation. Once the simulations are complete the results are read back into MATLAB and ensemble statistics are calculated. The MATLAB-generated noise signals have a user-defined white-noise floor and flicker-noise corner frequency and thus are suitable for modeling a wide variety of electronic components, including CMOS transistors and resistors. Simulation results of the time-dependent output noise of a gated integrator and the timing resolution of a gated integrator/comparator detector are presented to highlight both the utility and the versatility of the tool. Index Terms--Autocorrelation, digital filter, flicker noise, SPICE, transient noise analysis, white noise.

We investigate proton damage in SOI CMOS devices on UNIBOND using a variety of lateral bipolar operational modes. We show that the impact of interface states and oxide charge can be more clearly observed using lateral bipolar action than by using normal FET operational characteristics. We also investigate the radiation-induced interface states at the Si/buried oxide interface and oxide charges in the buried oxide of this SOI CMOS technology using the DCIV method. Index Terms--Interface states, interface traps, lateral bipolar, proton radiation, SOI.

Design requirements for high-density detector front-ends and other high-performance analog systems routinely force designers to operate devices in moderate inversion. However, CMOS models have traditionally not handled this operating region very well. In this paper, the Berkeley Short-Channel IFGET Model (BSIM3V3) and EKV 2.6 MOSFET models are evaluated in terms of their ability to model low-voltage analog circuits. Simulation results for a standard 0.5 [micro]m CMOS process are presented and compared to measured data. The data presented includes simulated and measured output conductance and transconductance efficiency for devices with channel lengths ranging from 0.5 [micro]m to 33 [micro]m. In addition, the models are compared in terms of their ability to handle the different operating regions of the MOS transistor (weak, moderate, and strong inversion). The results highlight the difficulty of obtaining a model that accurately predicts the operation of high-performance analog systems. Index Terms--Analog circuit design, BSIM3V3, CMOS modeling, EKV 2.6, inversion coefficient, transconductnce efficiency.

This paper addresses the difficulty of designing 1-V capable analog circuits in standard digital complementary metal-oxide-semiconductor (CMOS) technology. Design techniques for facilitating 1-V operation are discussed and 1-V analog building block circuits are presented. Most of these circuits use the bulk-driving technique to circumvent the metal-oxide-semiconductor field-effect transistor turn-on (threshold) voltage requirement. Finally, techniques are combined within a 1-V CMOS operational amplifier with rail-to-rail input and output ranges. While consuming 300 [[micro]watts], the 1-V rail-to-rail CMOS op amp achieves 1.3-MHz unity-gain frequency and 57 [degrees] phase margin for a 22-pF load capacitance. Index Terms - CMOS analog integrated circuits, current mirrors, differential amplifiers, operational amplifiers.