132 results on '"Buses (Computers) -- Design and construction"'
Search Results
2. Serial-link bus: a low-power on-chip bus architecture
3. Data bus inversion in high-speed memory applications
4. Coding for reliable on-chip buses: A class of fundamental bounds and practical codes
5. Latency-guided on-chip bus-network design
6. Reducing the effective coupling capacitance in buses using threshold voltage adjustment techniques
7. Worst case crosstalk noise for nonswitching victims in high-speed buses
8. Even more channels in the same space
9. Integrating the bus
10. Accessories complement Camera Link capabilities: repeaters and fiberoptic extenders are increasing the flexibility of Camera Link-based systems
11. Hybrid free-space optical bus system for board-to-board interconnections
12. Transposing conductors in signal buses to reduce nearest-neighbor crosstalk
13. Designing the PowerPC 60X bus
14. Safety issues in modern bus standards
15. The integrated cluster bus for the IBM S/390 parallel sysplex
16. Integrated Cluster Bus performance for the IBM S/390 Parallel Sysplex
17. Despite threats from USB and Firewire, IEEE 488 ain't down yet
18. Designing computers
19. Design a multi-DSP system with just one bus
20. Low-voltage-swing CMOS drives 100-MHz bus; very fast bus speeds are possible with a 1-V swing, but transmission-line techniques are a must
21. Inside the PCI local bus
22. Busman's guide to I2C
23. VL vs. PCI: betting on a bus
24. PCI local bus has arrived
25. Infinite expansion
26. Local-bus battle begins in earnest
27. Bus wars II: peaceful coexistence
28. RS-232 terminal/monitor
29. FIFO memories
30. Characterizing the cell EIB on-chip network
31. Parallel algorithms for robot path planning with simpler VLSI architecture
32. Chip sets' latest role: tying buses together
33. Data-acquistion-board vendors search for differentiating technologies
34. Hop on board the PCI bus
35. VESA local bus and PCI fight for a seat on your next system
36. PCI: server bus for the fast LANe
37. Military Multibus II - a model of hardware/software scaleability
38. Jumping aboard the MIL-STD-1553 bus
39. Good Timing for the CAN Bus
40. Intrinsically safe, low-cost transducer bus
41. Cu links on the straight and narrow
42. Interconnect modeling below 100 nm
43. Rx for crosstalk, voltage drop
44. Trade tips for scaling interconnects
45. Backplane design moves to center stage
46. Voltage Issue Separates Rambus, USB 2.0
47. Intel Tips Details of 3GIO Motherboards
48. VSIA Updates Standard For On-Chip Bus Interface
49. Crosstalk vexes interface designs
50. Infiniband Will Transform Data Centers -- Increased Bandwidth, Holistic Approach Distinguish New Standard
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.