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The early detection of arrhythmia can effectively reduce the risk of serious heart diseases and save time for treatment. Many healthcare devices have been widely used for electrocardiogram (ECG) monitoring. However, most of them can only complete simple two-classes detection and have unacceptable hardware overhead and energy consumption. For achieving accurate and low-power arrhythmia detection, a novel ECG processor application specific integrated circuit (ASIC) is proposed in this paper, which can perform the prediction of five types of cardiac arrhythmias and heart rate monitoring. To realize hardware-efficient R-peak detection, an ECG pre-processing engine based on a first derivative and moving average comparison method is proposed. Efficient arrhythmia detection is realized by the proposed low-power classification engine, which is based on a carefully designed lightweight artificial neural network (ANN) with good prediction accuracy. The hardware reuse strategy is used to implement the hardware logic of ANN, where computations are executed by only one processing unit (PU), which is controlled by a flexible finite state machine (FSM). Also, the weights of ANN are configurable to facilitate model updates. We validate the functionality of the design using real-world ECG data. The proposed ECG processor is implemented using 55 nm CMOS technology, occupying an area of 0.33 mm2. This design consumes 12.88 μW at a 100 kHz clock frequency, achieving a classification accuracy of 96.69%. The comparison results with previous work indicate that our design has advantages in detection performance and power consumption, providing a good solution for low-power and low-cost ECG monitoring. [ABSTRACT FROM AUTHOR]