1. 4.8 An Area and Energy Efficient 0.12nJ/Pixel 8K 30fps AV1 Video Decoder in 5nm CMOS Process
- Author
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Seung-Yong Lee, Sun-Young Shin, YongMi Lee, Homin Kang, Kyungah Jeong, Kyung-Koo Lee, Eikyung Moon, Lee Seokhyun, Yohan Lim, SukHwan Lim, Seung-Sick Jun, Chang-hyun Yim, Inyup Kang, and Taesung Kim
- Subjects
Pixel ,Gate count ,Computer science ,business.industry ,Logic gate ,Video decoder ,Clock rate ,Static random-access memory ,business ,Decoding methods ,Computer hardware ,Coding (social sciences) - Abstract
Major content providers such as YouTube and Netflix use AV1, a state-of-art video coding standard that was finalized in 2018. This paper presents a video processor that supports the AV1 standard via a Multi-Format video Decoder (MFD). An MFD can decode various video coding standards, such as H.264/AVC, HEVC and AV1. The video decoder can decode up to 8K Ultra HD (8K-UHD) video at 30fps at 468MHz core clock frequency. The MFD is fabricated using a state-of-the-art 5nm CMOS process with a 5,835k NAND2 equivalent gate count and 518kB SRAM. For AV1, MFD dissipates 116mW for decoding AV1 $7680 \times4320p$ video at 30fps (0.12nJ/pixel) with core operating voltage at 0.7V.
- Published
- 2021