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This paper presents the design, construction, and testing of a 183-GHz FMCW transceiver module for wireless fuse applications. The transmitter consists of a square-triangle wave converter, a Ku-band VCO, a 91.5-GHz × 2 × 3 multiplying and amplifying chain, a 10-dB multi-hole directional coupler, and a 183-GHz frequency doubler. For the multiplying chain, the generated 91.5-GHz signal power is partly coupled out by the 10-dB coupler. The coupled output power is used as local oscillator (LO) signal to pump the 183-GHz subharmonic mixer (SHM). The receiver is cascaded by a 183-GHz SHM and a low-noise immediate frequency (IF) amplifier. The measured typical output power of the 183-GHz transceiver is 48 mW and the minimum noise temperature of the receiver is 620 K at 181 GHz. At 5-mm and 10-mm detection distance, the measured signal noise ratio (SNR) of transceiver IF signal is higher than 30 dB and 17 dB at 10 KHz bandwidth, respectively. The SNR is high enough for the following signal processing.

A new kind of contactless electromagnetic bandgap (EBG) structure in the form of interdigital-pin bed of nails is introduced for the first time in this paper. It consists of two metal plates with interdigital-pin bed of nails face to face with each other, where each pin is surrounded by four pins on the other plate. The working mechanism of the interdigital-pin contactless EBG structure is suppressing the modes supported by the parallel plate waveguide (PPW) by loading interdigital pins inside the PPW. The advantage of the interdigital-pin lattice is there is a significant pin gap increase. This lattice makes the minimum pin gap that could be processed by the machining center, after assembling, reduced from the diameter of the milling clutter to its radius. It provides a way to process EBG structures at higher frequency band with the same milling cutter. The cases the pins allocated between the two plates in a random manner are also studied. Compared to its traditional counterpart, the stopband is stable with a small variation. A W-band groove gap waveguide (GGW) prototype with interdigital-pins and a Ka-band GGW with randomly allocated pins are designed, manufactured, and tested. The measured results agree well with the simulation.

An all solid-state 330 GHz ×6 × 2 × 2 frequency multiplying chain is constructed and tested and it is used as a local oscillator (LO) in 664 GHz radiometers for cirrus clouds and cloud ice detecting. The frequency multiplying chain consists of a W-band sextupler, followed by a power-combined amplifier which delivers 460–540 mW output power, and two cascaded 165 GHz and 330 GHz balanced frequency doublers. The 165 GHz two-ways power-combined doubler applies four three-anode in series GaAs Schottky diodes to generate 50–63 mW output power in the frequency range 160–176 GHz, and its tested typical efficiency is 11.5%. The cascaded 330 GHz doubler uses a four-anode in anti-series arranged GaAs diode to generate 2.5–4.5 mW output power in the frequency range 320–352 GHz, and its tested typical efficiency is 6.0% and the maximum value is 8.0% at 328 GHz. The output power of the multiplying chain is high enough to pump the 664 GHz heterodyne radiometer for space application.

This letter presents the development of a compact 220 GHz heterodyne receiver module for radars application in which a novel low pass wide stop band intermediate frequency (IF) filter is integrated. The planar Schottky anti-parallel mixing diode based subharmonic mixer (SHM) is used as the receiver’s first stage. The diode is flip-chip mounted on a 50 μm thick quartz substrate. The accurate modeling of the self and mutual inductance of the diode’s air-bridges are discussed. The measured conversion loss (CL) of the SHM has a minimum value of 6.2 dB at 210.5 GHz, and is lower than 8.4 dB in the frequency range 209.4–219.6 GHz with a 10 mW input power from a local oscillator (LO). The LO chain consists of a 110 GHz passive tripler, two Ka-band amplifiers and a Ka-band active tripler. The tested minimum double side band (DSB) noise temperature of the integrated 220 GHz heterodyne receiver is 725 K at 205.2 GHz and lower than 1550 K in the frequency range 199–226 GHz.

This paper proposes a novel sub-harmonic mixing topology. Based on the proposed topology and the precise three-dimensional electromagnetic model of the Schottky barrier diode, a novel 183 GHz solid-state sub-harmonic mixer is designed and measured. By adding a compact low-pass filter near the ground of the mixer&rsquo, s circuit, the effect on the mixer&rsquo, s RF performance of the random error of the conductive adhesive in assembling is effectively decreased. The test results show that the optimal single-sideband conversion loss of the mixer is 8.1dB@183GHz when the local oscillator signal is 4mw@91GHz. In the RF bandwidth from 173 GHz to 191 GHz, the single-sideband conversion loss is less than &minus, 10.6 dB. At the same time, the RF port return loss is less than 9.8 dB.

Based on a W-band high-power source, two schemes are proposed to realize a 335 GHz frequency multiplier source. The first scheme involves producing a 335 GHz signal with a two-stage doubler. The first doubler adopts two-way power-combined technology and the second stage is a 335 GHz doubler using a balanced circuit to suppress the odd harmonics. The measured output power was about 17.9 and 1.5 dBm at 167.5 and 335 GHz, respectively. The other scheme involves producing a 335 GHz signal with a single-stage quadrupler built on 50 &micro, m thick quartz circuit adopting an unbalanced structure. The advantage of the unbalanced structure is that it can provide bias to the diodes without an on-chip capacitor, which is hard to realize with discrete devices. The measured output power was about 5.8 dBm at 337 GHz when driven with 22.9 dBm. Such 335 GHz frequency multiplier sources are widely used in terahertz imaging, radiometers, and so on.

Wideband traveling wave PIN Diode switches and attenuators are proposed. The switches and attenuators consist of three shunt PIN diodes, six radial stubs, bias circuit and DC return circuit. Wide bandwidth is achieved with six different radial stubs as reflective load of the diodes. The stubs work as short circuit to the diodes at different frequency points for broad bandwidth. For the Single pole single throw (SPST) switch, the lowest measured Insertion loss (IL) is 0.75dB and lower than 2.0dB in 85-105GHz, and its isolation is better than 21.3dB. As a Voltage-controlled variable attenuator (VCA), typical attenuation range is 23dB and attenuation fluctuation is lower than 5dB in 85-105GHz.

A 320–356GHz fixed-tuned frequency doubler is realized with discrete Schottky diodes mounted on 50µm thick quartz substrate. Influence of circuit channel width and thermal dissipation of the diode junctions are discussed for high multiplying efficiency. The doubler circuit is flip-chip mounted on gold electroplated oxygen-free copper film for grounding of RF and DC signals, and better thermal transportation. The whole multiplying circuit is optimized and established in Computer simulation technology (CST) suite. The highest measured multiplying efficiency is 8.0% and its output power is 5.4mW at 328GHz. The measured typical output power is 4.0mW in 320–356GHz.

This paper presents development of low conversion loss fundamental mixers. Appropriate reflector networks are employed to provide proper terminations for operation frequencies and other undesired frequency mixing components in the designed Ka-band single-ended mixer and X-band single balanced mixer. Quantitative analysis of the mixer terminations is presented. Syntheses of the input and output reflector networks are optimized for the mixers. The measured conversion loss of the X-band mixer is $6.4\pm 0.7\mathbf{dB}$ from 10 to 11.5GHz, the lowest conversion loss is 5.67dB at 10.6GHz. RF-IF port isolation is better than 27dB, LO-IF port isolation is higher than 24dB and LO-RF port isolation is better than 14dB. To the Ka-band mixer, the lowest measured conversion loss is 3.52dB at 32.2GHz, the conversion loss is flat and less than 5.68dB from 29 to 34GHz.

A frequency extension module for W-band antenna measurement facility is presented in this paper. The proposed frequency extension module includes a transmitting extender as well as a receiving extender. Active frequency multiplying and high order harmonic mixing are adopted in the two extenders, respectively. The developed extension module covers 92–96 GHz band and features characteristics of 15 dBm of output power and 113 dB of dynamic range. This set of extension module is fully compatible with commercial instruments and provides a cost-effective solution for W-band antenna measurement facilities.

Contactless waveguide flange is a novel structure to prevent leakage of electromagnetic wave when it propagates across the waveguide flange. The main advantage of contactless waveguide flange is electrical contact of the connected waveguides is not required as long as the gap between the adjacent flanges does not exceed the maximum permitted distance. Therefore, relative motivation or rotation of the contactless connected waveguides is possible. The contactless waveguide flanges have been reported are all planar. A cylindrical contactless flange is first proposed. Then, a novel flexible rectangular waveguide is proposed based on it. A Ka-band prototype is successfully designed and manufactured. The prototype consists of two bendable contactless flange joints. The maximum bending angle of each joint is limited to ±8° to maintain the return loss performance. The number of joints can be easily increased if larger bending angles are needed. The insertion loss and return loss at different bending angles are measured. The measured insertion loss is better than 0.7 dB from 26 to 37 GHz, and is better than 1.8 dB from 37 to 40 GHz. The measured return loss is 15 dB except frequencies around 37.5 and 40 GHz.

To effectively reduce the requirement of Local Oscillator (LO) power, this paper presents the design and measurement of a biased sub-harmonic mixer working at the center frequency of 0.67 THz in hybrid integration. Two discrete Schottky diodes were placed across the LO waveguide in anti-series configuration on a 50 &mu, m thick quartz-glass substrate, and chip capacitors were not required. At the driven of 3 mW@335 GHz and 0.35 V, the mixer had a minimum measured Signal Side-Band (SSB) conversion loss of 15.3 dB at the frequency of 667 GHz. The typical conversion loss is 18.2 dB in the band of 650 GHz to 690 GHz.

A D-band hybrid frequency doubler is developed with varistor diodes. The multiplier circuit substrate is RT/duroid 5880 with a thickness of 0.127 mm. In the circuit, the improved waveguide to unilateral finline transition is implemented with lower transition loss by cutting off high-order modes, and the reliability of the mounted circuit is enhanced with increased mounting groove depth. The D-band doubler exhibits the highest efficiency of 2% at 150.2 GHz; the typical efficiency is 1.9% from 150 to 150.5 GHz. The experimental and simulated results are in good agreement.

A Ka-Band hybrid integrated single-ended mixer with low conversion loss is designed in this paper. In the proposed circuit architecture, metallic via holes are implemented along the mounting edge of substrate embedded in the split-block of WG (waveguide)-finline-microstrip transition. Simulated results show that the effect of high-order modes due to the mounting groove is effectively eliminated and the transition loss is greatly improved. Meanwhile, a slow wave and bandstop filter at Ka band, which presents an equivalent short circuit, is designed for the maximized utilization of idle frequency energy, RF and LO signal energy. In this way, the conversion loss of the mixer can be further improved. The lowest measured conversion loss 3.52dB is obtained at 32.2 GHz; the conversion loss is flat and less than 5.68dB over the frequency band from 29 to 34 GHz.

A novel circuit architecture for high performance of high-order subharmonic (SH) mixers is proposed in this paper. According to the specified harmonic mixing order, one or more mixer diodes sub-arrays and corresponding power divider as well as phase shift network for RF and LO signals are arranged in the circuit. This proposed SH mixer circuit has improved conversion loss, wide dynamic range and high port isolation for high-order SH mixers. By phase cancellation of idle frequencies, the proposed SH mixer circuit can eliminate complicated design procedure of idle frequency circuits; by phase cancellation of leakage LO power to RF and IF port, and leakage RF power to LO port, the mixer circuit can get high port isolation in LO-IF/RF and RF-LO. The increased antiparallel diode pairs in each sub-array will also lead to well performance by lowering effective series resistance. The proposed SH mixer circuit can be easily realized with power divider and phase shift network for RF and LO signals.

An improved architecture of sixth subharmonic mixers is proposed in this paper. In order to meet the need of low conversion loss, antiparallel diodes are selected and the length of four open/shorted microstrip stubs at both sides of the antiparallel diodes are carefully designed. For any important idle frequency components which can’t be reused by the four stubs, reactive terminations are presented by adjusting the length of main RF and LO microstrip. The tested results indicate the lowest conversion loss is 26.1 dB at the radio frequency of 72 GHz, with fixed LO at 12 GHz. The proposed circuit architecture is suitable for the implementation of subharmonic mixers in E-band as well as other millimeter and submillimeter-wave regions where high quality and high frequency LOs are difficult to realize.

A 75–110 GHz low conversion loss (CL) eighth harmonic mixer is realized for low cost 94 GHz receiver front-ends. The mixing diodes are realized by GaAs foundry of Nanjing Electronic Devices Institute (NEDI) and its 3-D model is analyzed for impedance calculation of RF, LO, IF port. Wide band-stop filters and phase shift networks for RF and idle frequency signals recycling are designed with optimum load impedance for low CL. The measured CL of the mixers is lower than 28 dB, 18 dB, 16.5 dB in 75–110 GHz, 87–104 GHz and 90–100 GHz, respectively. The lowest tested CL is 14.7 dB at 94 GHz. The mixers are successfully applied in miniature and low cost 94 GHz receiver systems.

A 0.33THz frequency doubler is realized with planar Schottky diodes, and the diode is mounted on 50 μm thick quartz substrate. The complete multiplying circuit is optimized and established in 3-D electromagnetic simulation suite. The doubler is self-bias and fixed-tuned. The highest tested multiplying efficiency is 8% and its corresponding output power is 5.4mW with input power of 68mW at 328GHz. The typical measured efficiency is 6% in frequency band 320-358GHz. To the authors' knowledge, these results are comparable to reported frequency doubler performance around 330GHz with integrated diode technology.

A wideband MMIC power amplifier at W-band is reported in this letter. The four-stage MMIC, developed using 0.1 μm GaAs pseudomorphic HEMT (PHEMT) technology, demonstrated a flat small signal gain of 12.4 ± 2 dB with a minimum saturated output power (Psat) of 14.2 dBm from 77 to 100 GHz. The typical Psat is better by 16.3 dBm with a flatness of 0.4 dB and the maximum power added efficiency is 6% between 77 and 92 GHz. This result shows that the amplifier delivers output power density of about 470 mW/mm with a total gate output periphery of 100 μm. As far as we know, it is nearly the best power density performance ever published from a single ended GaAs-based PHEMT MMIC at this frequency band.

A circuit schematic of a D-band frequency doubler using commercially available DBES105a GaAs Schottky barrier diodes is proposed in this paper. Simulation study and circuit design of the doubler are carried out by using CST and ADS. The planar Schottky diodes are soldered on a 0.127 mm-thick Rogers Duroid 5880 substrate. The circuit substrate is about 20 mm long, 0.8 mm wide and mounted in the waveguide block that includes matching networks for local oscillator and RF frequency. The simulated multiplication efficiency reaches 12.6% at 132.8 GHz and 11.67% at 137.4 GHz respectively.

A high speed pulse detector at W-band is analyzed and designed based on hybrid integrated technology. The beam lead detector diode HSCH-9161 is adopted. The tested results show that the rising time of the output pulse within 92~98GHz is less than 2~3ns after the modulator and detector when the input modulating pulse signal rise time is 700ps. Due to its fast response speed, this detector can be applied in a variety of W- band pulse detecting systems.

Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circuit is composed of a radio frequency (RF) bandstop filter and a tuning line for optimum reflection phase of the RF signal. S-parameters of the complete circuit are exported to a circuit simulator for voltage sensitivity analysis. For the W band detectors, the highest measured voltage sensitivity is 11800 mV/mW at 100 GHz, and the sensitivity is higher than 2000 mV/mW in 80–104 GHz. Measured tangential sensitivity (TSS) is higher than —38 dBm, and its linearity is superior than 0.99992 at 95 GHz. For the D band detector, the highest measured voltage sensitivity is 1600 mV/mW, and the typical sensitivity is 600 mV/mW in 110–170 GHz. TSS is higher than −29 dBm, and its linearity is superior than 0.99961 at 150 GHz.

W-band quartz based high output power fix-tuned doublers are analyzed and designed with planar Schottky diodes. Full-wave analysis is carried out to find diode embedding impedances with a lumped port to model the nonlinear junction. Passive networks of the circuit, such as the low pass filter, the E-plane waveguide to strip transitions, input and output matching networks, and passive diode parts are analyzed by using electromagnetic simulators, and the different parts are then combined and optimized together. The exported S-parameters of the doubler circuit are used for multiply efficiency analysis. The highest measured output power is 29.5 mW at 80 GHz and higher than 15 mW in 76–94 GHz. The highest measured efficiency is 11.5% at 92.5 GHz, and the typical value is 6.0% in 70–100 GHz.