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Logic locking has been widely evaluated as a proactive countermeasure against the hardware security threats within the IC supply chain. However, the introduction of the SAT attack, and many of its derivatives, has raised big concern about this form of countermeasure. In this paper, we explore the possibility of exploiting chaos computing as a new means of logic locking. We introduce the concept of chaotic logic locking, called ChaoLock, in which, by leveraging asymmetric inputs in digital chaotic Boolean gates, we define the concept of programmability (key-configurability) to the sets of underlying initial conditions and system parameters. These initial conditions and system parameters determine the operation (functionality) of each digital chaotic Boolean gate. Also, by proposing dummy inputs in chaotic Boolean gates, we show that during reverse-engineering, the dummy inputs conceal the main functionality of the chaotic Boolean gates, which make the reverse-engineering almost impossible. By performing a security analysis of ChaoLock, we show that with no restriction on conventional CMOS-based ASIC implementation and with no test/debug compromising, none of the state-of-the-art attacks on logic locking, including the SAT attack, could reformulate chaotic Boolean gates while dummy inputs are involved and their parameters are locked. Our analysis and experimental results show that with a low number of chaotic Boolean gates mixed with CMOS digital gates, ChaoLock can guarantee resiliency against the state-of-the-art attacks on logic locking at low overhead.

In this paper, a novel chaotic map is introduced using two n-channel and one p-channel silicon-on-insulator (SOI) four-gate transistor (G4FET). The multi-gate structure of G4FET is leveraged to obtain four independent bifurcation parameters in the chaotic map with a simple three-transistor design. The four parameters are the top-gate voltage and junction-gate voltage of p-channel G4FET, and two junction-gate voltages of two n-channel G4FETs. A chaotic oscillator design is proposed using this discrete-time chaotic map circuit. The chaotic behaviour is evaluated using bifurcation diagram, Lyapunov exponent (LE), and correlation coefficient. The application of this multi-parameter chaotic oscillator is presented in a chaos-based reconfigurable logic gate. It is demonstrated that, the availability of multiple bifurcation parameters result in a significant improvement in functionality space.

There has been interest in so called alternative or unconventional computing paradigms that differ from traditional silicon-based computing architectures. One such paradigm is chaos computing. Chaos computing is based on the nonlinear dynamical principles and can perform all logical operations. It aims at implementing computing functions through the construction of logical gates by employing chaotic elements. The paper provides a brief introduction to chaos computing.

Reservoir computing (RC) is a brain-inspired computing framework that employs a transient dynamical system whose reaction to an input signal is transformed to a target output. One of the central problems in RC is to find a reliable reservoir with a large criticality, since computing performance of a reservoir is maximized near the phase transition. In this work, we propose a continuous reservoir that utilizes transient dynamics of coupled chaotic oscillators in a critical regime where sudden amplitude death occurs. This “explosive death” not only brings the system a large criticality which provides a variety of orbits for computing, but also stabilizes them which otherwise diverge soon in chaotic units. The proposed framework shows better results in tasks for signal reconstructions than RC based on explosive synchronization of regular phase oscillators. We also show that the information capacity of the reservoirs can be used as a predictive measure for computational capability of a reservoir at a critical point.

Certain nonlinear systems can switch between dynamical attractors occupying different regions of phase space, under variation of parameters or initial states. In this work we exploit this feature to obtain reliable logic operations. With logic output 0 or 1 mapped to dynamical attractors bounded in distinct regions of phase space, and logic inputs encoded by a very small bias parameter, we explicitly demonstrate that the system hops consistently in response to an external input stream, operating effectively as a reliable logic gate. This system offers the advantage that very low-amplitude inputs yield highly amplified outputs. Additionally, different dynamical variables in the system yield complementary logic operations in parallel. Further, we show that in certain parameter regions noise aids the reliability of logic operations, and is actually necessary for obtaining consistent outputs. This leads us to a generalization of the concept of Logical Stochastic Resonance to attractors more complex than fixed point states, such as periodic or chaotic attractors. Lastly, the results are verified in electronic circuit experiments, demonstrating the robustness of the phenomena. So we have combined the research directions of Chaos Computing and Logical Stochastic Resonance here, and this approach has the potential to be realized in wide-ranging systems.

In this paper, a three transistor circuit has been implemented in a standard 65 nm CMOS technology. The circuit has been used as a map to generate discrete-time chaotic signals. The map circuit has been combined with another map circuit in order to build a chaotic generator. The circuit is compact since it uses only twelve transistors in total to generate different Boolean functions as part of a chaotic computer. The total power consumption of the chaotic generator is only $18.4 \mu W$ and the area is $0.556 \mu m^{2}$. The circuit can be used as a logic gate and has been designed to generate various functions using multiple configurations. The number of functionalities of the chaos gate has been increased by altering the bias and threshold voltages.

Chaos computing is an unconventional paradigm for computing where chaotic oscillators are used for computation. As chaotic oscillators dynamically produce a large number of unique patterns over time, a single oscillator can be configured to produce different logic gates. Even the same logic functionality can be implemented using the same chaos gate but with different configurations. Chaotic implementations of logic thus provides opportunities for building instances of computing system with similar hardware but different configurations of operation, thus being capable of mitigating side channel based reverse engineering attack. In this paper, we explore the opportunities of mitigating side channel power attack vulnerabilities of conventional digital computing systems using chaos based logic. We perform an instruction classification attack using side channel power profiles on arithmetic logic units (ALU), considered for different proportions of conventional logic gates and chaotic logic gates. Quantitative analysis based on a classification algorithm shows that an ALU implemented with even a small proportion of chaotic gates can be classified with significantly lower accuracy compared to conventional alternatives.

We present a novel time-delay chaotic system by adopting multiple electro-optic nonlinear loops. The dynamic characteristics of the proposed chaotic system are investigated by means of the bifurcation diagram and the permutation entropy. The security performance of the system is analyzed in detail by using autocorrelation function, delayed mutual information, and the permutation information approach. The simulation results show that the time-delay signature is suppressed under certain simple conditions. Moreover, a synchronization scheme on basis of the proposed system is analyzed. Both the security and the feasibility are verified. The proposed chaotic system can be used in secure communications and also has potential applications in random number generation or chaos computing.

A three-dimensional (3D) chaotic system with/without time delay based on electro-optic nonlinear devices is proposed. The dynamical properties of the system are demonstrated using the bifurcation diagram, and the dynamical complexity is quantified by the permutation entropy. Moreover, when a time delay module is added to the system model, the security performance is analyzed via the autocorrelation function, delayed mutual information, and permutation information analysis. Numerical simulations show that the time-delay signature can be concealed by the system itself without any additional operations. The proposed 3D chaotic oscillator has potential applications in secure communication, random number generation, and chaos computing.

The logical operations are one of the key issues in today’s computer architecture. Nowadays, there is a great interest in developing alternative ways to get the logic operations by chaos computing. In this paper, a novel implementation method of reconfigurable logic gates based on one-parameter families of chaotic maps is introduced. The special behavior of these chaotic maps can be utilized to provide same threshold voltage for all logic gates. However, there is a wide interval for choosing a control parameter for all reconfigurable logic gates. Furthermore, an experimental implementation of this nonlinear system is presented to demonstrate the robustness of computing capability of chaotic circuits.

We have described a new method to construct the reconfigurable XOR logic circuit by using the modification of the standard uncoupled cellular neural network (CNN) cells. The modification of the cell is easier to implement in engineering applications. The scheme proposed in this paper, using the modification of standard uncoupled CNN cells, allows less hardware consumption in comparison to the utilisation of chaos computing system or harnessing piecewise-linear systems. The template parameters of the modified cell have been discussed, and the physical circuit implementing the reconfigurable two-input and three-input XOR function has also been presented.

We study chaos computing as a new approach for reconfigurable computing and present some of our latest results and discuss what this new direction to computing means and implies. We discuss the advantages and challenges that come with this new paradigm of computing and envision its future.

This work demonstrates the computational power of a hydrodynamic photochemical oscillator based on a photochromic naphthopyran generating aperiodic time series. The chaotic character of the time series is tested by calculating its largest Lyapunov exponent and the correlation dimension of its attractor after building its phase space through the Takens' theorem. Then, the chaotic dynamic is shown to be suitable to implement all the fundamental Boolean two-inputs-one-output logic gates. Finally, the strategy to implement fuzzy logic systems (FLSs) based on the time series is described. Such FLSs promise to be useful in the field of computational linguistics, which is concerned with the development of artificial intelligent systems able to transform collections of numerical data into natural language texts.

Chaos computing is a new circuit design scheme of using chaos computing units to achieve reconfigurable logic gates. The computing unit can function as different kinds of logic gates by changing external parameters. In this paper, the possibilities of expanding the function of a chaotic NOR gate proposed in the literature is studied. The numerical model for the circuit design was built by constructing differential equations fit for Matlab integration mechanism. Besides, numerical model for integrator saturation was built to make results of numerical simulation conform to that of circuit simulation. Analysis of the impact of integrator saturation was done. With the analysis and by changing the control voltage, NAND function was expanded for the original chaotic logic gate that was only able to function as a NOR gate. By adding the function control signal to the input end and setting the voltage of it to different levels, the computing unit becomes a real time reconfigurable one.

Chaos computing is a non-traditional new paradigm that exploits the extreme non-linearity of chaotic systems. This article presents a unified theoretical view of chaos computing. It introduces the fundamental concept and the unique features that are characteristics of chaos computing, and discusses various implementation approaches. Basic aspects of digital chaos computing to realise logical gates are introduced, followed by two specific techniques: (1) direct utilisation of the threshold mechanisms; (2) an application of the chaos neuron model. After presenting these approaches, we discuss general characteristics of digital chaos computing. Other digital, analog and digital/analog hybrid forms of chaos computing are also considered. Potential advantages of chaos computing include: high speed, low power and low cost, a general-purpose form of computing, re-configurable or dynamic logical architecture, implementation of continuous logic, robustness against noise, and parallel and distributed computing.

ArgumentWe continue our analysis of modeling practices that focus more on qualitative understanding of system behavior than the attempt to provide sharp forecasts. The argument here is built around three episodes: the ambitious work of the Princeton Meteorological Project; the seemingly simple models of convection in weather systems by Edward Lorenz at MIT; and then finally analysis of the dripping faucet by Robert Shaw and the Dynamical Systems Collective at UC Santa Cruz. Using the Princeton Meteorological Project as an argumentative foil for the later chaos work of Lorenz and Shaw, we first show how the epistemological interest of modeling came to shift fromissuingpredictions toprobingthe very meaning and limits of prediction. The second step of our argument shows that what may be seen in one context of use as a modeling technology that is error ridden, imprecise, or inadequate, may be parsed completely differently in another context. This argument about technology and practice, we argue, feeds through to epistemological conceptions of error. Far from being something that can be defined in the absolute, the notion of error is shown to be contextually plastic.

By applying nonlinear dynamics to the dense storage of information, we demonstrate how a single nonlinear dynamical element can store M items, where M is variable and can be large. This provides the capability for naturally storing data in different bases or in different alphabets and can be used to implement multilevel logic. Further we show how this method of storing information can serve as a preprocessing tool for (exact or inexact) pattern matching searches. Since our scheme involves just a single procedural step, it is naturally set up for parallel implementation and can be realized with hardware currently employed for chaos-based computing architectures.

Coevolution between two antagonistic species has been widely studied theoretically for both ecologically- and genetically-driven Red Queen dynamics. A typical outcome of these systems is an oscillatory behavior causing an endless series of one species adaptation and others counter-adaptation. More recently, a mathematical model combining a three-species food chain system with an adaptive dynamics approach revealed genetically driven chaotic Red Queen coevolution. In the present article, we analyze this mathematical model mainly focusing on the impact of species rates of evolution (mutation rates) in the dynamics. Firstly, we analytically proof the boundedness of the trajectories of the chaotic attractor. The complexity of the coupling between the dynamical variables is quantified using observability indices. By using symbolic dynamics theory, we quantify the complexity of genetically driven Red Queen chaos computing the topological entropy of existing one-dimensional iterated maps using Markov partitions. Co-dimensional two bifurcation diagrams are also built from the period ordering of the orbits of the maps. Then, we study the predictability of the Red Queen chaos, found in narrow regions of mutation rates. To extend the previous analyses, we also computed the likeliness of finding chaos in a given region of the parameter space varying other model parameters simultaneously. Such analyses allowed us to compute a mean predictability measure for the system in the explored region of the parameter space. We found that genetically driven Red Queen chaos, although being restricted to small regions of the analyzed parameter space, might be highly unpredictable.

This Letter contributes to the topic of chaos computing by introducing a new chaos-based implementation of sequential gates. In particular, the early results reported herein show that a chaos-based SR flip–flop can be obtained from two cross-coupled NOR gates implemented by a single Chua's circuit.

We report the experimental realization of a simple threshold controller, which clips chaotic dynamics to periods of different orders, in a continuous-time simple analog simulation type chaotic circuit. Further we use this technique to implement the fundamental NOR gate, thus providing a proof-of-principle experiment to demonstrate the universal computing capability to chaotic circuits. The advantage of this particular realization is that it may be simply implemented with monolithic integrated circuits for low-voltage or low-power applications, and thus is of considerable practical significance.

We report the experimental implementation of the most fundamental NOR gate with a chaotic Chua's circuit by a simple threshold mechanism. This provides a proof-of-principle experiment to demonstrate the universal computing capability of chaotic circuits in continuous time systems.

We introduce and design a noise tolerant chaos computing system based on a coupled map lattice (CML) and the noise reduction capabilities inherent in coupled dynamical systems. The resulting spatiotemporal chaos computing system is more robust to noise than a single map chaos computing system. In this CML based approach to computing, under the coupled dynamics, the local noise from different nodes of the lattice diffuses across the lattice, and it attenuates each other's effects, resulting in a system with less noise content and a more robust chaos computing architecture.

Basic principles of implementing the most fundamental computing functions by chaotic elements are described. They provide a theoretical foundation of computer architecture based on a totally new principle other than silicon chips. The fundamental functions are: the logical AND, OR, NOT, XOR, and NAND operations (gates) and bit-by-bit arithmetic operations. Each of the logical operations is realized by employing a single chaotic element. Computer memory can be constructed by combining logical gates. With these fundamental ingredients in hand, it is conceivable to build a simple, fast, yet cost effective, general-purpose computing device. Chaos computing may also lead to dynamic architecture, where the hardware design itself evolves during the course of computation.. The basic ideas are explained by employing a one-dimensional model, specifically the logistic map.

We demonstrate the ability of lattices of coupled chaotic maps to perform simple computations. This dynamical system is shown to emulate logic gates, encode numbers, and perform specific arithmetic operations on those numbers such as addition and multiplication. We also demonstrate the ability of this dynamical system to perform the more specialized operation of determining the least common multiplier of a sequence of integers.

Recently, there has been interest in so-called alternative computing paradigms that differ from traditional silicon-based computing architectures. One such alternative is chaos computing which exploits the inherent dynamics of chaotic systems. Chaos has three defining characteristics: (i) sensitivity to initial conditions, (ii) aperiodic long-term behavior, (iii) wholly deterministic. Since research in chaos computing is only in its infancy it is as yet not appropriate to debate the optimality of computing using chaos. However, unlike other alternative computing paradigms such as DNA computing and quantum computing, chaos computing presents a framework which one day might be appropriate for a general purpose machine.

Nonlinearity and chaos can illustrate numerous behaviors and patterns, and one can select different patterns from this rich library of patterns. In this paper we focus on synthetic computing, a field that engineers and synthesizes nonlinear systems to obtain computation. We explain the importance of nonlinearity, and describe how nonlinear systems can be engineered to perform computation. More specifically, we provide an overview of chaos computing, a field that manually programs chaotic systems to build different types of digital functions. Also we briefly describe logical stochastic resonance (LSR), and then extend the approach of LSR to realize combinational digital logic systems via suitable concatenation of existing logical stochastic resonance blocks. Finally we demonstrate how a chaotic system can be engineered and mated with different machine learning techniques, such as artificial neural networks, random searching, and genetic algorithm, to design different autonomous systems that can adapt and respond to environmental conditions.

In recent years, the field of nanoelectronics has yielded several nanoscale device families that exhibit the high device densities and energy-efficient operation required for emerging integrated circuit applications. For example, the memristor (or “memory resistor”) is a two-terminal nanoelectronic switch particularly well suited for applications such as high-density reconfigurable computing and neuromorphic hardware. In addition to increased device densities and energy-efficient operation, nanoelectronic systems are also subject to a high degree of variability, often seen as a negative for conventional circuit designs. However, in terms of implementing certain security primitives, variability is a feature that can be harnessed to improve security and trust in integrated circuits. The focus of this chapter is the utilization of nanoelectronic hardware for improved hardware security in emerging nanoelectronic and hybrid CMOS-nanoelectronic processors. Specifically, features such as variability and low power dissipation can be harnessed for side-channel attack mitigation, improved encryption/decryption and anti-tamper design. Furthermore, the novel behavior of nanoelectronic devices can be harnessed for novel computer architectures that are naturally immune to many conventional cyber attacks. For example, chaos computing utilizes chaotic oscillators in the hardware implementation of a computing system such that operations are inherently chaotic and thus difficult to decipher.

This paper presents a new approach to implement the dynamic reconfigurable logical systems based on Cellular Neural Networks (CNN), comparing with utilizing the chaos computing system, which is easier to implement in engineering applications and more stable. We provided and experimentally demonstrated the basic principle for obtaining a full-adder by using uncoupled CNN cells. The actual circuit to implementing the full-adder and transforming from adder to subtractor also has been presented.

Artificial intelligence emerged from human thinking that has both logical and intuitive or subjective sides. The logical side has been developed and utilized, resulting advanced von Neumann type computers and expert systems, both constituting the hard computing domain. However, it is found that hard computing can’t give the solution of very complicated problems by itself. In order to cope with this difficulty, the intuitive and subjective thinking of human mind was explored, resulting the soft computing domain (also called computational intelligence). It includes neural networks, fuzzy logic and probabilistic reasoning, the last gathering evolutionary computation (including genetic algorithms with related efforts in genetic programming and classifier systems, evolution strategies and evolutionary programming), immune networks, chaos computing and parts of learning theory. In different kind of applications, all pure artificial intelligence methods mentioned above proved to be rather complementary than competitive, so that combined methods appeared in order to gather the advantages and to cope with the disadvantages of each pure method. The scope of this chapter is to study and finaly compare some representative classes of pure and combined computational intelligence methods applied in engine knock detection.

Different methods to utilize the rich library of patterns and behaviors of a chaotic system have been proposed for doing computation or communication. Since a chaotic system is intrinsically unstable and its nearby orbits diverge exponentially from each other, special attention needs to be paid to the robustness against noise of chaos-based approaches to computation. In this paper unstable periodic orbits, which form the skeleton of any chaotic system, are employed to build a model for the chaotic system to measure the sensitivity of each orbit to noise, and to select the orbits whose symbolic representations are relatively robust against the existence of noise. Furthermore, since unstable periodic orbits are extractable from time series, periodic orbit-based models can be extracted from time series too. Chaos computing can be and has been implemented on different platforms, including biological systems. In biology noise is always present; as a result having a clear model for the effects of noise on any given biological implementation has profound importance. Also, since in biology it is hard to obtain exact dynamical equations of the system under study, the time series techniques we introduce here are of critical importance.

(Received 12 October 2010; revised manuscript received 19 January 2011; published 12 September 2011)The complex dynamics of chaotic systems can perform computations. The parameters and/or the initialconditionsofadynamicalsystemarethedatainputsandtheresultingsystemstateistheoutputofthecomputation.By controlling how inputs are mapped to outputs, a specific function can be performed. Previously no clearconnection has been drawn between the structure of the dynamics and the computation. In this paper wedemonstrate how chaos computation can be explained, modeled, and even predicted in terms of the dynamicsof the underlying chaotic system, specifically the periodic orbit structure of the system. Knowing the dynamicalequationsofthesystem,wecomputethesystem’speriodicorbitsaswellasitsstabilityintermsofitseigenvalues,thereby demonstrating how, how well, and what the chaotic system can compute.DOI: 10.1103/PhysRevE.84.036207 PACS number(s): 05

1 The Chaos Computing Paradigm (W.L. Ditto, A. Miliotis, K. Murali, and S. Sinha) 2 How Does God Play Dice? (J. Nagler and P.H. Richter) 3 Phase Reduction of Stochastic Limit-Cycle Oscillators (K. Yoshimura) 4 Complex Systems, numbers and Number Theory (L. Lacasa, B. Luque, and O. Miramontes) 5 Wave Localization Transitions in Complex Systems (J.W. Kantelhardt, L. Jahnke, and R. Berkovits) 6 From Deterministic Chaos to Anomalous Diffusion (R. Klages)

The response of a nonlinear optical oscillator subject to a delayed broadband bandpass filtering feedback is studied experimentally, numerically, and analytically. The oscillator loop is characterized by a high cutoff frequency with a response time tau approximately 10 ps and by a low cutoff frequency with a response time theta approximately 1 micros. Moreover, the optoelectronic feedback also consists of a significant delay tauD of the order of 100 ns. Depending on two key physical parameters, the loop gain beta and the nonlinearity operating point Phi, a large variety of multiple time scale regimes are reported, including slow or fast periodic oscillations with different waveforms, regular or chaotic breathers, slow time envelope dynamics, complex and irregular self-pulsing, and fully developed chaos. Many of these regimes are exhibiting new features that are absent in the classical first-order scalar nonlinear delay differential equations (DDEs), which differ in the modeling by the low cutoff only. Nearly all kinds of solutions are recovered numerically by a new class of integro-DDE (iDDE) that take into account both the high and low cutoff frequencies of the feedback loop. For moderate feedback gain, asymptotic solutions are determined analytically by taking advantage of the relative values of the time constants tau, theta, and tauD. We confirm the experimental observation of two distinct routes to oscillatory instabilities depending on the value of Phi. One route is reminiscent of the square wave oscillations of the classical first-order DDE, but the other route is quite different and allows richer wave forms. For higher feedback gain, these two distinct regimes merge leading to complex nonperiodic regimes that still need to be explored analytically and numerically. Finally, we investigate the theoretical limits of our iDDE model by experimentally exploring phenomena at extreme physical parameter setting, namely, high-frequency locking at strong feedback gain or pulse packages for very large delays. The large variety of oscillatory regimes of our broadband bandpass delay electro-optic oscillator is attractive for applications requiring rich optical pulse sources with different frequencies and/or wave forms (chaos-based communications, random number generation, chaos computing, and generation of stable multiple GHz frequency oscillations)., Journal Article, Research Support, Non-U.S. Gov't, info:eu-repo/semantics/published

We study the effect of additive colored noise on the evolution of maps and demonstrate that the deviations caused by such noise can be reduced using coupled dynamics. We consider both Ornstein–Uhlenbeck process as well as [Formula: see text] noise in our numerical simulations. We observe that though the variance of deviations caused by noise depends on the correlations in the noise, under optimal coupling strength, it decreases by a factor equal to the number of coupled elements in the array as compared to the variance of deviations in a single isolated map. This reduction in noise levels occurs in chaotic as well as periodic regime of the maps. Lastly, we examine the effect of colored noise in chaos computing and find that coupling the chaos computing elements enhances the robustness of chaos computing.

We review the concept of the ‘chaos computing’ paradigm, which exploits the controlled richness of nonlinear dynamics to obtain flexible reconfigurable hardware. We demonstrate the idea with specific schemes and verify the schemes through proof-of-principle experiments.