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With the advancement in the field of the Internet of Things(IoT) and Internet of Bodies(IoB), video camera applications using Video Sensor Nodes(VSNs) have gained importance in the field of autonomous driving, health monitoring, robot control, and security camera applications. However, these applications typically involve high data rates due to the transmission of high-resolution video signals, resulting from high data volume generated from the analog-to-digital converters (ADCs). This significant data deluge poses processing and storage overheads, exacerbating the problem. To address this challenge, we propose a low-power solution aimed at reducing the power consumption in Video Sensor Nodes (VSNs) by shifting the computation from the digital domain to the inherently energy-efficient analog domain. Unlike standard architectures where computation and processing are typically performed in digital signal processing (DSP) blocks after the ADCs, our approach eliminates the need for such blocks. Instead, we leverage a switched capacitor-based computation unit in the analog domain, resulting in a reduction in power consumption. We achieve a $\sim4X$ reduction in power consumption compared to digital implementations. Furthermore, we employ a sparsity-aware ADC, which is enabled only for significant compressed samples that contribute to a small fraction ($\le5\%$) of the total captured analog samples, we achieve a $\sim20X$ lower ADC conversion energy without any considerable degradation, contributing to the overall energy savings in the system., Comment: 15 pages, 25 Figures, First publication: Custom Integrated Circuits Conference 2023, 6 authors

Data transfer using human-body communication (HBC) represents an actively explored alternative solution to address the challenges related to energy-efficiency, tissue absorption, and security of conventional wireless. Although the use of HBC for wearable-to-wearable communication has been well-explored, different configurations for the transmitter (Tx) and receiver (Rx) for implant-to-wearable HBC needs further studies. This paper substantiates the hypothesis that a fully implanted galvanic Tx is more efficient than a capacitive Tx for interaction with a wearable Rx. Given the practical limitations of implanting an ideal capacitive device, we choose a galvanic device with one electrode encapsulated to model the capacitive scenario. We analyze the lumped circuit model for in-body to out-of-body communication, and perform Circuit-based as well as Finite Element Method (FEM) simulations to explore how the encapsulation thickness affects the received signal levels. We demonstrate in-vivo experimental results on live Sprague Dawley rats to validate the hypothesis, and show that compared to the galvanic Tx, the channel loss will be $\approx$ 20 dB higher with each additional mm thickness of capacitive encapsulation, eventually going below the noise floor for ideal capacitive Tx.

Traditional digital implementations of neural accelerators are limited by high power and area overheads, while analog and non-CMOS implementations suffer from noise, device mismatch, and reliability issues. This paper introduces a CMOS Look-Up Table (LUT)-based Neural Accelerator (LUT-NA) framework that reduces the power, latency, and area consumption of traditional digital accelerators through pre-computed, faster look-ups while avoiding noise and mismatch of analog circuits. To solve the scalability issues of conventional LUT-based computation, we split the high-precision multiply and accumulate (MAC) operations into lower-precision MACs using a divide-and-conquer-based approach. We show that LUT-NA achieves up to $29.54\times$ lower area with $3.34\times$ lower energy per inference task than traditional LUT-based techniques and up to $1.23\times$ lower area with $1.80\times$ lower energy per inference task than conventional digital MAC-based techniques (Wallace Tree/Array Multipliers) without retraining and without affecting accuracy, even on lottery ticket pruned (LTP) models that already reduce the number of required MAC operations by up to 98%. Finally, we introduce mixed precision analysis in LUT-NA framework for various LTP models (VGG11, VGG19, Resnet18, Resnet34, GoogleNet) that achieved up to $32.22\times$-$50.95\times$ lower area across models with $3.68\times$-$6.25\times$ lower energy per inference than traditional LUT-based techniques, and up to $1.35\times$-$2.14\times$ lower area requirement with $1.99\times$-$3.38\times$ lower energy per inference across models as compared to conventional digital MAC-based techniques with $\sim$1% accuracy loss., Comment: 7 pages

This paper presents a novel approach for performing computations using Look-Up Tables (LUTs) tailored specifically for Compute-in-Memory applications. The aim is to address the scalability challenges associated with LUT-based computation by reducing storage requirements and energy consumption while capitalizing on the faster and more energy-efficient nature of look-up methods compared to conventional mathematical computations. The proposed method leverages a divide and conquer (D&C) strategy to enhance the scalability of LUT-based computation. By breaking down high-precision multiplications into lower-precision operations, the technique achieves significantly lower area overheads, up to approximately 3.7 times less than conventional LUT-based approaches, without compromising accuracy. To validate the effectiveness of the proposed method, extensive simulations using TSMC 65 nm technology were conducted. The experimental analysis reveals that the proposed approach accounts for less than 0.1\% of the total energy consumption, with only a 32\% increase in area overhead. These results demonstrate considerable improvements achieved in energy efficiency and area utilization through the novel low-energy, low-area-overhead LUT-based computation in an SRAM array.

In this paper, we propose and evaluate a method of generating low-cost device signatures for distributed wireless brain implants, using a Pseudo-Random Binary Sequence (PRBS) Generator that utilizes a modified Ring-Oscillator-based Physical Unclonable Function (RO-PUF). The modified RO-PUF's output is used as a seed for the PRBS generator, which creates a multi-bit output that can be mapped to a time-slot when the implant is allowed to communicate with the external world using duty-cycled time-division multiplexing. A 9-bit PRBS generator is shown in hardware (with a TSMC 65 nm test chip implementation) that demonstrates < 100 nW Power consumption in measurement (72% lower power and 78% lower area than a traditional 9-bit RO-PUF implementation), which supports 26 implants with the probability of time-slot collision being < 50%. This potentially creates a pathway for low-cost device signature generation for highly resource-constrained scenarios such as wireless, distributed neural implants., Comment: 5 pages, 5 Figures

Energy-efficient sensing with Physically-secure communication for bio-sensors on, around and within the Human Body is a major area of research today for development of low-cost healthcare, enabling continuous monitoring and/or secure, perpetual operation. These devices, when used as a network of nodes form the Internet of Bodies (IoB), which poses certain challenges including stringent resource constraints (power/area/computation/memory), simultaneous sensing and communication, and security vulnerabilities as evidenced by the DHS and FDA advisories. One other major challenge is to find an efficient on-body energy harvesting method to support the sensing, communication, and security sub-modules. Due to the limitations in the harvested amount of energy, we require reduction of energy consumed per unit information, making the use of in-sensor analytics/processing imperative. In this paper, we review the challenges and opportunities in low-power sensing, processing and communication, with possible powering modalities for future bio-sensor nodes. Specifically, we analyze, compare and contrast (a) different sensing mechanisms such as voltage/current domain vs time-domain, (b) low-power, secure communication modalities including wireless techniques and human-body communication, and (c) different powering techniques for both wearable devices and implants., Comment: 30 pages, 5 Figures. This is a pre-print version of the article which has been accepted for Publication in Volume 25 of the Annual Review of Biomedical Engineering (2023). Only Personal Use is Permitted

One of the major challenges in communication, radar, and electronic warfare receivers arises from nearby device interference. The paper presents a 2-6 GHz GaN LNA front-end with onboard sensing, processing, and feedback utilizing microcontroller-based controls to achieve adaptation to a variety of interference scenarios through power and linearity regulations. The utilization of GaN LNA provides high power handling capability (30 dBm) and high linearity (OIP3= 30 dBm) for radar and EW applications. The system permits an LNA power consumption to tune from 500 mW to 2 W (4X increase) in order to adjust the linearity from P\textsubscript{1dB,IN}=-10.5 dBm to 0.5 dBm (>10X increase). Across the tuning range, the noise figure increases by approximately 0.4 dB. Feedback control methods are presented with backgrounds from control theory. The rest of the controls consume $\leq$10$\%$ (100 mW) of nominal LNA power (1 W) to achieve an adaptation time <1 ms., Comment: 16 Pages, 22 Figures. Accepted in TMTT, to be published

Untethered miniaturized wireless neural sensor nodes with data transmission and energy harvesting capabilities call for circuit and system-level innovations to enable ultra-low energy deep implants for brain-machine interfaces. Realizing that the energy and size constraints of a neural implant motivate highly asymmetric system design (a small, low-power sensor and transmitter at the implant, with a relatively higher power receiver at a body-worn hub), we present Time-Domain Bi-Phasic Quasi-static Brain Communication (TD- BPQBC), offloading the burden of analog to digital conversion (ADC) and digital signal processing (DSP) to the receiver. The input analog signal is converted to time-domain pulse-width modulated (PWM) waveforms, and transmitted using the recently developed BPQBC method for reducing communication power in implants. The overall SoC consumes only 1.8{\mu}W power while sensing and communicating at 800kSps. The transmitter energy efficiency is only 1.1pJ/b, which is >30X better than the state-of-the-art, enabling a fully-electrical, energy-harvested, and connected in-brain sensor/stimulator node., Comment: 4 pages, 6 figures, presented in ESSCIRC 2022 conference

Wireless communication using electro-magnetic (EM) fields acts as the backbone for information exchange among wearable devices around the human body. However, for Implanted devices, EM fields incur high amount of absorption in the tissue, while alternative modes of transmission including ultrasound, optical and magneto-electric methods result in large amount of transduction losses due to conversion of one form of energy to another, thereby increasing the overall end-to-end energy loss. To solve the challenge of powering and communication in a brain implant with low end-end channel loss, we present Bi-Phasic Quasistatic Brain Communication (BP-QBC), achieving < 60dB worst-case end-to-end channel loss at a channel length of 55mm, by avoiding the transduction losses during field-modality conversion. BP-QBC utilizes dipole coupling based signal transmission within the brain tissue using differential excitation in the transmitter and differential signal pick-up at the receiver, and offers 41X lower power w.r.t. traditional Galvanic Human Body Communication at a carrier frequency of 1MHz, by blocking any DC current paths through the brain tissue. Since the electrical signal transfer through the human tissue is electro-quasistatic up to several 10's of MHz range, BP-QBC allows a scalable (bps-10Mbps) duty-cycled uplink from the implant to an external wearable. The power consumption in the BP-QBC TX is only 0.52uW at 1Mbps (with 1% duty cycling), which is within the range of harvested body-coupled power in the downlink from an external wearable to the brain implant. Furthermore, BP-QBC eliminates the need for sub-cranial repeaters, as it utilizes quasi-static electrical signals, thereby avoiding any transduction losses. Such low end-to-end channel loss with high data rates would find applications in neuroscience, brain-machine interfaces, electroceuticals and connected healthcare., Comment: 22 pages

Increasing number of devices being used in and around the human body has resulted in the exploration of the human body as a communication medium. In this paper, we design a channel model for implantable devices communicating outside the body using physically secure Electro-Quasistatic Human Body Communication. A galvanic receiver shows 5dB lower path loss than capacitive receiver when placed close to transmitter whereas a capacitive receiver has around 15dB lower path loss for larger separation between the transmitter and receiver. Finite Element Method (FEM) based simulations are used to analyze the communication channel for different receiver topologies and experimental data is used to validate the simulation results.

Security vulnerabilities demonstrated in implantable medical devices have opened the door for research into physically secure and low power communication methodologies. In this study, we perform a comparative analysis of commonly used ISM frequency bands and human body communication (HBC) for data transfer from in-body to out-of-body (IBOB). We develop a figure of merit (FoM) that comprises of the critical parameters to quantitatively compare the communication methodologies. We perform finite-element method (FEM)-based simulations and experiments to validate the FoM developed.

Due to the diverse and mobile nature of the deployment environment, smart commodity devices are vulnerable to various attacks which can grant unauthorized access to a rogue device in a large, connected network. Traditional digital signature-based authentication methods are vulnerable to key recovery attacks, CSRF, etc. To circumvent this, RF-PUF had been proposed as a promising alternative that utilizes the inherent nonidealities of the devices as physical signatures. RF-PUF offers a robust authentication method that is resilient to key-hacking methods due to the absence of secret key requirements and does not require any additional circuitry on the transmitter end, eliminating additional power, area, and computational burden. In this work, for the first time, we analyze the effectiveness of RF-PUF on commodity devices, purchased off-the-shelf, without any modifications whatsoever. Data were collected from 30 Xbee S2C modules and released as a public dataset. A new feature has been engineered through statistical property analysis. With a new and robust feature set, it has been shown that 95% accuracy can be achieved using only ~1.8 ms of test data, reaching >99.8% accuracy with more data and a network of higher model capacity, without any assisting digital preamble. The design space has been explored in detail and the effect of the wireless channel has been determined. The performance of some popular ML algorithms has been compared with the NN approach. A thorough investigation on various PUF properties has been done and both intra and inter-PUF distances have been calculated. With extensive testing of 41238000 cases, the detection probability for RF-PUF for our data is found to be 0.9987, which, for the first time, experimentally establishes RF-PUF as a strong authentication method. Finally, the potential attack models and the robustness of RF-PUF against them have been discussed., Comment: 18 pages, 10 figures, we have made our dataset (used in this work) public and available at: https://github.com/SparcLab/Sparclab-RF-PUF-Dataset

Intensive research on energy harvested sensor nodes with traditional battery powered devices has been driven by the challenges in achieving the stringent design goals of battery lifetime, information accuracy, transmission distance, and cost. This challenge is further amplified by the inherent power intensive nature of long-range communication when sensor networks are required to span vast areas such as agricultural fields and remote terrain. Solar power is a common energy source is wireless sensor nodes, however, it is not reliable due to fluctuations in power stemming from the changing seasons and weather conditions. This paper tackles these issues by presenting a perpetually-powered, energy-harvesting sensor node which utilizes a minimally sized solar cell and is capable of long range communication by dynamically co-optimizing energy consumption and information transfer, termed as Energy-Information Dynamic Co-Optimization (EICO). This energy-information intelligence is achieved by adaptive duty cycling of information transfer based on the total amount of energy available from the harvester and charge storage element to optimize the energy consumption of the sensor node, while employing in-sensor analytics (ISA) to minimize loss of information. This is the first reported sensor node < 35cm2 in dimension, which is capable of long-range communication over > 1Km at continuous information transfer rates of upto 1 packet/second which is enabled by EICO and ISA.

(RFT) allows very high-Q active mode resonators, promising crystal-less monolithic clock generation for mmWave systems. However, there is a strong need for design of mmWave oscillators that utilize the high-Q of active-mode RFT (AM-RFT) optimally, while handling unique challenges such as resonator's low electromechanical transduction. In this brief, we develop a theory and through design and post-layout simulations in 14 nm Global Foundry process, we show the first active oscillator with AM-RFT at 30 GHz, which improves the fundamental limits of phase noise and figure-of-merit as compared to the oscillators with conventional LC resonators. For AM-RFT with Q factor of 10K, post layout simulation results show that the proposed oscillator exhibits phase noise less than -140 dBc per Hz and figure-of-merit greater than 228 dBc per Hz at 1 MHz offset for 30 GHz center frequency, which are more than 25 dB better than the existing monolithic LC oscillators.

In the last decade, the growing influence of open source software has necessitated the need to reduce the abstraction levels in hardware design. Open source hardware significantly reduces the development time, increasing the probability of first-pass success and enable developers to optimize software solutions based on hardware features, thereby reducing the design costs. The recent introduction of open source Process Development Kit (OpenPDK) by Skywater technologies in June 2020 has eliminated the barriers to Application-Specific Integrated Circuit (ASIC) design, which is otherwise considered expensive and not easily accessible. The OpenPDK is the first concrete step towards achieving the goal of open source circuit blocks that can be imported to reuse and modify in ASIC design. With process technologies scaling down for better performance, the need for entirely digital designs, which can be synthesized in any standard Automatic Place-and-Route (APR) tool, has increased considerably, for mapping physical design to the new process technology. This work presents the first open source all-digital Serializer/Deserializer (SerDes) for multi-GHz serial links designed using Skywater OpenPDK 130nm process node. To ensure that the design is fully synthesizable, the SerDes uses CMOS inverter-based drivers at the Tx, while the Rx front end comprises a resistive feedback inverter as a sensing element, followed by sampling elements. A fully digital oversampling CDR at the Rx recovers the Tx clock for proper decoding of data bits. The physical design flow utilizes OpenLANE, which is an end-to-end tool for generating GDS from RTL. Virtuoso has been used for extracting parasitics for post-layout simulations, which exhibit the SerDes functionality at 2 Gbps for 34 dB channel loss while consuming 438 mW power. The GDS and netlist files of the SerDes are uploaded in a GitHub repository for public access., Comment: 6pages; Accepted and Presented in IEEE/ACM DATE 2021 conference

This paper presents the design and analysis of a wearable CMOS biosensor with three different designs of energy-resolution scalable time-based resistance to digital converters (RDC), targeted towards either minimizing the energy/conversion step or maximizing bit-resolution. The implemented RDCs consist of a 3-stage differential ring oscillator which is current starved with the resistive sensor, a differential to single ended amplifier, an off-chip counter and serial interface. The first design RDC included the basic structure of time-based RDC and targeted low energy/conversion step. The second design RDC aimed to improve the rms jitter/phase noise of the oscillator with help of speed-up latches, to achieve higher bit-resolution as compared to the first design RDC. The third design RDC reduced the power consumption by scaling the technology with the improved phase-noise design, achieving 1-bit better resolution as that of the second design RDC. Using a time-based implementation, the RDCs exhibit energy-resolution scalablity, and consume 861nW with 18-bit resolution in design 1 in TSMC 0.35um technology. Design 2 and 3 consume 19.1uW with 20-bit resolution using TSMC 0.35um, and 17.6uW with 20-bit resolutions using TSMC 0.18um, respectively (both with 10ms read-time, repeated every second). With 30ms read-time, design 3 achieves 21-bit resolution, which is the highest resolution reported for a time-based ADC. The 0.35um time-based RDC is the lowest-power time-based ADC reported, while the 0.18um time-based RDC with speed-up latch offers the highest resolution. The active chip-area for all 3-designs are less than 1.1 mm^2., Comment: 12 pages, 16 figures

Decades of continuous scaling has reduced the energy of unit computing to virtually zero, while energy-efficient communication has remained the primary bottleneck in achieving fully energy-autonomous IoT nodes. This paper presents and analyzes the trade-offs between the energies required for communication and computation in a wireless sensor network, deployed in a mesh architecture over a 2400-acre university campus, and is targeted towards multi-sensor measurement of temperature, humidity and water nitrate concentration for smart agriculture. Several scenarios involving In-Sensor-Analytics (ISA), Collaborative Intelligence (CI) and Context-Aware-Switching (CAS) of the cluster-head during CI has been considered. A real-time co-optimization algorithm has been developed for minimizing the energy consumption in the network, hence maximizing the overall battery lifetime of individual nodes. Measurement results show that the proposed ISA consumes ~467X lower energy as compared to traditional Bluetooth Low Energy (BLE) communication, and ~69,500X lower energy as compared with Long Range (LoRa) communication. When the ISA is implemented in conjunction with LoRa, the lifetime of the node increases from a mere 4.3 hours to 66.6 days with a 230 mAh coin cell battery, while preserving more than 98% of the total information. The CI and CAS algorithms help in extending the worst-case node lifetime by an additional 50%, thereby exhibiting an overall network lifetime of ~104 days, which is >90% of the theoretical limits as posed by the leakage currents present in the system, while effectively transferring information sampled every second. A web-based monitoring system was developed to archive the measured data in a continuous manner, and to report anomalies in the measured data., Comment: 15 pages with author info, 18 figures

Very small electromechanical coupling coefficient in micro-electromechanical systems (MEMS) or acoustic resonators is quite of a concern for oscillator performance, specially at mmWave frequencies. This small coefficient is the manifestation of the small ratio of motional capacitance to static capacitance in the resonators. This work provides a general solution to overcome the problem of relatively high static capacitance at mmWave frequencies and presents analysis and design techniques for achieving extremely low phase noise and a very high figure-of-merit (FoM) in an on-chip MEMS resonator based mmWave oscillator. The proposed analysis and techniques are validated with design and simulation of a 30 GHz oscillator with MEMS resonator having quality factor of 10,000 in 14 nm GF technology. Post layout simulation results show that it achieves a phase noise of -132 dBc/Hz and FoM of 217 dBc/Hz at offset of 1 MHz., Comment: 5 page, 9 figures, 2 tables, transaction

Neuromorphic computing, inspired by the brain, promises extreme efficiency for certain classes of learning tasks, such as classification and pattern recognition. The performance and power consumption of neuromorphic computing depends heavily on the choice of the neuron architecture. Digital neurons (Dig-N) are conventionally known to be accurate and efficient at high speed, while suffering from high leakage currents from a large number of transistors in a large design. On the other hand, analog/mixed-signal neurons are prone to noise, variability and mismatch, but can lead to extremely low-power designs. In this work, we will analyze, compare and contrast existing neuron architectures with a proposed mixed-signal neuron (MS-N) in terms of performance, power and noise, thereby demonstrating the applicability of the proposed mixed-signal neuron for achieving extreme energy-efficiency in neuromorphic computing. The proposed MS-N is implemented in 65 nm CMOS technology and exhibits > 100X better energy-efficiency across all frequencies over two traditional digital neurons synthesized in the same technology node. We also demonstrate that the inherent error-resiliency of a fully connected or even convolutional neural network (CNN) can handle the noise as well as the manufacturing non-idealities of the MS-N up to certain degrees. Notably, a system-level implementation on MNIST datasets exhibits a worst-case increase in classification error by 2.1% when the integrated noise power in the bandwidth is ~ 0.1 uV2, along with +-3{\sigma} amount of variation and mismatch introduced in the transistor parameters for the proposed neuron with 8-bit precision.

Human Body Communication (HBC) has emerged as an alternative to radio wave communication for connecting low power, miniaturized wearable and implantable devices in, on and around the human body which uses the human body as the communication channel. Previous studies characterizing the human body channel has reported widely varying channel response much of which has been attributed to the variation in measurement setup. This calls for the development of a unifying bio physical model of HBC supported by in depth analysis and an understanding of the effect of excitation, termination modality on HBC measurements. This paper characterizes the human body channel up to 1MHz frequency to evaluate it as a medium for broadband communication. A lumped bio physical model of HBC is developed, supported by experimental validations that provides insight into some of the key discrepancies found in previous studies. Voltage loss measurements are carried out both with an oscilloscope and a miniaturized wearable prototype to capture the effects of non common ground. Results show that the channel loss is strongly dependent on the termination impedance at the receiver end, with up to 4dB variation in average loss for different termination in an oscilloscope and an additional 9 dB channel loss with wearable prototype compared to an oscilloscope measurement. The measured channel response with capacitive termination reduces low frequency loss and allows flat band transfer function down to 13 KHz, establishing the human body as a broadband communication channel. Analysis of the measured results and the simulation model shows that (1) high impedance (2) capacitive termination should be used at the receiver end for accurate voltage mode loss measurements of the HBC channel at low frequencies.

Human Body Communication (HBC) has recently emerged as an alternative to radio frequency transmission for connecting devices on and in the human body with order(s) of magnitude lower energy. The communication between these devices can give rise to different scenarios, which can be classified as wearable-wearable, wearable-machine, machine-machine interactions. In this paper, for the first time, the human body channel characteristics is measured for a wide range of such possible scenarios (14 vs. a few in previous literature) and classified according to the form-factor of the transmitter and receiver. The effect of excitation/termination configurations on the channel loss is also explored, which helps explain the previously unexplained wide variation in HBC Channel measurements. Measurement results show that wearable-wearable interaction has the maximum loss (upto -50 dB) followed by wearable-machine and machinemachine interaction (min loss of 0.5 dB), primarily due to the small ground size of the wearable devices. Among the excitation configurations, differential excitation is suitable for small channel length whereas single ended is better for longer channel., Comment: Accepted in 40th International Engineering in Medicine and Biology Conference

Traditional authentication in radio-frequency (RF) systems enable secure data communication within a network through techniques such as digital signatures and hash-based message authentication codes (HMAC), which suffer from key recovery attacks. State-of-the-art IoT networks such as Nest also use Open Authentication (OAuth 2.0) protocols that are vulnerable to cross-site-recovery forgery (CSRF), which shows that these techniques may not prevent an adversary from copying or modeling the secret IDs or encryption keys using invasive, side channel, learning or software attacks. Physical unclonable functions (PUF), on the other hand, can exploit manufacturing process variations to uniquely identify silicon chips which makes a PUF-based system extremely robust and secure at low cost, as it is practically impossible to replicate the same silicon characteristics across dies. Taking inspiration from human communication, which utilizes inherent variations in the voice signatures to identify a certain speaker, we present RF- PUF: a deep neural network-based framework that allows real-time authentication of wireless nodes, using the effects of inherent process variation on RF properties of the wireless transmitters (Tx), detected through in-situ machine learning at the receiver (Rx) end. The proposed method utilizes the already-existing asymmetric RF communication framework and does not require any additional circuitry for PUF generation or feature extraction. Simulation results involving the process variations in a standard 65 nm technology node, and features such as LO offset and I-Q imbalance detected with a neural network having 50 neurons in the hidden layer indicate that the framework can distinguish up to 4800 transmitters with an accuracy of 99.9% (~ 99% for 10,000 transmitters) under varying channel conditions, and without the need for traditional preambles., Comment: Accepted: in the IEEE Internet of Things Journal (JIoT), 2018

Physical unclonable functions (PUF) in silicon exploit die-to-die manufacturing variations during fabrication for uniquely identifying each die. Since it is practically a hard problem to recreate exact silicon features across dies, a PUFbased authentication system is robust, secure and cost-effective, as long as bias removal and error correction are taken into account. In this work, we utilize the effects of inherent process variation on analog and radio-frequency (RF) properties of multiple wireless transmitters (Tx) in a sensor network, and detect the features at the receiver (Rx) using a deep neural network based framework. The proposed mechanism/framework, called RF-PUF, harnesses already existing RF communication hardware and does not require any additional PUF-generation circuitry in the Tx for practical implementation. Simulation results indicate that the RF-PUF framework can distinguish up to 10000 transmitters (with standard foundry defined variations for a 65 nm process, leading to non-idealities such as LO offset and I-Q imbalance) under varying channel conditions, with a probability of false detection < 10e-3, Comment: Presented in Hardware Oriented Security and Trust (HOST), 2018

In this emerging data-driven world, secure and ubiquitous authentication mechanisms are necessary prior to any confidential information delivery. Biometric authentication has been widely adopted as it provides a unique and non-transferable solution for user authentication. In this article, the authors envision the need for an in-field, remote and on-demand authentication system for a highly mobile and tactical environment, such as critical information delivery to soldiers in a battlefield. Fingerprint-based in-field biometric authentication combined with the conventional password-based techniques would ensure strong security of critical information delivery. The proposed in-field fingerprint authentication system involves: (i) wearable fingerprint sensor, (ii) template extraction (TE) algorithm, (iii) data encryption, (iv) on-body and long-range communications, all of which are subject to energy constraints due to the requirement of small form-factor wearable devices. This paper explores the design space and provides an optimized solution for resource allocation to enable energy-efficient in-field fingerprint-based authentication. Using Human Body Communication (HBC) for the on-body data transfer along with the analytics (TE algorithm) on the hub allows for the maximum lifetime of the energy-sparse sensor. A custom-built hardware prototype using COTS components demonstrates the feasibility of the in-field fingerprint authentication framework., Comment: IEEE Engineering in Medicine and Biology Society (EMBC), 2018

Human Body Communication (HBC) provides a low power communication medium for energy constrained wearable/ implantable devices in and around the human body. This paper presents a broadband HBC transceiver implemented in 65nm CMOS that achieves 6.3pJ/b energy efficiency at 30Mbps with -30dB interference-tolerance. Capacitive termination at the receiver end is used to achieve a wideband HBC channel, and Time Domain Signal-Interference Separation (TD-SIS) using Integrating DDR (I-DDR) receiver allows a tolerance of -30 dB Signal to Interference Ratio (SIR) with a BER <10-3. The transceiver achieves 18X improvement in energy-efficiency compared to the State-of-the-Art HBC transceivers while being simultaneously broadband (carrier-less, low-energy) and interference-robust. Such order-of-magnitude improvement in energy-efficiency and private communication through the human body may enable applications like closed-loop neuromodulation, health-monitoring, secure authentication among many others.

This work presents the design and analysis of a mixed-signal neuron (MS-N) for convolutional neural networks (CNN) and compares its performance with a digital neuron (Dig-N) in terms of operating frequency, power and noise. The circuit-level implementation of the MS-N in 65 nm CMOS technology exhibits 2-3 orders of magnitude better energy-efficiency over Dig-N for neuromorphic computing applications - especially at low frequencies due to the high leakage currents from many transistors in Dig-N. The inherent error-resiliency of CNN is exploited to handle the thermal and flicker noise of MS-N. A system-level analysis using a cohesive circuit-algorithmic framework on MNIST and CIFAR-10 datasets demonstrate an increase of 3% in worst-case classification error for MNIST when the integrated noise power in the bandwidth is ~ 1 {\mu}V2., Comment: Accepted in IEEE International Conference on Rebooting Computing (ICRC), 2017

Emerging health-monitor applications, such as information transmission through multi-channel neural implants, image and video communication from inside the body etc., calls for ultra-low active power (<50${\mu}$W) high data-rate, energy-scalable, highly energy-efficient (pJ/bit) radios. Previous literature has strongly focused on low average power duty-cycled radios or low power but low-date radios. In this paper, we investigate power performance trade-off of each front-end component in a conventional radio including active matching, down-conversion and RF/IF amplification and prioritize them based on highest performance/energy metric. The analysis reveals 50${\Omega}$ active matching and RF gain is prohibitive for 50${\mu}$W power-budget. A mixer-first architecture with an N-path mixer and a self-biased inverter based baseband LNA, designed in TSMC 65nm technology show that sub 50${\mu}$W performance can be achieved up to 10Mbps (< 5pJ/b) with OOK modulation., Comment: Accepted to appear on International Conference on VLSI Design 2018 (VLSID)