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7. Resistance switching for RRAM applications

9. Effect of Ti buffer layer on HfOx-based bipolar and complementary resistive switching for future memory applications

12. Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications

13. A nonvolatile look-up table using ReRAM for reconfigurable logic

14. Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme

17. A ReRAM integrated 7T2R non-volatile SRAM for normally-off computing application

22. A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes

23. Circuit design challenges and trends in read sensing schemes for resistive-type emerging nonvolatile memory

24. Metal–Oxide RRAM

30. Access Strategies for Resistive Random Access Memory (RRAM)

35. A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

36. A low store energy, low VDDmin, nonvolatile 8T2R SRAM with 3D stacked RRAM devices for low power mobile applications

48. Three-Dimensional \4F^2 ReRAM With Vertical BJT Driver by CMOS Logic Compatible Process.

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