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The working environment of electronic devices in the aerospace field is harsh. In order to ensure the reliable application of the SOI FinFET, the total ionizing dose (TID) and hot carrier injecting (HCI) reliability of an SOI FinFET were investigated in this study. First, the influence of TID on the device was simulated. The results show that TID causes the threshold voltage to decrease and the off-state current and subthreshold swing to increase. TID causes more damage to the device at high temperature and also reduces the saturation drain current of the device. HCI causes the device threshold voltage to increase and the saturation drain current to decrease. The HCI is more severe at high temperatures. Finally, the coupling effects of the two were simulated, and the results show that the two effects cancel each other out, and the degradation of various electrical characteristic parameters is different under different coupling modes. [ABSTRACT FROM AUTHOR]

PIN diodes, due to their simple structure and variable resistance characteristics under high-frequency high-power excitation, are often used in radar front-end as limiters to filter high power microwaves (HPM) to prevent its power from entering the internal circuit and causing damage. This paper carries out theoretical derivation and research on the HPM effects of PIN diodes, and then uses an optimized neural network algorithm to replace traditional physical modeling to calculate and predict two types of HPM limiting indicators of PIN diode limiters. We proposes a neural network model for each of the following two prediction scenarios: in the scenario of time-junction temperature curves under different HPM irradiation, the weighted mean squared error (MSE) between the predicted values from the test dataset and the simulated values is below 0.004. While in predicting PIN limiter's power limitation threshold, insertion loss, and maximum isolation under different HPM irradiation, the MSE of the test set prediction values and simulation values are all less than 0.03. The method proposed in this research, which applies an optimized neural network algorithm to replace traditional physical modeling algorithms for studying the high-power microwave effects of PIN diode limiters, significantly improves the computational and simulation speed, reduces the calculation cost, and provides a new method for studying the high-power microwave effects of PIN diode limiters. [ABSTRACT FROM AUTHOR]

To cope with the much narrower ESD design window in 28 nm CMOS technology, a novel diode-triggered silicon-controlled rectifier with an extra discharge path (EDP-DTSCR) for ESD protection is proposed in this paper. Compared with the traditional DTSCR, the proposed DTSCR has an enhanced current discharge capability that is achieved by creating a slave SCR path in parallel with the master SCR path. Moreover, the improved triggering and holding characteristic can be obtained by the proposed EDP-DTSCR. By sharing the anode emitter junction, a slave SCR path is constructed that is symmetrical to the position of the master SCR path to add an additional ESD discharge path to the EDP-DTSCR. In this way, the current discharge capability of the entire device is obviously improved. The TCAD simulation result shows that the proposed device has a remarkably lower on-resistance compared with the traditional DTSCR and the DTSCR with p-type guard ring (PGR-DTSCR). In addition, it is structurally optimized to further increase the holding voltage and reduce the trigger voltage to improve the anti-latching capability of the device, which is more conducive to the ESD protection window application of 28 nm CMOS technology. [ABSTRACT FROM AUTHOR]

Study Design: Meta-analysis. Objectives: This study aimed to summarize the clinical efficacy and safety of the various annular defect repair methods that have emerged in recent years. Methods: A meta-analysis of randomized and non-randomized controlled trials was conducted. Articles from PubMed, Embase, and the Cochrane Library (CENTRAL) on Lumbar disc herniation treatment with annular repair published from inception to April 2, 2022 were included. We summarized the clinical efficacy and safety of annular repair techniques based on a random-effects model meta-analysis. Results: 7 randomized controlled studies and 8 observational studies with a total of 2161 participants met the inclusion criteria. The pooled data analysis showed that adding the annular repair technique reduced postoperative recurrence rate, reoperation rate, and loss of intervertebral height compared with lumbar discectomy alone. Subgroup analysis based on different annular repair techniques showed that the Barricaid Annular Closure Device (ACD) was effective in preventing re-protrusion and reducing reoperation rates, while there was no significant difference between the other subgroups. The annulus fibrosus suture (AFS) did not improve the postoperative Oswestry Disability Index (ODI). No statistically significant difference was observed in the incidence of adverse events between the annular repair and control groups. Conclusions: Lumbar discectomy combined with ACD can effectively reduce postoperative recurrence and reoperation rates in patients with LDH. AFS alone was less effective in reducing recurrence and reoperation rates and did not improve postoperative pain and function. [ABSTRACT FROM AUTHOR]

A power clamp circuit, which has good immunity to false trigger under fast power-on conditions with a 20 ns rising edge, is proposed in this paper. The proposed circuit has a separate detection component and an on-time control component which enable it to distinguish between electrostatic discharge (ESD) events and fast power-on events. As opposed to other on-time control techniques, instead of large resistors or capacitors, which can cause a large occupation of the layout area, we use a capacitive voltage-biased p-channel MOSFET in the on-time control part of the proposed circuit. The capacitive voltage-biased p-channel MOSFET is in the saturation region after the ESD event is detected, which can serve as a large equivalent resistance (~106 Ω) in the structure. The proposed power clamp circuit offers several advantages compared to the traditional circuit, such as having at least 70% area savings in the trigger circuit area (30% area savings in the whole circuit area), supporting a power supply ramp time as fast as 20 ns, dissipating the ESD energy more cleanly with little residual charge, and recovering faster from false triggers. The rail clamp circuit also offers robust performance in an industry-standard PVT (process, voltage, and temperature) space and has been verified by the simulation results. Showing good performance of human body model (HBM) endurance and high immunity to false trigger, the proposed power clamp circuit has great potential for application in ESD protection. [ABSTRACT FROM AUTHOR]