120 results on '"Cheng, Junji"'
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2. A novel field plate with arcuate end for improving GaN HEMTs.
3. Fabricating and TCAD Optimization for a SiC Trench MOSFET With Tilted P-Shielding Implantation and Integrated TJBS
4. Low-loss carrier-stored IGBT with p-type Schottky diode-clamped shielding layer
5. Poly-silicon light-emitting-device based electro-optical interfaces in standard silicon-CMOS integrated circuitry
6. Temperature Dependent Optimization for Specific On-Resistance for 900 V Superjunction MOSFETs: Numerical Calculation and Comparison
7. Study on SrTiO3 film for the application of power devices
8. Analytical model and simulation study of a novel enhancement-mode Ga2O3 MISFET realized by p-GaN gate
9. A new low specific on-resistance Hk-LDMOS with N-poly diode
10. Investigation of a Novel Enhancement-Mode Al$_{\text{0}.\text{25}}$Ga$_{\text{0}.\text{75}}$N/AlN/Al$_{\textit{x}}$Ga$_{\text{(\text{1}$-$}\textit{x}\text{)}}$N/GaN MIS-HEMT for High $\textit{V}_{\text{th}}$ and Low $\textit{R}_{\text{on,\text{sp}}}$
11. A High-k LDMOS Improved by Floating Field Plates for Enhanced Cost Performance and Robustness
12. Optimization of Specific ON-Resistance of Superjunction Device with Two-Zones Variation Vertical Doping Profile
13. A Rigorous Analysis of Specific ON-resistance for 4H-SiC Superjunction Devices
14. Superjunction SiC TCOX-MOSFET: Study and Comparison
15. A Novel Insulating-Pillar Superjunction with Vertical Insulators: Breakthrough of Specific ON-Resistance Limit
16. Use of carrier injection engineering to increase the light intensity of a polycrystalline silicon avalanche mode light-emitting device.
17. Optimization and Comparison of Specific ON-Resistance for Superjunction MOSFETs Considering Three-Dimensional and Insulator-Pillar Concepts
18. Simulation Study of a p-GaN HEMT With an Integrated Schottky Barrier Diode
19. A Vertical Thin Layer pLDMOS with Linear doping realizing ultralow Ron,sp
20. A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances
21. A low loss single-channel SiC trench MOSFET with integrated trench MOS barrier Schottky diode
22. Investigation of a Novel Enhancement-Mode Al0.25Ga0.75N/AlN/AlXGa(1-X)N/GaN MIS-HEMT for High Vth and Low Ron,sp
23. A Lateral Power p-Channel Trench MOSFET Improved by Variation Vertical Doping
24. Optimization and Comparison of Drift Region Specific ON-Resistance for Vertical Power Hk MOSFETs and SJ MOSFETs With Identical Aspect Ratio
25. Simulation Study of a Novel Snapback Free Reverse-Conducting SOI-LIGBT With Embedded P-Type Schottky Barrier Diode
26. A unified model for vertical doped and polarized superjunction GaN devices
27. A Novel IGBT With High-${k}$ Dielectric Modulation Achieving Ultralow Turn-Off Loss
28. A TCAD Study on Lateral Power MOSFET With Dual Conduction Paths and High-$k$ Passivation
29. A Novel Diode-Clamped Carrier Stored Trench IGBT With Improved Performances
30. Study on the IGBT Using a Deep Trench Filled With SiO2 and High-k Dielectric Film
31. Design and Realization of a Novel Poly-Silicon Light-Emitting Device Based on Standard CMOS Technology
32. Lateral Power Fin MOSFET With a High-k Passivation for Ultra-Low On-Resistance
33. Simulation study of an ultra-low specific on-resistance high-voltage pLDMOS with self-biased accumulation layer
34. LDMOS with Variable-k Dielectric for Improved Breakdown Voltage and Specific On-resistance
35. Study on Conductivity Degradation of High-k VDMOS Caused by Ferroelectricity
36. Design and Realization of a Novel Poly-Silicon Light-Emitting Device Based on Standard CMOS Technology
37. The Oppositely Doped Islands IGBT Achieving Ultralow Turn Off Loss
38. Potential of Utilizing High-$k$ Film to Improve the Cost Performance of Trench LDMOS
39. A New Carrier Stored Trench IGBT Realizing Both Ultra Low $V_{\text{on}}$ and Turn-off loss
40. Study on A Novel Trench LDMOS with Double Deep Trenches and Superjunction
41. A 600-V Super-Junction pLDMOS Utilizing Electron Current to Enhance Current Capability
42. A novel snapback-free reverse-conducting (RC) SOI-LIGBT with a built-in thyristor
43. SiC trench MOSFET with integrated side-wall Schottky barrier diode having P+ electric field shield
44. Analytical Models of Breakdown Voltage and Specific On-Resistance for Vertical GaN Unipolar Devices
45. A Trench LDMOS Improved by Quasi Vertical Super Junction and Resistive Field Plate
46. Simulation Study of a p-LDMOS With Double Electron Paths to Enhance Current Capability
47. TIGBT with emitter‐embedded gate for low turn‐on loss and low electro‐magnetic interference noise
48. A Novel IGBT With High-k Dielectric Modulation Achieving Ultralow Turn-Off Loss.
49. A high-voltage p-LDMOS with enhanced current capability comparable to double RESURF n-LDMOS
50. A TIGBT With Floating n-Well Region for High dV/dt Controllability and Low EMI Noise
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