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One of the most promising techniques for manufacturing low-cost solar cells is a solution processing method. In this study, it is proposed that solution-grown ZnO nanorods (NRs) are used as antireflection coatings on metal-insulator-semiconductor (MIS) solar cells with sol-gel SiO2. Except Al electrodes prepared by thermal evaporation, no other vacuum process was utilized during fabrication. The ZnO NRs were produced with a hydrothermal method and suppressed Fresnel reflection. With the solution-grown ZnO NRs, it was observed the average reflectance of the MIS solar cell decreased from 38.7% to 15.8%, and the short circuit density (JSC) increased from 5.22 mA/cm2 to 6.71 mA/cm2 (28.4% enhancement). Meanwhile, the open circuit voltage (VOC) was improved from 0.39 V to 0.47 V owing to a passivation effect. The MIS solar cell with the ZnO NRs exhibited a 35.5% efficiency enhancement compared to that without ZnO NRs. The performance improvement in MIS solar cells with ZnO NRs could be due to multiple reflections of an incident light between the vertically arranged NRs, and then light coupling into the cell. The results show a potential application of ZnO NRs for the performance enhancement of MIS solar cells.

In this paper, it is reported that a metal-free and non-conjugated polymer, MA-PEG 8000-BADGE (MP8B), exhibits an antireflective property and substrate-dependent photoluminescence (SDP). MP8B was constructed from maleic anhydride, poly(ethylene glycol) and bisphenol-A diglycidyl ether. Self-assembled nanoparticles are found in MP8B and can prospectively act as scattering centers to improve light trapping and extraction. MP8B films prepared from MP8B solutions have been characterized by photoluminescence (PL), atomic force microscopy (AFM), tunnelling electron microscope (TEM), reflectance, transmittance, and UV-Vis absorption spectrum. MP8B films can suppress light reflection and enhance light transmission. The PL spectrum of MP8B film on ITO peaks at approximately 538 nm, spanning from 450 to 660 nm at a concentration of 25 mM. Meanwhile, the effects of concentration and substrate on the PL of MP8B films are also investigated in this study. Surface roughness becomes larger with concentration. A red shift of the PL spectrum is observed as solution concentration increases. Meanwhile, aggregation-caused quenching (ACQ) is insignificant. Moreover, the PL spectra of MP8B films show a substrate-dependent phenomenon due to dielectric screening. The optical band-gap energy of MP8B is approximately 4.05 eV. It is concluded that MP8B is a promising candidate for a host material, and its film can be utilized as a multifunctional layer (i.e., antireflective and light-scattering functions) for optoelectronic applications.

An Al2O3 thin film is deposited on the interdigitated electrodes to fabricate a resistive hydrogen sensor. In addition, the Pd nanoparticles (NPs)/Pd film by vacuum thermal evaporation system on the Al2O3 film acts as catalytic metals for hydrogen detection. Due to the Pd NPs with an increased surface area to volume ratio as well as the spill-over effect, the catalytic activity could be improved to enhance the gas sensing performance. The experimental results showed that the sensing response ratio is 14.4% in 1000 ppm H2/air at 300 °C, which is suitable for high-temperature hydrogen detection. The studied Pd NPs/Pd/Al2O3 resistive sensor exhibits the advantages of in high-temperature operation, simple structure, easy fabrication process, and relatively low cost.

Nonconjugated polymers have been synthesized from maleic anhydride, poly(ethylene glycol), and bisphenol-diglycidyl ether without utilizing any solvent. The polymeric thin films produced by the nonconjugated polymers were spin-coated on ITO coated glass and Si substrates. Self-assembly nanoparticles (1.6–6.2 nm) are observed. It is proposed that the nanoparticle is constructed through a self-assembly process with bisphenol-A aggregates and poly(ethylene glycol) moieties. The photoluminescence spectrum of the polymeric thin film on ITO peaks at near 450 nm that spans from 360 to 610 nm under 266 nm excitation. The polymeric thin film exhibits the excitation-wavelength-dependent photoluminescence that the emission peak shifts toward longer wavelength (about 11 nm) when the excitation wavelength increases from 266 to 325 nm, which is attributed to nanoparticle size distribution. Meanwhile, the substrate-dependent photoluminescence has been also observed that the PL peak of the polymeric thin film spin-coated on Si shows a blue shift (about 9 nm) compared with that on ITO, which probably arises from the dielectric screening. The highest occupied molecular orbital energy of the polymeric thin film is about –9.4 eV. The optical band gap is about 3.28 eV. The nonconjugated polymer is expected to use as a host material in optoelectronic applications.

anhydride-poly(ethylene glycol) co-polymer (A-PEGCP) has been synthesized from maleic anhydride, poly(ethylene glycol) and bisphenol-A diglycidyl ether without using any organic solvent. The thin films produced from A-PEGCP solution were spin-coated on ITO-coated glass. The nanoparticles are observed in the thin films. It is proposed that the nanoparticle is built by a self-assembly process with bisphenol-A aggregates and poly (ethylene glycol) moieties. The effects of concentration, thermal annealing, excitation wavelength and moisture on the optical and nanostructured characterization of the thin films are investigated in this study. Photoluminescence (PL) spectrum of the thin film on ITO-coated glass has a peak of about 450 nm that extends from 360 to 550 nm under 325 nm excitation. The increase in PL intensity is accompanied by a red shift of PL spectrum as concentration increases. Moreover, the slightly red shift of PL spectrum is also observed as annealing temperature increases. Meanwhile, PL intensity negligibly decreases with annealing temperature. The degradation in PL intensity is apparent due to moisture. The excitation-wavelength dependent photoluminescence (EWDP) is observed in the thin film. UV-Vis absorption spectra of the thin films are red-shifted with concentration due to more molecular aggregation. The highest occupied molecular orbital (HOMO) energy is &minus, 9.52 eV. The optical band-gap energy is 4.09&ndash, 4.44 eV.

In this study, the characteristics of Maleic-PEGX-SR3 thin films are investigated. This thin film is expected to use as the light emitting layer of polymer light editting diode (PLED). The effect of solution concentration and annealing temperature on the properties of thin films deposited on glass are examined. Thin films are characterized by photoluminescence (PL), scanning electron microscopy (SEM), UV-vis absorption spectrum (UV-vis), and ultraviolet photoemission spectroscopy (UPS). The PL spectra of the thin films prepared by various solution concentrations on glass peak at ∼ 450 nm. The trend of a red shift in PL spectra is observed with increasing solution concentration. In addition, the PL intensity increases with increasing solution concentration is observed. Optical energy band gap (E g ) is ∼ 3.03 eV. Highest occupied molecular orbital (HOMO) is about 10.55 eV. Lowest unoccupied molecular orbital (LUMO) is about 7.52 eV.

Based on the InAlAs/InGaAs heterostructure doping-channel field-effect transistors (DCFETs), three co-integrated devices are demonstrated. After removing some material layers, the enhancement/depletion-mode devices and inverter logic were formed. The InAlAs/InGaAs co-integrated structures consist of an enhancement-mode device with single channel and two depletion-mode devices with double and triple channels, respectively. The insertion of an undoped large energy-gap layer between the metal gate and active channels can improve the gate breakdown voltage and turn-on voltage. Besides, by the studied integrated DCFETs two transfer characteristics are implemented for direct-coupled FET logic (DCFL) circuit applications as compared to the previous reports with only single logic transfer characteristic. Consequently, the integrated AlInAs/GaInAs DCFETs provide a promise for signal amplification and multiple inverter logic applications.

In this paper, the characteristics of InP/InGaAs abrupt, setback, and heterostructure-emitter heterojunction bipolar transistors (HBTs) are comparatively investigated by twodimensional simulation analysis. In the setback (heterostructure-emitter) HBT, a thin 50 A undoped In0.53Ga0.47As (n-In0.53Ga0.47As) layer is inserted between n-InP emitter and p+-InGaAs base layers to lower the energy band at emitter side for decreasing the collector-emitter offset voltage. The simulated results exhibits that the abrupt HBT has the largest current gain, the largest collector-emitter offset voltage, and the smallest unity gain cutoff frequency. While, the setback and heterostructure-emitter HBTs exhibit the smallest current gain and offcet voltage, respectively. Consequentially, the demonstration and comparison of the three-type HBTs provide a promise for design in circuit applications.

Based on the employments of an InGaP/GaAs superlattice emitter and a thin InGaAs pseudomorphic base structure, the device with excellent transistor action and multiple S-shaped negative-differential-resistance (NDR) switching behavior are achieved. Under normal transistor operation mode, the tunneling electrons could easily transport from InGaP/GaAs superlattice over the n-GaAs emitter layer into the thin InGaAs pseudomorphic base region for reducing the base–emitter turn-on voltage and promoting the current gain. In particular, an interesting multiple S-shaped NDR behavior is observed under inverted operation mode due to the avalanche multiplication and confinement effect for electrons at the interface between superlattice and emitter layer, respectively. As an appropriate voltage source and a load resistor are applied, three stable operation points are obtained.

In this paper, high device linearity and characteristics of an InGaP/GaAs/InGaAs camel-like gate delta-doped p-channel field-effect transistor is demonstrated. The energy band and hole distribution are depicted with respect to the device performance. Due to the npn depletion of the camel-like gate structure, the considerable conduction band discontinuities at n + -InGaP/p-GaAs and p-GaAs/i-In 0.15 Ga 0.85 As heterojunctions, and the good confinement effect for holes in InGaAs quantum well, a large gate turn-on voltage is achieved. The drain saturation current linearly increases with the gate voltage and the high device linearity is illustrated by fitting the drain current versus the gate voltage. The excellent performance of the studied device is promise for linear amplifiers and high-frequency circuit applications.

Carbon incorporation in strained-Si surface channel NMOSFET is investigated. Due to the ∼52% lattice mismatch between silicon and carbon, the channel is expected to have higher strain than strained-Si, indicating that the carrier mobility can be enhanced significantly. There is a ∼40% electron mobility enhancement for incorporated carbon content of 0.25% in strained-Si NMOSFETs compared to unstrained Si channels. The performance of channels with increased strain is not as high as theoretical predictions. This is due to the large Dit at the oxide/strained-Si:C interface and alloy scattering, which degrades carrier mobility enhancement.

The occurrence of the hysteresis-like breakdown (denoted by BD-H) and the minority carrier generation in MOS structures under substrate injection enhanced by the direct illumination treatment in a rapid thermal processing (RTP) are examined in this study. It is generally believed that the oxide breakdown under substrate injection is related to the oxide quality and the minority carrier generation contributed by bulk traps in Si substrate. For the breakdown behavior of MOS devices subjected by substrate injection, we find that the occurrence frequency of BD-H is more for the samples treated by the front-side heating (FH) processing than for those done by the back-side heating (BH) one in RTP. Besides, it is also observed that the gate saturation current is under the influence of the direct illumination processing. Moreover, from capacitance–voltage (C–V) measurements with various frequencies, it indicates that the generation rate of minority carriers is higher for the samples treated by FH processing than for those done by BH one. These results show that not only localized oxide traps but also Si bulk traps are much easy to be created in the direct illumination processing. It is, therefore, clear that the characteristics of MOS structures with ultra-thin oxides are influenced by the direct illumination in RTP.

The metal-oxide-semiconductor (MOS) solar cells with sol-gel derived silicon dioxides (SiO2) deposited by spin coating are proposed in this study. The sol-gel derived SiO2 layer is prepared at low temperature of 450°C. Such processes are simple and low-cost. These techniques are, therefore, useful for largescale and large-amount manufacturing in MOS solar cells. It is observed that the short-circuit current (Isc) of 2.48 mA, the open-circuit voltage (Vos) of 0.44 V, the fill factor (FF) of 0.46 and the conversion efficiency (η%) of 2.01% were obtained by means of the current-voltage (I–V) measurements under AM 1.5 (100 mW/cm2) irradiance at 25°C in the MOS solar cell with sol-gel derived SiO2.

The effect of oxide barrier shape change caused by stress-induced interface trap charges on the low-voltage tunneling current (LVTC) characteristics of ultrathin gate oxide (∼2 nm) is studied in this work. It was found that for an ultrathin gate oxide working in the direct tunneling regime, the LVTC behavior is strongly dependent on the barrier shape of the oxide. After high-field stress, anomalous LVTC phenomenon is observed. There is an invariant point existing in current–voltage curves. For a bias smaller than the value of the invariant point, the gate current decreases with stress time. However, for a bias larger than that, the gate current increases with stress time and then saturates. This phenomenon cannot be explained by conventional trap-assisted tunneling conduction, but by the change of tunneling probability due to barrier shape variation. An interface trap charge model is proposed to explain the observed invariant point mentioned above. From this, one can find the voltage corresponding to the ...

Soft breakdown properties affected by photon energy during rapid thermal post-oxidation annealing (POA) of ultra-thin gate oxide are investigated. Generally, breakdown can be classified into normal hard breakdown (HBD) and soft breakdown (SBD). It was found that the occurrence of HBD and SBD depends on the process and stress field. Samples with front and back sides illuminated by a tungsten–halogen lamp during rapid thermal POA were examined. We find that front side illuminated oxides show easier SBD than back side ones. These results indicate that the photon energy may not only enhance the strength of Si–O bonds to suppress the lateral propagation of breakdown spots, but also to localize defects to form a conductive path of the leakage current. The understanding of the photon effect in rapid thermal POA is useful for controlling the electrical properties of ultra-thin gate oxides.

It is proposed that the metal-oxide-semiconductor (MOS) solar cells with sol-gel oxides deposited by spin coating are produced in this study. This sol-gel-derived SiO 2 layer is not very thin and the deviation in the thickness of the sol-gel layer is not slight. In general, the characteristics of MOS solar cells are significantly affected by the thickness of the SiO 2 layer. Particularly, the thermal grown oxide thickness required is less than 2nm for MOS solar cell applications. It is useful for large-scale and large-amount manufacturing that the influence of nonuniformity of oxide thickness on the characteristics of MOS solar cells with sol-gel oxides is reduced. It is observed that the short-circuit current density (J sc ) of 15.56 mA/cm2, the open-circuit voltage (V oc ) of 0.49V, the fill factor (FF) of 0.723 and the conversion efficiency (η%) of 5.44% are obtained by means of the current-voltage (I-V) measurements under AM 1.5 illumination at 25°C in the MOS solar cell with sol-gel oxides.

One-transistor (1T) memory cells with long data retention time is achieved with the modulation of drain current by channel traps. For simple demonstration, poly-Si TFTs are used, and grain boundary traps induced by excimer laser annealing are used as channel traps. The channel length in this work is 6 μm and the extrapolated data retention time can be as long as ~107 s at half of the current window. With the assumption that total number of traps is proportional to device volume and leakage current is proportional to the peripheral areas, retention time is scaled with gate length. For 30 nm devices, retention time is estimated to be ≥ 5×104 s. Compared with the conventional Zero-capacitor random access memory (Z-RAM), the channel trap memory provides better retention characteristics. For practical applications, the new channel trap cell has the same gate structure as logic devices, and can be potentially embedded in SoC platform. Due to the defect tolerance of cell channel and the low-temperature process, the 3D (multi-layer) memory structure by stacking the cells vertically can be potentially implemented more easily than flashtype devices [1]. In principle, the channel traps cells can also be implemented in bulk Si and the localized channel traps can be formed in the scaled devices using implantation techniques. This paper proposes a design of 1T memory cells that utilizes the modulation of drain current by channel traps and offers these advantages: 1. capacitorless structure, 2. long data retention time, 3. excellent endurance characteristics, 4. low power consumption, 5. 3D integration compatibility.

The characteristics of oxides grown on silicon wafers under external mechanical stress were studied. It was found that the SiO2 films grown under external compressive stress had a decreased etching rate. From capacitance–voltage (C–V) measurements, it was observed that a tensile sample had a reduced interface state density, while that of a compressive sample was increased.

Thin oxide property in a metal–oxide–semiconductor structure subjected to substrate injection from semiconductor into oxide is investigated by means of ramp-up and ramp-down current–voltage (I–V) measurements. Generally, gate injection causes catastrophic dielectric breakdown, and the damaged oxide suffers from permanent destruction which exhibits resistorlike behavior in the I–V curve. For substrate injection, however, there are three distinct modes existing in I–V characteristics. They are resistorlike, hysteresislike, and saturation, i.e., no breakdown. Their occurrence frequencies are dependent on the oxide thickness. For oxides thinner than 2.4 nm, in general, the gate current nearly saturates due to the limitation of minority carriers. For 3.9 nm oxide, the minority carrier generation rate increases due to trap generation near the Si surface. Thus the oxide sustains higher field and larger carrier injection causing destructive damage, i.e., resistorlike mode. For 3 nm oxide, sometimes a hysteresislike mode appears due to light damage in the oxide. The related characteristics of these three modes are studied and exhibit oxide thickness dependence. These phenomena are important to recent studies on devices with ultrathin gate oxides.