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This roadmap consolidates recent advances while exploring emerging applications, reflecting the remarkable diversity of hardware platforms, neuromorphic concepts, and implementation philosophies reported in the field. It emphasizes the critical role of cross-disciplinary collaboration in this rapidly evolving field.

Inverse design (ID) is a computational method that systematically explores a design space to find optimal device geometries based on specific performance criteria. In silicon photonics, ID often leads to devices with design features that degrade significantly due to the fabrication process, limiting the applicability of these devices in scalable silicon photonic fabrication. We demonstrate a solution to this performance degradation through fabrication-aware inverse design (FAID), integrating lithography models for deep-ultraviolet (DUV) lithography and electron beam lithography (EBL) into the shape optimization approach of ID. A Y-branch and an SWG-to-strip converter were generated and fabricated with this new approach. Simulated and measured results verify that the FAID yields devices with up to 0.6 dB lower insertion loss per device. The modified workflow enables designers to use ID to generate devices that adjust for process bias predicted by lithography models., Comment: 4 pages

Decentralized diagnostic testing that is accurate, portable, quantitative, and capable of making multiple simultaneous measurements of different biomarkers at the point-of-need remains an important unmet need in the post-pandemic world. Resonator-based biosensors using silicon photonic integrated circuits are a promising technology to meet this need, as they can leverage (1) semiconductor manufacturing economies of scale, (2) exquisite optical sensitivity, and (3) the ability to integrate tens to hundreds of sensors on a millimeter-scale photonic chip. However, their application to decentralized testing has historically been limited by the expensive, bulky tunable lasers and alignment optics required for their readout. In this work, we introduce a segmented sensor architecture that addresses this important challenge by facilitating resonance-tracking readout using a fixed-wavelength laser. The architecture incorporates an in-resonator phase shifter modulated by CMOS drivers to periodically sweep and acquire the resonance peak shifts as well as a distinct high-sensitivity sensing region, maintaining high performance at a fraction of the cost and size. We show, for the first time, that fixed-wavelength sensor readout can offer similar performance to traditional tunable laser readout, demonstrating a system limit of detection of 6.1 x 10-5 RIU as well as immunoassay-based detection of the SARS-CoV-2 spike protein. We anticipate that this sensor architecture will open the door to a new data-rich class of portable, accurate, multiplexed diagnostics for decentralized testing.

Superconducting nanowire single-photon detectors are widely used for detecting individual photons across various wavelengths from ultraviolet to near-infrared range. Recently, there has been increasing interest in enhancing their sensitivity to single photons in the mid-infrared spectrum, driven by applications in quantum communication, spectroscopy and astrophysics. Here, we present our efforts to expand the spectral detection capabilities of U-shaped NbTiN-based superconducting nanowire single-photon detectors, fabricated in a 2-wire configuration on a silicon-on-insulator substrate, into the mid-infrared range. We demonstrate saturated internal detection efficiency extending up to a wavelength of 3.5 {\mu}m for a 5 nm thick and 50 nm wide NbTiN nanowire with a dark count rate less than 10 counts per second at 0.9 K and a rapid recovery time of 4.3 ns. The detectors are engineered for integration on waveguides in a silicon-on-insulator platform for compact, multi-channel device applications., Comment: 5 figures, 7 pages

Organic electro-optic materials have demonstrated promising performance in developing electro-optic phase shifters. Their integration with other silicon photonic processes, nanofabrication complexities, and durability remains to be developed. While the required poling step in electro-optic polymers limits their potential and utilization on a large scale, devices made of paraelectric nematic liquid crystals suffer from slow bandwidth. In ferroelectric nematic liquid crystals, we report an additional GHz-fast phase shift that ultimately allows for significant second-order nonlinear optical coefficients related to the Pockels effect. It avoids poling issues and can pave the way for hybrid silicon-organic systems with CMOS-foundry compatibility. We report DC and AC modulation efficiencies of $\approx$~0.25 V$\cdot$mm (from liquid crystal orientation) and $\approx$~25.7 V$\cdot$mm (from Pockels effect), respectively, an on-chip insertion loss of $\approx$~2.6 dB, and an electro-optic bandwidth of $f_\text{-6dB}$>4.18 GHz, employing improved light-matter interaction in a waveguide architecture that calls for only one lithography step., Comment: 25 pages, 5 figures

We present a method to model photonic components in Verilog-A by introducing bidirectional signaling through a single port. To achieve this, the concept of power waves and scattering parameters from electromagnetism are employed. As a consequence, one can simultaneously transmit forward and backward propagating waves on a single wire while also capturing realistic, measurement-backed response of photonic components in Verilog-A. We demonstrate examples to show the efficacy of the proposed technique in accounting for critical effects in photonic integrated circuits such as Fabry-Perot cavity resonance, reflections to lasers, etc. Our solution makes electronic-photonic co-simulation more intuitive and accurate.

Artificial intelligence (AI) has seen remarkable advancements across various domains, including natural language processing, computer vision, autonomous vehicles, and biology. However, the rapid expansion of AI technologies has escalated the demand for more powerful computing resources. As digital computing approaches fundamental limits, neuromorphic photonics emerges as a promising platform to complement existing digital systems. In neuromorphic photonic computing, photonic devices are controlled using analog signals. This necessitates the use of digital-to-analog converters (DAC) and analog-to-digital converters (ADC) for interfacing with these devices during inference and training. However, data movement between memory and these converters in conventional von Neumann computing architectures consumes energy. To address this, analog memory co-located with photonic computing devices is proposed. This approach aims to reduce the reliance on DACs and ADCs and minimize data movement to enhance compute efficiency. This paper demonstrates a monolithically integrated neuromorphic photonic circuit with co-located capacitive analog memory and compares various analog memory technologies for neuromorphic photonic computing using the MNIST dataset as a benchmark., Comment: 23 pages, 10 figures

The continuous growth in data volume has sparked interest in silicon-organic-hybrid nanophotonic devices integrated into silicon photonic integrated circuits (PICs). SOH devices offer improved speed and energy efficiency compared to silicon photonics devices. However, a comprehensive and accurate modeling methodology of SOH devices is lacking. While some preliminary modeling approaches for SOH devices exist, their reliance on theoretical and numerical methodologies, along with a lack of compatibility with electronic design automation (EDA), hinders their seamless and rapid integration with silicon PICs. Here, we develop a phenomenological, building-block-based SOH PICs simulation methodology spanning from the physics to the system level, offering high accuracy, comprehensiveness, and EDA-style compatibility. Our model is also readily integrable and scalable, lending itself to the design of large-scale silicon PICs. Our proposed modeling methodology is agnostic and compatible with any photonics-electronics co-simulation software. We validate this methodology by comparing experimentally demonstrated SOH microring modulators and Mach Zehnder modulators with those obtained through simulation, demonstrating its ability to model various modulator topologies. We also show our methodology's ease and speed in modeling large-scale systems. As an illustrative example, we use our methodology to design and study a 3-channel SOH MRM-based wavelength-division (de)multiplexer, a widely used component in various applications, including neuromorphic computing, data center interconnects, communications, and sensing. Our modeling approach is compatible with other materials exhibiting the Pockels and Kerr effects. To our knowledge, this represents the first comprehensive physics-to-system-level EDA-compatible simulation methodology for SOH modulators., Comment: 15 pages, 7 figures

A new cryogenic packaging methodology that is widely applicable to packaging any integrated photonics circuit for operation at both room temperature and cryogenic temperature is reported. The method requires only equipment and techniques available in any integrated optics lab and works on standard integrated photonic chips. Our methodology is then used to enable the measurement of a single photon pair sourced based on a silicon ring resonator at cryogenic temperatures. When operating at 5.9 K, this source is measured to have a peak pair generation rate 183 times greater then at room temperature in the CL-band.

Photonics offers a transformative approach to artificial intelligence (AI) and neuromorphic computing by enabling low-latency, high-speed, and energy-efficient computations. However, conventional photonic tensor cores face significant challenges in constructing large-scale photonic neuromorphic networks. Here, we propose a fully integrated photonic tensor core, consisting of only two thin-film lithium niobate (TFLN) modulators, a III-V laser, and a charge-integration photoreceiver. Despite its simple architecture, it is capable of implementing an entire layer of a neural network with a computational speed of 120 GOPS, while also allowing flexible adjustment of the number of inputs (fan-in) and outputs (fan-out). Our tensor core supports rapid in-situ training with a weight update speed of 60 GHz. Furthermore, it successfully classifies (supervised learning) and clusters (unsupervised learning) 112 * 112-pixel images through in-situ training. To enable in-situ training for clustering AI tasks, we offer a solution for performing multiplications between two negative numbers., Comment: 21 pages, 6 figures

We present a new fab-in-the-loop reinforcement learning algorithm for the design of nano-photonic components that accounts for the imperfections present in nanofabrication processes. As a demonstration of the potential of this technique, we apply it to the design of photonic crystal grating couplers fabricated on an air clad 220 nm silicon on insulator single etch platform. This fab-in-the-loop algorithm improves the insertion loss from 8.8 to 3.24 dB. The widest bandwidth designs produced using our fab-in-the-loop algorithm can cover a 150 nm bandwidth with less than 10.2 dB of loss at their lowest point., Comment: Published version: 9 pages, 12 figures

We present the required techniques for the successful low loss packaging of integrated photonic devices capable of operating down to 970 mK utilizing photonic wire bonds. This scalable technique is shown to have an insertion loss of less than 2 dB per connection between a SMF-28 single mode fibre and a silicon photonic chip at these temperatures. This technique has shown robustness to thermal cycling and is ultra-high vacuum compatible without the need for any active alignment.

Silicon photonics has developed into a mainstream technology driven by advances in optical communications. The current generation has led to a proliferation of integrated photonic devices from thousands to millions - mainly in the form of communication transceivers for data centers. Products in many exciting applications, such as sensing and computing, are around the corner. What will it take to increase the proliferation of silicon photonics from millions to billions of units shipped? What will the next generation of silicon photonics look like? What are the common threads in the integration and fabrication bottlenecks that silicon photonic applications face, and which emerging technologies can solve them? This perspective article is an attempt to answer such questions. We chart the generational trends in silicon photonics technology, drawing parallels from the generational definitions of CMOS technology. We identify the crucial challenges that must be solved to make giant strides in CMOS-foundry-compatible devices, circuits, integration, and packaging. We identify challenges critical to the next generation of systems and applications - in communication, signal processing, and sensing. By identifying and summarizing such challenges and opportunities, we aim to stimulate further research on devices, circuits, and systems for the silicon photonics ecosystem.

High quality n-type AlGaAs distributed Bragg reflectors (DBRs) and lnGaAs multiple quantum wells were successfully monolithically grown on 4-inch off-cut Ge (100) wafers. The grown structures have photoluminescence spectra and reflectance spectra comparable to those grown on conventional bulk GaAs wafers and have smooth morphology and reasonable uniformity. These results strongly support full VCSEL growth and fabrication on larger-area bulk Ge substrates for the mass production of AlGaAs-based VCSELs., Comment: arXiv admin note: text overlap with arXiv:2201.04937

We report the fabrication of monolithically integrated 940 nm AlGaAs distributed Bragg reflectors (DBRs) on graded GaAsP/Si substrates. Low-density surface bumps and cross-hatch patterns were observed on the DBR surfaces. Cross-sectional DBR layers are smooth and flat. The reflectance spectra of the GaAsP/Si DBRs have lower intensities than the GaAs DBRs and have double peaks. Transfer matrix method calculations, surface scratch and polishing tests were conducted, which suggest that the surface cross-hatch was the cause of the inferior DBR reflectance spectra.

An ultra-narrow slot waveguide is fabricated for use in highly-efficient, electro-optic-polymer-based, integrated-optic modulators. Measurement results indicate that $V_\pi L$'s below 1.2 V.mm are possible for balanced Mach-Zehnder modulators using this ultra-narrow slot waveguide on a silicon-organic hybrid platform. Simulated $V_\pi L$'s of 0.35 V.mm have also been obtained. In addition to adapting standard recipes, we developed two novel fabrication processes for achieving miniaturized devices with high modulation sensitivity. To boost compactness and decrease the overall footprint, we use a fabrication approach based on air bridge interconnects on thick, thermally-reflowed, MaN 2410 E-beam resist protected by an alumina layer. To overcome the challenges of high currents and imperfect infiltration of polymers into ultra-narrow slots, we use a carefully designed, atomically-thin layer of TiO$_2$ as a carrier-barrier to enhance the polling efficiency of our electro-optic polymers. Additionally, finite-difference time-domain simulations are employed to optimize the effect of the thin layer of TiO$_2$. As compared to other, non-optimized, cases, our peak measured current is reduced by a factor of 3; scanning electron microscopy images also demonstrate that we achieve almost perfect infiltration. The anticipated increase in total capacitance due to the TiO$_2$ layer is shown to be negligible. In fact, applying our TiO$_2$ surface treatment to our ultra-narrow slot, allows us to obtain an improved phase shift efficiency ($\partial n / \partial V$) of $\sim$94% for a 10 nm TiO$_2$ layer., Comment: 16 pages, 13 figures, Optics Express

High quality 940 nm Al$_x$Ga$_{1-x}$As n-type distributed Bragg reflectors (DBRs) were successfully monolithically grown on off-cut Ge (100) substrates. The Ge-DBRs have reflectivity spectra comparable to those grown on conventional bulk GaAs substrates and have smooth morphology, reasonable periodicity and uniformity. These results strongly support VCSEL growth and fabrication on more scalable bulk Ge substrates for large scale production of AlGaAs-based VCSELs.

Neural networks have enabled applications in artificial intelligence through machine learning, and neuromorphic computing. Software implementations of neural networks on conventional computers that have separate memory and processor (and that operate sequentially) are limited in speed and energy efficiency. Neuromorphic engineering aims to build processors in which hardware mimics neurons and synapses in the brain for distributed and parallel processing. Neuromorphic engineering enabled by photonics (optical physics) can offer sub-nanosecond latencies and high bandwidth with low energies to extend the domain of artificial intelligence and neuromorphic computing applications to machine learning acceleration, nonlinear programming, intelligent signal processing, etc. Photonic neural networks have been demonstrated on integrated platforms and free-space optics depending on the class of applications being targeted. Here, we discuss the prospects and demonstrated applications of these photonic neural networks.

A multitude of large-scale silicon photonic systems based on ring resonators have been envisioned for applications ranging from biomedical sensing to quantum computing and machine learning. Yet, due to the lack of a scalable solution for controlling ring resonators, practical demonstrations have been limited to systems with only a few rings. Here, we demonstrate that large systems can be controlled by using only doped waveguide elements inside their ringswhile preserving their area and cost. We measure the large photoconductive changes of the waveguides for monitoring the rings' resonance conditions across high-dynamic ranges and leverage their thermo-optic effects for tuning. This allows us to control ring resonators without requiring additional components, complex tuning algorithms, or additional electrical I/Os. We demonstrate automatic resonance alignment of 31 rings of a 16 x 16 switch and of a 14-ring coupled resonator optical waveguide, making them the largest, yet most compact, automatically controlled silicon ring resonator circuits to date, to the best of our knowledge., Comment: 11 pages, 7 figures. Submitted to Optica on 24th Aug. 2018

Ultra-compact, densely integrated optical components manufactured on a CMOS-foundry platform are highly desirable for optical information processing and electronic-photonic co-integration. However, the large spatial extent of evanescent waves arising from nanoscale confinement, ubiquitous in silicon photonic devices, causes significant cross-talk and scattering loss. Here, we demonstrate that anisotropic all-dielectric metamaterials open a new degree of freedom in total internal reflection to shorten the decay length of evanescent waves. We experimentally show the reduction of cross-talk by greater than 30 times and the bending loss by greater than 3 times in densely integrated, ultra-compact photonic circuit blocks. Our prototype all-dielectric metamaterial-waveguide achieves a low propagation loss of approximately 3.7 dB/cm, comparable to those of silicon strip waveguides. Our approach marks a departure from interference-based confinement as in photonic crystals or slot waveguides, which utilize nanoscale field enhancement. Its ability to suppress evanescent waves without substantially increasing the propagation loss shall pave the way for all-dielectric metamaterial-based dense integration.

Side and top silicon nitride stressors were proposed and shown to be effective ways to reduce the threshold current Ith and improve the wall-plug efficiency {\eta}wp of Ge-on-Si lasers. Side stressors only turned out to be a more efficient way to increase {\eta}wp than using top and side stressors together. With the side stressors only and geometry optimizations, a {\eta}wp of 30.5% and an Ith of 50 mA (Jth of 37 kA/cm2) can be achieved with the defect limited carrier lifetime of 1 nsec. With the defect limited carrier lifetime of 10 nsec, an Ith of 7.8 mA (Jth of 5.8 kA/cm2) and a wall-plug efficiency of 38.7% can be achieved. These are tremendous improvements from the case without any stressors. These results give strong support to the Ge-on-Si laser technology and provide an effective way to improve the Ge laser performance.

A recent computational result suggests that highly confined modes can be realized by all-dielectric metamaterials (S. Jahani et. al., Optica 1, 96 (2014)). This substantially decreases crosstalk between dielectric waveguides, paving the way for high-density photonic circuits. Here, we experimentally demonstrate, on a standard silicon-on-insulator (SOI) platform, that using a simple metamaterial between two silicon strip waveguides results in about a 10-fold increase in coupling length. The proposed structure may lead to significant reduction in the size of devices in silicon photonics.

High quality AlxGa1-xAs distributed Bragg reflectors (DBRs) were successfully monolithically grown on on-axis Si (100) substrates via a Ge layer formed by aspect ratio trapping (ART) technique. The GaAs/ART-Ge/Si-based DBRs have reflectivity spectra comparable to those grown on conventional bulk off-cut GaAs substrates and have smooth morphology, and good periodicity and uniformity. Anitphase domain formation is significantly reduced in GaAs on ART-Ge/Si substrates, and etch pit density of the GaAs base layer on the ART-Ge substrates ranges from 10^5 to 6 x 10^6 cm^(-2). These results paved the way for future VCSEL growth and fabrication on these ART-Ge substrates and also confirm that virtual Ge substrates via ART technique are effective Si platforms for optoelectronic integrated circuits.

Using in-resonator photoconductive heaters to both sense and control the intra-cavity light intensity of microring resonators, automatic tuning of a silicon-on-insulator two-ring Vernier filter is demonstrated across the entire C-band., Comment: 2 pages, 3 figures, submitted to Optical Fiber Communication Conference and Exposition (OFC) 2016, paper Th3J.5

Physical models of Ge energy band structure and material loss were implemented in LASTIP(TM), a 2D simulation tool for edge emitting laser diodes. The model calculation is able to match experimental data available. Important design parameters of a Fabry-Perot Ge laser, such as the cavity length, thickness, width, polycrystalline Si cladding layer thickness were studied and optimized. The laser structure optimizations alone were shown to reduce Ith by 22-fold and increase the differential efficiency by 11 times. The simulations also showed that improving the defect limited carrier lifetime is critical for achieving an efficient and low-threshold Ge laser. With the optimized structure design (300 micron for the cavity length, 0.4 micron for the cavity width, 0.3 micron for the cavity thickness, and 0.6 micron for the polycrystalline Si cladding layer thickness) and a defect limited carrier lifetime of 100 ns, a wall-plug efficiency of 14.6% at 1mW output is predicted, where Jth of 2.8 kA/cm2, Ith of 3.3 mA, I_1mA of 9 mA, and differential efficiency of 23.6% can also be achieved. These are tremendous improvements from the available experimental values at 280 kA/cm2, 756 mA, 837 mA and 1.9%, respectively., Comment: 12 pages, 9 figures

We demonstrate that n-doped resistive heaters in silicon waveguides show photoconductive effects with high responsivities. These photoconductive heaters, integrated into microring resonator (MRR)-based filters, were used to automatically tune and stabilize the filter's resonance wavelength to the input laser's wavelength. This is achieved without requiring dedicated defect implantations, additional material depositions, dedicated photodetectors, or optical power tap-outs. Automatic wavelength stabilization of first-order MRR and second-order series-coupled MRR filters is experimentally demonstrated. Open eye diagrams were obtained for data transmission at 12.5 Gb/s while the temperature was varied by 5 C at a rate of 0.28 C/s. We theoretically show that series-coupled MRR-based filters of any order can be automatically tuned by using photoconductive heaters to monitor the light intensity in each MRR, and sequentially aligning the resonance of each MRR to the laser's wavelength.

A multiple quantum well (MQW) transistor vertical-cavity surface-emitting laser (T-VCSEL) is designed and numerically modeled. The important physical models and parameters are discussed and validated by modeling a conventional VCSEL and comparing the results with the experiment. The quantum capture/escape process is simulated using the quantum-trap model and shows a significant effect on the electrical output of the T-VCSEL. The parameters extracted from the numerical simulation are imported into the analytic modeling to predict the frequency response and simulate the large-signal modulation up to 40 Gbps.