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Hysteretic control provides unique advantages in dc–dc converter applications but it is less popular than other types of control because the switching frequency depends on the operating point, the feedback ripple, and the component parasitics. Furthermore, it is difficult to predict the frequency due to the complex interaction of those factors. This paper proposes harmonic balance analysis to systematically determine the switching frequency of the buck and boost-like converters with hysteretic current control, and extends the method to buck converters with hysteretic voltage control. The analysis includes the most important second-order effects (feedback ripple, component parasitics, a second output capacitor, and switching delays). For the less complex cases the switching frequency is expressed in closed form, and for the more complex cases the paper proposes a graphical solution. The predictions are verified by simulations and, for the buck converter with hysteretic current control, by experiments. The derived results are useful for designing a converter with predictable switching frequency, and can also be employed during the design process of a converter with synchronized or stabilized frequency. Given an arbitrary control scheme or circuit variation, the switching frequency can be readily obtained by following the proposed approach.

Closed-form subharmonic oscillation conditions are derived and experimentally verified for the current-controlled boost converter in continuous conduction mode with closed voltage feedback loop. Typical voltage-loop phase-lag and type-II compensators are analyzed. The well-known open-voltage-loop instability condition becomes a special case. It is found that, unlike in the buck converter, the ripple at the output of the compensator can improve the stability. The analysis is extended to other boost-like converters with pulsating output currents, such as buck-boost, flyback, and SEPIC converters.

General closed-form subharmonic oscillation conditions are obtained for ${\rm V}^2$ -controlled buck converters. Both constant switching period and constant on-time operations are analyzed with the outer voltage loop closed or open. Once an arbitrary linear feedback is given, the associated closed-form stability condition of the converter is readily obtained. Past research results based on the describing function technique and the Floquet theory become special cases. This paper provides an alternative and easier method to analyze subharmonic instability.

This paper presents the derivation and experimental verification of the closed-form subharmonic instability condition of the constant-frequency peak-current-controlled buck converter with closed voltage feedback loop. The well-known open-voltage-loop instability condition becomes a special case. The instability limits in the converter parameter space are readily obtained from the result. It is found that closing the voltage feedback loop tends to degrade the stability margin. One can clearly see the effects of all converter parameters (such as the pole, zero, and gain of the voltage-loop compensator, the equivalent series resistance of the output capacitor, the presence of a second output capacitor, and the switch turn-off delay) on the instability.

A general closed-form subharmonic stability condition is derived for the buck converter with ripple-based constant on-time control and a feedback filter. The turn-on delay is included in the analysis. Three types of filters are considered: low-pass filter (LPF), phase-boost filter (PBF), and inductor current feedback (ICF) which changes the feedback loop frequency response like a filter. With the LPF, the stability region is reduced. With the PBF or ICF, the stability region is enlarged. Stability conditions are determined both for the case of a single output capacitor and for the case of two parallel-connected output capacitors having widely different time constants. The past research results related to the feedback filters become special cases. All theoretical predictions are verified by experiments.

This paper is an extension of the author's recent research in which only buck converters were analyzed. Similar analysis can be equally applied to other types of converters. In this paper, a unified model is proposed for buck, boost, and buck-boost converters under peak or average current mode control to predict the occurrence of subharmonic oscillation. Based on the unified model, the associated stability conditions are derived in closed forms. The same stability condition can be applied to buck, boost, and buck-boost converters. Based on the closed-form conditions, the effects of various converter parameters including the compensator poles and zeros on the stability can be clearly seen, and these parameters can be consolidated into a few ones. High-order compensators such as type-II and PI compensators are considered. Some new plots are also proposed for design purpose to avoid the instability. The instability is found to be associated with large crossover frequency. A conservative stability condition, agreed with the past research, is derived. The effect of the voltage loop ripple on the instability is also analyzed.

Sampled-data analysis and harmonic balance analysis are applied to analyze switching DC-DC converters under constant on-time control. Design-oriented boundary conditions for the period-doubling bifurcation and the saddle-node bifurcation are derived. The required ramp slope to avoid the bifurcations and the assigned pole locations associated with the ramp are also derived. The derived boundary conditions are more general and accurate than those recently obtained. Those recently obtained boundary conditions become special cases under the general modeling approach presented in this paper. Different analyses give different perspectives on the system dynamics and complement each other. Under the sampled-data analysis, the boundary conditions are expressed in terms of signal slopes and the ramp slope. Under the harmonic balance analysis, the boundary conditions are expressed in terms of signal harmonics. The derived boundary conditions are useful for a designer to design a converter to avoid the occurrence of the period-doubling bifurcation and the saddle-node bifurcation.

Although existence of multiple periodic orbits in some DC–DC converters have been known for decades, linking the multiple periodic orbits with the saddle-node bifurcation (SNB) is rarely reported. The SNB occurs in popular DC–DC converters, but it is generally reported as a strange instability. Recently, design-oriented instability critical conditions are of great interest. In this article, average, sampled-data and harmonic balance analyses are applied and they lead to equivalent results. Many new critical conditions are derived. They facilitate future research on the instability associated with multiple periodic orbits, sudden voltage jumps or disappearances of periodic orbits observed in DC–DC converters. The effects of various converter parameters on the instability can be readily seen from the derived critical conditions. New Nyquist-like plots are also proposed to predict or prevent the occurrence of the instability.

Three types of bifurcations (instabilities) in the PWM DC–DC converter at light loading under current mode control in continuous-conduction mode (CCM) or discontinuous-conduction mode (DCM) are analysed: saddle-node bifurcation (SNB) in CCM or DCM, border-collision bifurcation during the CCM–DCM transition, and period-doubling bifurcation in CCM. Different bifurcations occur in some particular loading ranges. Bifurcation boundary conditions separating stable regions from unstable regions in the parametric space are derived. A new methodology to analyse the SNB in the buck converter based on the peak inductor current is proposed. The same methodology is applied to analyse the other types of bifurcations and converters. In the buck converter, multiple stable/unstable CCM/DCM steady-state solutions may coexist. Possibility of multiple solutions deserves careful study, because an ignored solution may merge with a desired stable solution and make both disappear. Understanding of SNB can explain some sudden dis...

Critical conditions of period-doubling bifurcation and saddle-node bifurcation are derived for a class of switched linear systems. They can be applied to other similar hybrid, Filippov, or piecewise-smooth systems. Such switched linear systems are common in DC-DC converters. Those previously known critical conditions in the past research become special cases in the generalized framework. Given an arbitrary control scheme, a systematic procedure is proposed to derive the critical condition, which shows the stable range of a system parameter and the minimum stabilizing ramp slope. Two different systems with similar loop gains at high frequency have similar forms of critical conditions. The effect of switching delay is also analyzed.

Occurrence or non-occurrence of saddle-node bifurcation in a buck converter with constant current load under current or voltage mode control is analyzed. The bifurcation critical conditions are derived. The required compensating ramp slope to avoid the bifurcation is also derived. The derived condition is useful to design a stable buck converter as a light emitting diode (LED) driver to avoid the bifurcation. The bifurcation occurs only in some control schemes. When the control scheme makes the converter operate like a current source, the bifurcation occurs. When the control scheme makes the converter operate like a voltage source, the bifurcation does not occur.

SUMMARY Exact and approximate sampled-data models in closed forms are derived for switching DC–DC converters under peak/valley current-mode control. The corresponding sampled-data poles and zeros in closed forms are also derived. The location and stability conditions of the poles and zeros, boundary conditions of subharmonic instability, and nulling of the audio-susceptibility are also derived. It is proved that the stable operating range of the source voltage is linearly proportional to the ramp slope. The sampled-data models agree with previous experiment results and accurately predict the subharmonic instability. The different view from the sampled-data model about the number and stability (minimum phase) of pole and zero does not necessarily invalidate the traditional continuous-time averaged model. However, this different view gives better prediction about converter dynamics and is useful for the analog or digital controller design for DC–DC converters. Copyright © 2011 John Wiley & Sons, Ltd.

A 1-D discrete-time model is used to analyze the buck converter in discontinuous conduction mode. Both the buck converter power stage and the buck converter under current mode control are analyzed in a unified way. The effects of adding current control or a compensating ramp can be clearly seen. Conditions for multiple or zero steady-state solutions are obtained. A different instability reported previously is explained by the saddle-node bifurcation. Adding the compensating ramp into the current loop may be ineffective, because the instability is due to the dynamics of capacitor voltage, not the inductor current, and the saddle-node bifurcation is different from the period-doubling bifurcation.

Local feedback stabilization of limit cycles in PWM DC-DC converters isconsidered, using recently developed general sampled-data models. Thepaper focuses on converters for which the nominal operating conditionhas lost stability due to off-design operation. The results apply tostabilization of the nominal periodic operating condition. In addition,the same approach can be used to stabilize other limit cycles such asthose embedded in a possible chaotic trajectory. Two feedbackstabilization schemes are proposed and studied in detail. The firststabilization technique uses voltage reference compensation and thesecond uses dynamic ramp compensation. Both employ discrete-time washoutfilters to ensure preservation of the size and shape of the limit cycle.Washout filters ensure that the nominal operating branch is unaffectedby the control, without the need for accurate knowledge of the limitcycle.

The power stage of the PWM DC–DC converter is modelled and analysed using the sampled-data approach. The work addresses both continuous and discontinuous conduction mode under voltage mode control, and continuous conduction mode under current mode control. For each configuration, nonlinear and linearized sampled-data models, and control-to-output transfer functions are derived. Using this approach, both current mode control and discontinuous conduction mode can be handled systematically in a unified framework, making the modelling for these cases simpler than with the use of averaging. The results of this paper are similar to results of Tymerski, but they are presented in a simpler manner tailored to facilitate immediate application to specific circuits. It is shown how sampling the output at certain instants improves the obtained phase response. Frequency responses obtained from the sampled-data model are more accurate than those obtained from various averaged models. In addition, a new (‘lifted’) contin...

A recent paper proposed I 2 average-current control with constant switching period (CSP) or constant on-time (COT) operation in continuous conduction mcontinuous conduction modeode (CCM). The small-signal analysis was presented, but only for the COT case. No instability or its condition was reported. In this note, unified subharmonic oscillation conditions are derived for both CSP and COT buck converters. The effects of feedback gain, turn-off delay, and stabilizing ramp slope are considered. The results can be extended to other converters or control schemes.

Feedback stabilization of the nominal periodic operating condition of PWM DC-DC converters is considered, using recently developed general sampled-data models. Two types of discrete-time washout filter aided feedback stabilization scheme are proposed and studied in detail. These are voltage reference compensation and dynamic ramp compensation. The stabilization schemes preserve the nominal periodic operating condition through washout filters as the system parameters vary.

Poles and zeros for sampled-data models of buck and boost converters are analytically derived. Both continuous conduction mode and discontinuous conduction mode are considered. The sampled-data model is compared with the averaged model. The two models have different number and location of poles and zeros. The different view from the sampled-data model does not necessarily invalidate the averaged model.

Period doubling bifurcation in buck converters is studied by using the exact harmonic balance method. A simple dynamic model of a buck converter under voltage mode or current mode control is proposed. A period doubling bifurcation condition is obtained. A feedforward control is designed to eliminate the bifurcation. This results in a wider range of allowed source voltage, and also in improved line regulation.

A general sampled-data model of PWM DC-DC converters 1, 2 is employed to study types of loss of stability of the nominal (periodic) operating condition and their connection with local bifurcations. In this work, the nominal solution's periodic nature is accounted for via the sampled-data model. This results in more accurate predictions of instability and bifurcation than can be obtained using the averaging approach. The local bifurcations of the nominal operating condition studied here are period-doubling bifurcation, saddle-node bifurcation, and Neimark bifurcation. Examples of bifurcations associated with instabilities in PWM DC-DC converters are given. In particular, input filter instability is shown to be closely related to the Neimark bifurcation.

The PWM DC-DC converter in continuous conduction mode under hysteretic control is modeled and analyzed using the sampled-data approach. This work complements other recent work of the authors on sampled-data modeling and analysis of PWM converters, where the focus was on fixed switching frequency operation. Nonlinear and linearized sampled-data models, and the control-to-output transfer function are derived. The analysis is exact if the source and reference signals are constant (or constant within each cycle).

The power stage of the PWM DC-DC converter is modeled and analyzed using the sampled data approach. This work complements the companion paper 1 which develops sampled-data models and analysis for the closed-loop converter. Separate models for the power stage are essential for controller design. The work addresses continuous and discontinuous conduction mode under voltage mode control, and continuous conduction mode under current mode control. For each configuration, nonlinear and linearized sampled-data models, and control-to-output transfer function are derived. Use of these models for controller design is illustrated. In addition, a new continuous-time switching frequency-dependent model of the power stage is derived from the sampled-data model. Examples illustrate the increased accuracy of control design using the new power stage models.