712 results on '"Circuit design -- Research"'
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2. New Computer Science Study Results Reported from Tamil Nadu (Enhancing high-speed digital systems: MVL circuit design with CNTFET and RRAM)
3. Reports Summarize Information Technology Study Results from University of Kurdistan (Deep Transfer Learning Approach for Digital Circuits Vulnerability Analysis)
4. Study Findings from Technical University of Denmark (DTU) Update Knowledge in Electronics Research (Systematic Design of a Pseudodifferential VCO Using Monomial Fitting)
5. Findings from Fuzhou University Update Knowledge of Electronics (Triboelectric Nanogenerator Module for Circuit Design and Simulation)
6. Studies from School of Electrical Engineering in the Area of Dementia Reported (Wearable Bead-based Triboelectric Nanogenerator With Dual-mode Operation for Monitoring Abnormal Behavior In Dementia Patients)
7. PSG College of Technology Researchers Broaden Understanding of Information and Data Encoding and Encryption (Compact Quantum Circuit Design of PUFFIN and PRINT Lightweight Ciphers for Quantum Key Recovery Attack)
8. New Gene Editing Study Findings Have Been Reported by Researchers at Lomonosov Moscow State University (From DNA-protein interactions to the genetic circuit design using CRISPR-dCas systems)
9. Department of ECE Details Findings in Nanosheets (Design and Analysis of Gate Stack Silicon-on-insulator Nanosheet Fet for Low Power Applications)
10. Toward more efficient computing, with magnetic waves
11. Cheap as chips; Throwaway technology
12. Research Results from Stanford University Update Knowledge of Biodesign (Genetic Circuit Design in Rhizobacteria)
13. New Information Technology Study Findings Recently Were Reported by Researchers at Waseda University (Hardware-trojan Detection Based On the Structural Features of Trojan Circuits Using Random Forests)
14. Studies from Jadavpur University Update Current Data on Information and Data Processing (Quadruple Half Adder and Half Subtractor Design Using Slm and Savart Plate)
15. Tunable SEU-tolerant latch
16. Joint redundant residue number systems and module isolaiton for mitigating single event multiple bit upsets in datapath
17. New circuit topology for fault tolerant H-bridge DC-DC converter
18. Four-dimensional address topology for circuits with stacked multilayer crossbar arrays
19. Computer aided modelling of an interdigitated microelectrode array impedance biosensor for the detection of bacteria
20. Assembly configurations of spatial single-loop single-DOF mechanisms
21. Design of reconfigurable and robust integrated SC power converter for self-powered energy-efficient devices
22. Selecting profitable custom instructions for area-time-efficient realization on reconfigurable architectures
23. Kalman-filter-based sensor integration of variable power assist control based on human stiffness estimation
24. High-throughput H.264/AVC high-profile CABAC decoder for HDTV applications
25. Variable structure modeling and design of switched-capacitor converters
26. A level-crossing analog-to-digital converter with triangular dither
27. On Hamming product codes with type-II hybrid ARQ for on-Chip interconnects
28. Robust stabilization of complex switched networks with parametric uncertainties and delays via impulsive control
29. FIR, Allpass, and IIR variable fractional delay digital filter design
30. High-performance special function unit for programmable 3-D graphics processors
31. Optimization of driver preemphasis for on-chip interconnects
32. A new algorithm for high-speed modular multiplication design
33. Improved feedback theory
34. Design of a flexible reactivation cell for safe power-mode transition in power-gated circuits
35. A universal VLSI architecture for Reed--Solomon error-and-erasure decoders
36. Processor speed control with thermal constraints
37. Baseband superregenerative amplification
38. Delta--sigma A/D conversion via time-mode signal processing
39. A high-gain acquisition system with very large input range
40. Electrostatic energy-harvesting and battery-charging CMOS system prototype
41. 50 years of CORDIC: algorithms, architectures, and applications
42. Design methodology for a miniaturized frequency selective surface using lumped reactive components
43. Robust design of a class of time-delay iterative learning control systems with initial shifts
44. Nonlinear-observer-based [H.sub.[infinity]] synchronization and unknown input recovery
45. Lithography options for the 32 nm half pitch node and beyond
46. A Review on compact modeling of multiple-gate MOSFETs
47. Wideband multi-mode CMOS VCO design using coupled inductors
48. A 32/16-Gb/s dual-mode pulsewidth modulation pre-emphasis (PWM-PE) transmitter with 30-dB loss compensation using a high-speed CML design methodology
49. Simulation and analysis of random decision errors in clocked comparators
50. Modeling ionizing radiation effects in solid state materials and CMOS devices
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