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This paper will explore and develop on the novel idea of using acoustics to map and navigate indoor environments. The system requirements, modelling and evaluation are addressed, alongside the design and development process, testing methods, desired outcomes and practical applications. Previous work carried out in this field demonstrates that it is possible to use first order echoes to map a room. The current paper is reporting on initial research to further develop such algorithms into a simultaneous localization and mapping algorithm, having the capability to not only map rooms with sound but to also navigate rooms as well. Such novel system is intended to help visually impaired people to navigate rooms by making use of sounds and their echoes, thus `listening' their way into navigating through a room. The paper overviews the approach taken towards developing a navigation algorithm using sound, as well as the associated modelling, simulation and testing strategies enabling the desired outcomes of this type of system.

This paper presents a novel security mechanism for sensitive data stored, acquired or processed by a complex electronic circuit implemented as System-on-Chip (SoC) on an FPGA reconfigurable device. Such circuits are increasingly used in embedded or cyber systems employed in civil and military applications. Managing security in the overarching SoC presents a challenge as part of the process of securing such systems. The proposed new method is based on encrypted and authenticated communications between the microprocessor cores, FPGA fabric and peripherals inside the SoC. The encryption resides in a key generated with Physically Unclonable Function (PUF) circuits and a pseudorandom generator. The conceptual design of the security circuit was validated through hardware implementation, testing and analysis of results.

The paper is concerned with the modern methodologies for holistic modeling of electronic systems enabling system-on-chip design. The method deals with the functional modeling of complete electronic systems using the behavioral features of Hardware Description Languages or high level languages then targeting programmable devices - mainly Field Programmable Gate Arrays (FPGAs) - for the rapid prototyping of digital electronic controllers. This approach offers major advantages such as: a unique modeling and evaluation environment for complete power systems, the same environment is used for the rapid prototyping of the digital controller, fast design development, short time to market, a CAD platform independent model, reusability of the model/design, generation of valuable IP, high level hardware/software partitioning of the design is enabled, Concurrent Engineering basic rules (unique EDA environment and common design database) are fulfilled. The recent evolution of such design methodologies is marked through references to case studies of electronic system modeling,simulation, controller design and implementation. Pointers for future trends / evolution of electronic design strategies and tools are given.

The implementation of the Extended Prediction Self-Adaptive Controller is presented in this paper. It employs LabVIEW (TM) graphical programming of industrial equipment and it is suitable for controlling fast processes. Three different systems are used for implementing the control algorithm. The research regarding the controller design using graphical programming demonstrates that a single advanced control application can run on Windows, real time operating systems and FPGA targets without requiring significant program modifications. The most appropriate device may be selected according to the required processing time of the control signal and of the application. A relevant case study is used to exemplify the procedure.

This paper presents a novel direct torque control (DTC) approach for induction machines, based on an improved torque and stator flux estimator and its implementation using Field Programmable Gate Arrays (FPGA). The DTC performance is significantly improved by the use of FPGA, which can execute the DTC algorithm at higher sampling frequency. This leads to the reduction of the torque ripple and improved flux and torque estimations. The main achievements are: i) calculating a discrete integration operation of stator flux using backward Euler approach, ii) modifying a so called non-restoring method in calculating the complicated square root operation in stator flux estimator, iii) introducing a new flux sector determination method, iv) increasing the sampling frequency to 200kHz such that the digital computation will perform similar to that of the analog operation, and v) using two’s complement fixed-point format approach to minimize calculation errors and the hardware resource usage in all operations. The design was achieved in VHDL, based on a Matlab/Simulink simulation model. The Hardware-In-the-Loop (HIL) method is used to verify the functionality of the FPGA estimator. The simulation results are validated experimentally. Thus, it is demonstrated that FPGA implementation of DTC drives can achieve excellent performance at high sampling frequency.

The CRISTAL project has had significant achievements in the coordination of\ud the research work carried out by the consortium members on renewables, the enhancement of partners’ knowledge on Renewable Energy Sources and their integrated control and use, which contributes to the development of key enabling technologies for distributed/smart energy networks. The dissemination of the consortium’s relevant work was also achieved through various mechanisms, along with the facilitation of the renewable energy technologies transfer from established EU countries to new EU members (Romania, Poland). The identification of common interests and niche areas, where intensive further coordinated research is needed at European level, is also an important outcome.