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Over the years, power semiconductor package evolved from normal density lead frame design to high density lead frame design. To catch up the package cost reduction while maintaining its manufacturing quality, tooling design related to lead frame stamping tool and molding tool become more challenging to semiconductor industry. The mismatch between lead frame and mold tool makers' capability has continuously impact to the unit package with various quality incidents; such as pinch copper (lead burr), package offset and etc. To overcome the quality impact, the manufacturing capability of lead frame supplier and mold tool maker has been pushed to the limit. In this paper, the pinch copper (lead burr) study has been done on the delta assessment between lead frame and mold tool capability limitation such as dimension and tolerances. Both lead frame and mold tool have manufacturing tolerance constraints in order for the package to be free from pinch copper and side lead mold flash occurrence. To understand the manufacturing tolerance capabilities, the measurement method on the mold tooling as well as lead frame has been studied and demonstrated prior to any solution imposed. In addition, dimensions and tolerances were identified and defined based on the coefficient of expansion (CTE) matching between lead frame and mold tool material. Based on the CTE chart, the minimum delta tolerance that is allowed between the two materials was illustrated. After confirming the minimum delta tolerance, this is converted into controllable dimension for both lead frame and mold cavity anti flash. Mold cavity positioning and antiflash dimension has been optimized. New lead frame sample with new control dimension has been manufactured for a feasibility assessment. The feasibility sample showed positive results on pinch copper and side lead mold flash elimination after following the newly defined control dimension. The result was further validated with high volume manufacturing run.