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1. SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration

6. Disruptive Logic Blocks

9. Introduction

10. Background and Motivation

17. Towards Autonomous Scalable Integrated Systems

18. Emerging Technologies and Nanoscale Computing Fabrics

23. SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration

25. A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm 2 Inter-Chiplet Interconnects and 156mW/mm 2 @ 82%-Peak-Efficiency DC-DC Converters

26. IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management

28. Emerging Technologies and Nanoscale Computing Fabrics

30. SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15,000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency

31. 2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm2@ 82%-Peak-Efficiency DC-DC Converters

32. Advanced 3D Technologies and Architectures for 3D Smart Image Sensors

33. Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster

34. Design and Simulation of a 128 kb Embedded Nonvolatile Memory Based on a Hybrid RRAM (HfO2 )/28 nm FDSOI CMOS Technology

35. A $4 \times 4 \times 2$ Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links

36. Open platform for prototyping of advanced software defined radio and cognitive radio techniques

37. Resistive memories: Which applications?

38. System and method for designing digital circuitry with an activity sensor

40. Emerging nano-devices for IOT applications

41. Opportunities brought by sequential 3D CoolCube™ integration

43. 193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing

44. 8.1 a 4x4x2 homogeneous scalable 3d network-on-chip circuit with 326mflit/s 0.66pj/b robust and fault-tolerant asynchronous 3d links

47. Investigation of Forming, SET, and Data Retention of Conductive-Bridge Random-Access Memory for Stack Optimization

48. Système et procédé de conception de circuit numérique à capteur d'activité, circuit numérique correspondant

49. Système et procédé de conception de circuit numérique à capteur d'activité

50. Flexible Multi-ASIP SoC for Turbo/LDPC Decoder

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