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Data are presented on several low dose rate sensitive bipolar linear circuits to evaluate a proposed hardness assurance method. The circuits include primarily operational amplifiers and voltage comparators with a variety of sensitive components and failure modes. The proposed method, presented in 1997, includes an option between a low dose rate test at 10 mrd(Si)/s and room temperature and a 100 [degrees] C elevated temperature irradiation test at a moderate dose rate. The results of this evaluation demonstrate that a 10 mrd(Si)/s test is able (in all but one case) to bound the worst case response within a factor of 2. For the moderate dose rate, 100 [degrees] C test the worst case response is within a factor of 3 for 8 of 11 circuits, and for some circuits overpredicts the low dose rate response. The irradiation bias used for these tests often represents a more degrading bias condition than would be encountered in a typical space system application.

The ionizing radiation response of several semiconductor process technologies has been shown to be affected by preirradiation thermal stress. Data on bipolar linear circuits are presented and discussed in terms of the mechanisms previously proposed for CMOS.