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357 results on '"Cong-Kha Pham"'

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1. A Novel ECG Signal Quality Index Method Based on Skewness-MODWT Analysis

2. Construction of Robust Lightweight S-Boxes Using Enhanced Logistic and Enhanced Sine Maps

3. High-Speed NTT Accelerator for CRYSTAL-Kyber and CRYSTAL-Dilithium

4. Compact and Low-Latency FPGA-Based Number Theoretic Transform Architecture for CRYSTALS Kyber Postquantum Cryptography Scheme

5. Realization of Authenticated One-Pass Key Establishment on RISC-V Micro-Controller for IoT Applications

6. Electromechanical Modeling and Simulation of MEMS-Based Piezoelectric Vibration Energy Harvesting Device Using PZT-5H Material

7. On the performance of non‐profiled side channel attacks based on deep learning techniques

8. Multi-Functional Resource-Constrained Elliptic Curve Cryptographic Processor

9. A High-Efficiency Modular Multiplication Digital Signal Processing for Lattice-Based Post-Quantum Cryptography

10. A Survey of Post-Quantum Cryptography: Start of a New Race

11. A Unified NVRAM and TRNG in Standard CMOS Technology

12. A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse

13. Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling

14. Low Complexity Correlation Power Analysis by Combining Power Trace Biasing and Correlation Distribution Techniques

15. Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA

16. Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks

17. A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse

18. Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC With Random Dynamic Frequency Scaling Countermeasure

19. A Real-Time Cache Side-Channel Attack Detection System on RISC-V Out-of-Order Processor

20. Quick Boot of Trusted Execution Environment With Hardware Accelerators

21. Design of a Low-Power and Low-Area 8-Bit Flash ADC Using a Double-Tail Comparator on 180 nm CMOS Process

22. A Unified PUF and Crypto Core Exploiting the Metastability in Latches

23. ChaCha20–Poly1305 Authenticated Encryption with Additional Data for Transport Layer Security 1.3

24. Low-Cost Area-Efficient FPGA-Based Multi-Functional ECDSA/EdDSA

25. Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Errors in Stationary Blocks

26. An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation

27. The Memorism Processor: Towards a Memory-Based Artificially Intelligence Complementing the von Neumann Architecture

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