583 results on '"Danger, Jean-Luc"'
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2. High-Order Collision Attack Vulnerabilities in Montgomery Ladder Implementations of RSA
3. High-Order Collision Attack Vulnerabilities in Montgomery Ladder Implementations of RSA
4. Impact of Process Mismatch and Device Aging on SR-Latch Based True Random Number Generators
5. CAN-BERT do it? Controller Area Network Intrusion Detection System based on BERT Language Model
6. Unsupervised Network Intrusion Detection System for AVTP in Automotive Ethernet Networks
7. SOME/IP Intrusion Detection using Deep Learning-based Sequential Models in Automotive Ethernet Networks
8. Software countermeasures against the multiple instructions skip fault model
9. Reliability of Ring Oscillator PUFs with Reduced Helper Data
10. Testing and reliability enhancement of security primitives: Methodology and experimental validation
11. Reliability of Ring Oscillator PUFs with Reduced Helper Data
12. Parasite: Mitigating Physical Side-Channel Attacks Against Neural Networks
13. Cross-PUF Attacks: Targeting FPGA Implementation of Arbiter-PUFs
14. On the Resiliency of Protected Masked S-Boxes Against Template Attack in the Presence of Temperature and Aging Misalignments
15. DELFINES: Detecting Laser Fault Injection Attacks via Digital Sensors
16. Reducing Aging Impacts in Digital Sensors via Run-Time Calibration
17. Multi-source Fault Injection Detection Using Machine Learning and Sensor Fusion
18. Analysis and Protection of the Two-Metric Helper Data Scheme
19. Enhancing the Resiliency of Multi-bit Parallel Arbiter-PUF and Its Derivatives Against Power Attacks
20. Highly Reliable PUFs for Embedded Systems, Protected Against Tampering
21. Telepathic Headache: Mitigating Cache Side-Channel Attacks on Convolutional Neural Networks
22. Self-secured PUF: Protecting the Loop PUF by Masking
23. Processor Anchor to Increase the Robustness Against Fault Injection and Cyber Attacks
24. Parasite: Mitigating Physical Side-Channel Attacks Against Neural Networks
25. Statistical Higher-Order Correlation Attacks against Code-Based Masking
26. Experimental analysis of the electromagnetic instruction skip fault model and consequences for software countermeasures
27. Categorizing all linear codes of IPM over F28
28. Detecting faults in inner product masking scheme: IPM-FD: IPM with fault detection (extended version∗)
29. High Precision Fault Injections on the Instruction Cache of ARMv7-M Architectures
30. Security Evaluation Against Side-Channel Analysis at Compilation Time
31. Prediction-Based Intrusion Detection System for In-Vehicle Networks Using Supervised Learning and Outlier-Detection
32. Generic Architecture for Lightweight Block Ciphers: A First Step Towards Agile Implementation of Multiple Ciphers
33. Development of the Unified Security Requirements of PUFs During the Standardization Process
34. Challenges in Generating True Random Numbers Considering the Variety of Corners, Aging, and Intentional Attacks
35. A Tale of Two Models: Discussing the Timing and Sampling EM Fault Injection Models
36. Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions
37. Telepathic Headache: Mitigating Cache Side-Channel Attacks on Convolutional Neural Networks
38. Enhancing the Resiliency of Multi-bit Parallel Arbiter-PUF and Its Derivatives Against Power Attacks
39. Processor Anchor to Increase the Robustness Against Fault Injection and Cyber Attacks
40. Self-secured PUF: Protecting the Loop PUF by Masking
41. Analysis and Protection of the Two-Metric Helper Data Scheme
42. Attack Tree Construction and Its Application to the Connected Vehicle
43. Identifier Randomization: An Efficient Protection Against CAN-Bus Attacks
44. Physical Security Versus Masking Schemes
45. A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback
46. Here comes SAID: A SOME/IP Attention-based mechanism for Intrusion Detection
47. Aging-Induced Failure Prognosis via Digital Sensors
48. A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks
49. Linear Complementary Codes: Novel Hardware Trojan Prevention and Detection Approach
50. Impact of Aging on the Reliability of Delay PUFs
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