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9. (Digital Presentation) Electrochemical Deposition of Sn-Cu Alloys for Applications in 3D Stacking in Microelectronics Industry

10. Confined IMCs for low temperature and high throughput D2W bonding

12. Low temperature backside damascene processing on temporary carrier wafer targeting 7μm and 5μm pitch microbumps for N equal and greater than 2 die to wafer TCB stacking

16. A study on IMC morphology and integration flow for low temperature and high throughput TCB down to $10\mu \mathrm{m}$ pitch microbumps

20. Process development and characterization of 3D multi-die stacking

21. ELD NiB for microbumps passivation and wirebonding

25. 10 and 7 μm Pitch Thermo-compression Solder Joint, Using A Novel Solder Pillar And Metal Spacer Process

26. Electrochemical Deposition of Sn-Cu Alloys for Applications in 3D Stacking in Microelectronics Industry

29. Single Grain Si TFTs for RF and 3D ICs

31. Process Complexity and Cost Considerations of Multi-Layer Die Stacks

39. Polymer and Bump Planarization for Fine Pitch Micro-Bump Stacking

44. SAMs (self-assembled monolayers) passivation of cobalt microbumps for 3D stacking of Si chips

45. Growth rate of IMC in the binary sytems of Co/Sn and Cu/Sn

46. 3D stacking cobalt and nickel microbumps and kinetics of corresponding IMCs at low temperatures

47. Die to wafer 3D stacking for below 10um pitch microbumps

48. Liquid mediated direct bonding and bond propagation

49. FORMATION, PROCESSING AND CHARACTERIZATION OF Co-Sn INTERMETALLIC COMPOUNDS FOR POTENTIAL INTEGRATION IN 3D INTERCONNECTS

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