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We summarize the metrology and inspection required for the development of nanoimprint lithography (NIL), which is recognized as a candidate for next-generation lithography. Template inspection and residual layer thickness (RLT) metrology are discussed. An optical-based inspection tool for replica template inspection showed sensitivity for defects below 10 nm with sufficient throughput. For the RLT control, in-die RLT metrology is needed. Because the metrology requires dense sampling, optical scatterometry is the best solution owing to its ability to measure profile features nondestructively with high throughput. For in-die metrology, we have developed a new hybrid metrology that can combine key information from these complex geometries with scatterometry measurements to reduce the impact on the RLT measurement due to the layers beneath the resist. The technologies discussed here will be important when NIL is applied for IC manufacturing, as well as in the development phases of those lithography technologies.

Since multi patterning with spacer was introduced in NAND flash memory1, multi patterning with spacer has been a promising solution to overcome the resolution limit. However, the increase in process cost of multi patterning with spacer must be a serious burden to device manufacturers as half pitch of patterns gets smaller.2, 3 Even though Nano Imprint Lithography (NIL) has been considered as one of strong candidates to avoid cost issue of multi patterning with spacer, there are still negative viewpoints; template damage induced from particles between template and wafer, overlay degradation induced from shear force between template and wafer, and throughput loss induced from dispensing and spreading resist droplet. Jet and Flash Imprint Lithography (J-FIL4, 5, 6) has contributed to throughput improvement, but still has these above problems. J-FIL consists of 5 steps; dispense of resist droplets on wafer, imprinting template on wafer, filling the gap between template and wafer with resist, UV curing, and separation of template from wafer. If dispensing resist droplets by inkjet is replaced with coating resist at spin coater, additional progress in NIL can be achieved. Template damage from particle can be suppressed by thick resist which is spin-coated at spin coater and covers most of particles on wafer, shear force between template and wafer can be minimized with thick resist, and finally additional throughput enhancement can be achieved by skipping dispense of resist droplets on wafer. On the other hand, spin-coat-based NIL has side effect such as pattern collapse which comes from high separation energy of resist. It is expected that pattern collapse can be improved by the development of resist with low separation energy.