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The synergy between schematic and layout to optimize the performance of analog circuits in scaled technologies is addressed for the case of an innovative analog filter, developed in the 28nm node. This benchmark is a 75MHz 4th-order low-pass analog filter in 28nm-CMOS composed by two Active-RC Rauch biquadratic cells. The architecture is customized to properly operate in the challenging conditions of low V DD (0.9V) and low [V DD -V TH ] space (≈ 0.4V) and overcoming the poor analog performance of the 28nm MOS devices. In these directions, aggressive opamp input and output CMFB are applied. The paper shows how layout could corrupt the high-frequency performance of the filter without specific solutions. Optimized and synergic design and layout solutions are validated by the experimental results. The filter consumes 2.68mW from a single 0.9V-V DD . 11.5dB IIP3 at 20&21MHz and 40dBc of THD at 20MHz, respectively are achieved, while performing 310µV RMS of integrated in band noise.

This paper presents a fast high-linearity low-power versatile interface circuit for MOX gas sensor. The device is based on a resistance-to-frequency converter with digital output, featuring 128dB-Dynamic Range with 8-bit accuracy. This is achieved with a constant measurement time of 250ms (i.e. with 4Hz output data-rate). The ASIC covers the $100\Omega $ -1M $\Omega $ resistive range, with large programmability for the sensor resistance values. Large linearity (no glitches) is achieved with a single-scale measurement arrangement. The design effort reduces the power consumption to fit portable devices applications. The interface is realized in a standard CMOS 130nm technology with an area of $125000~\mu \text{m}^{2}$ and $450~\mu \text{A}$ -Total Current from a single 1.5V supply. Electrical and chemical measurements with a SnO2 sensor validate the results, showing high minimum CO detection capability in ambient air of 5ppm.

This paper presents a low-cost integrated oscillator-based interface circuit for resistive and capacitive readout. The interface is optimized for MOX gas sensor and can cover a very wide resistive range (100Ω-10MΩ) with an equivalent linearity error of 0.4% (8-bit accuracy), corresponding to 148dB of dynamic range (DR). The architecture cancels the parasitic effects of multiplexing, allowing the conversion of a sensor matrix without decreasing resolution and linearity. Moreover, the same interface can measure capacitive sensors and is optimized to convert sensors in the 1pF-2pF range in 100ms with an accuracy of 3.2e-6 (110dB) at 10Hz of data rate. Programmability of output data rate and DR allows compatibility with different sensors and/or resolution requirements. The interface is implemented in a standard CMOS 130nm technology with an area of 130000 μm2 including biasing blocks and digital synthesis.

In this paper an interface circuit for MOX gas sensor is presented. It is based on a resistance-to-frequency converter and improves existing solutions in term of performance (offset) and power efficiency. The resistive range covered is 100Ω-1MΩ, with an equivalent 8-bit precision in a total measurement time of 1 second. This corresponds to a dynamic range of about 128dB. Power consumption and design strategy are optimized for mass production targeting consumer applications. The interface is implemented in a standard CMOS 130nm technology with an area of 125000 μm2 and 450μA of current consumption.

In this paper a 600MHz 4th order low-pass analog filter in CMOS-28nm is presented. The transfer function is obtained with the cascade of two Active-RC Rauch biquadratic cells. Each cell is based on a novel OPAMP optimized for very high frequency operation achieving a Unity Gain Bandwidth (UGBW) > 7GHz. The developed three stage folded OPAMP exploits a feed-forward compensation technique to maximize bandwidth and an improved Common Mode Feedback Circuit (CMFB) necessary to reduce parasitic poles and to guarantee acceptable CMFB phase margin. The OPAMP is able to manage the very low V DD /V TH ratio of the 28nm process lowering its input common mode voltage in respect with input and output common mode voltage of the whole filter. The prototype consumes 11.4mW from a single 0.9V supply voltage, achieving 600MHz of bandwidth with an in-band integrated noise of 750μV RMS . The IIP3 calculated at 400 and 450MHz is 12.5dBm.

This paper presents the design of a 4th-order closed-loop continuous-time filter. This filter exploits an improved analog stage that makes linearity performance constant over the entire pass-band frequencies. In other words the filter has same HP3 at low and at high frequency. Hence the linearity performance are independent on the input tones bandwidth, whereas most of analog filters suffers from poor linearity when loop-gain reduces, i.e. close to the closed-loop poles frequency. In order to validate the hereby proposed design idea a 4th-order 25MHz–3dB bandwidth pseudo-differential filter has been designed and simulated in CMOS 28nm technology. The prototype consumes 820μW from 1V supply voltage and has 15dBm and 13dBm HP3 at 5&6MHz and 20&21MHz input tones, respectively.

In this paper a 75MHz 4th order low-pass analog filter in CMOS-28nm is presented. The filter is composed by the cascade of two Active-RC Rauch biquadratic cells. The hereby proposed design manages a very low Vdd/Vth ratio (