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This paper describes a novel short-circuit (SC) fault detection approach to protect the low-voltage dc microgrid (DCMG). The SC faults are the most common fault in the dc power system and can cause severe hazards if not isolated. Since a DCMG is a capacitor-dominated grid, the proposed scheme utilizes these filter capacitors current dynamics. An LV-DCMG system is considered for building the application to realize the proposed fault detection scheme. Active sources such as solar photovoltaic and battery are connected to the passive loads through a dc-dc converter, dc cable and solid-state relays. The proposed method considers an average of the capacitor current as a detection parameter. An iteration-based isolation configuration is also suggested for a zonal type of distributed network. Furthermore, a selection procedure of the thresholds is also presented in detail. The validity of the proposed approach is verified through both digital simulation studies and DSP- based experimental studies. The proposed approach is capable of detecting both low and high impedance faults.

A single-stage isolated AC-AC converter without the commutation problem is proposed. The proposed converter has the step-up/down function dependence on the phase shift control which provides zero-voltage switching (ZVS) for all switches in rated condition. Also, the commutation paths of the secondary side switches are provided for any switching case by adding a single capacitor; originally, a filter capacitor is used for the switching mode power supply input, and in this case, this filter capacitor also solves the primary-side commutation problem. The ZVS and solving the commutation problem increase the power efficiency and reliability. The proposed converter achieves high power quality with a simple control algorithm. A 1 kW / 220 Vrms prototype is implemented to verify the theoretical analysis and performance of the proposed converter. The California Energy Commission (CEC) efficiency is 97.3%, the total harmonic distortion (THD) of the input current is 2.45% at full load, and the THD of the output voltage is 1.07% at full load.

Current regulation of inductive-capacitive-inductive (LCL) grid-connected inverters usually requires multiple current sensors to actively damp the filter resonance. Inverter side current regulation avoids this issue because of its inherent LCL filter damping properties, but does not accurately control the grid side current, particularly with distorted grids. Furthermore, both strategies typically require high quality voltage sensors to maintain precise grid synchronization. This paper proposes a novel current control strategy for LCL grid-connected inverters that only requires inverter side current sensors. The strategy uses the resonator output states of a Stationary Reference Frame (SRF) Proportional Resonant (PR) current regulator to estimate the grid voltage phase and filter capacitor current, and thus achieve self-synchronized indirect regulation of the grid-side current. The effectiveness of the approach has been verified using simulation and matching experimental investigations.

Multisampling control provides an attractive way to improve the dynamics and stability of high-power three-phase grid-connected inverters. Beyond the desired performance in current control, more information can be acquired through multisampling. However, such an assumption is rarely discussed in grid-connected inverters. In order to fill this gap, a line voltage sensorless control scheme is proposed for LCL-filtered inverters. In this article, a multisampling is performed on the inverter-side current, and the linear regression of the multisampled current during zero vectors of inverter-modulation voltage is employed to estimate the filter capacitor voltage. Consequently, the cost of line voltage sensors is reduced and the failure of line voltage sensors is prevented when using multisampling current control. Furthermore, to address start-up transients, the line voltage can still be estimated by temporarily locking the upper arms of the inverter, and dc-link voltage can be precharged to the target value at the same time. Experimental results validate the effectiveness of the method on a down-scale inverter.

Investigates interaction of harmonics with capacitors. First the main applications of capacitors in power systems are outlined: power factor correction, definitions of displacement power factor and total power factor which includes harmonics. Thereafter, the power quality issues associated with capacitors are discussed, including series and parallel harmonic resonances, and transients due to capacitor switching. Frequency and capacitance scanning techniques including harmonic voltage, current and reactive-power constraints for capacitors are addressed next. Feasible exemplary operating regions for safe operation of capacitors in the presence of voltage, current and reactive-power harmonic components are investigated. Equivalent circuits of capacitors in terms of inductance, resistance, and capacitance are reviewed. 9 application examples with solutions and 10 application-oriented problems are listed.

This article presents a systematic design procedure for a dual-active-bridge (DAB) dc–dc converter. Design of a DAB converter involves determination of two key parameters, i.e., transformer turns ratio and the series inductance value. Existing literature addresses this problem through numerical optimization, which is computation intensive and does not provide much insight. In general, loss is minimized by applying equal weightage to all operating conditions, which may not be practical. Given an operating power range, terminal voltage range, and switching frequency, this article presents a way to optimally select the design variables through analytical solution of a constrained optimization problem. Analysis is carried out in the time domain, and an optimal triple-phase-shift modulation strategy is considered that ensures minimum inductor rms current and soft switching. The choice of the design parameters results in minimization of the worst-case inductor rms current over the entire operating range of the converter, which leads to both efficiency and size optimization. A procedure for selection of devices and filter capacitors and design of magnetics is given. A 2.6-kW experimental prototype is designed to validate the theoretical analysis.

Doubly fed induction generators (DFIGs) with an LCL filter are widely used for wind power generation. In these energy conversion systems, there is an interaction between the grid-side converter (GSC) and the rotor-side converter (RSC) control loops, the generator and the LCL filter that must be properly modeled. Such interaction between the GSC and the RSC proves to have a significant influence on the stability. Several active damping (AD) methods for grid-connected converters with an LCL filter have been proposed, nevertheless, the application of these techniques to a DFIG wind turbine is not straightforward, as revealed in this article. To achieve a robust damping irrespective of the grid inductance, this article proposes an AD strategy based on the capacitor current feedback and the adjustment of the control delays to emulate a virtual impedance, in parallel with the filter capacitor, with a dominant resistive component in the range of possible resonance frequencies. This work also proves that, by applying the AD strategy in both converters simultaneously, the damping of the system resonant poles is maximized when a specific value of the grid inductance is considered. Experimental results show the interaction between the GSC and the RSC and validate the proposed AD strategy. © 1986-2012 IEEE. This work was supported by the Spanish State Research Agency (AEI) under Grant PID2019-110956RB-I00/AEI/10.13039.

A cascaded H-bridge STATCOM requires large DC filter capacitors to suppress the low-frequency voltage fluctuation in each of the H-bridge cells. Keeping the voltage stress of power device unchanged, increasing the fluctuation of the DC-link voltage is a possible method to significantly reduce the required capacitance for a STATCOM. However, excessive voltage fluctuation greatly degrades the operating range of the inductive conditions. This paper proposes a universal capacitance design method that can significantly reduce the required capacitance when compared with the traditional design method. First, the inductance is constrained in the form normalized by the system impedance. Then a new analysis method between the DC-link capacitance and the operating range is introduced. Experiment results obtained on a low-power 5-level cascaded H-bridge STATCOM prototype are presented to validate the correctness of the proposed design method.

Switching losses including reverse recovery losses, have a significant impact on total losses of DC–DC converters especially in high voltage applications. This article introduces a new family of DC–DC converters with two degrees of freedom, which can handle the mentioned issue. The proposed family of DC–DC converters contains a bidirectional and a unidirectional cell, and provides an additional control parameter. This parameter can be adjusted so that there are soft switching conditions for all the switches of the converter within the entire range of loading. In addition, properly tuning the new parameter can decrease the circulating current and consequently decrease the conduction losses considerably. Besides, the unidirectional cell contributes to power transfer, especially under full load condition. Moreover, the filter capacitor is one fourth in comparison with the conventional dc-dc converters. The proposed converter is modeled and its operation modes are studied. Also, in order to verify the findings, a 500 W prototype with a frequency of 100 kHz is implemented, and the results are compared.

Adding redundant converters or switches are two common strategies to achieve fault-tolerant operation of converters. The former one is straightforward but costly, while the latter one is cost-effective but with sacrifice on the reliability as it only works for switches’ failure. Aiming to achieve a good trade-off between cost and reliability, a novel fault-tolerant full-bridge series-resonant converter (FB-SRC) which only needs a redundant half-bridge SRC (HB-SRC) to gain fault tolerance for all fault-prone components is proposed in this article. The proposed converter can keep working normally when short-circuit fault or open-circuit fault happens on switches, diodes, or the output filter capacitor. After fault occurs, the redundant HB-SRC converter will combine the remaining healthy part of original FB-SRC to reconstruct an input-parallel and output-series dual HB-SRC, which can maintain the rated output power with reduced cost. In the article, component's reliability of SRC is first analyzed. Then, operation and performance analysis of the proposed fault-tolerant converter is introduced in detail. As the voltage/current stresses of components are almost the same during the prefault and postfault operation, the converter design is simple. Finally, experimental results of a 500 W prototype are also given to verify the effectiveness.

This letter proposes a four-leg current-source inverter (CSI) fed three-phase motor drive. Different from the previous four-leg CSI inverter, the proposed configuration introduces the fourth leg in CSI, which connects to the neutral point of the motor through an extra output filter capacitor. Therefore, the proposed configuration can not only reduce the common-mode voltage (CMV) under the normal condition, but also provide the fault-tolerant operation ability under open-circuit faults in windings and switches. The dedicated space vector modulation (SVM) strategies have been designed. Compared with prior research on CMV reduction, the four-leg method has the full range of modulation index and will not increase any harmonics in the currents. Meanwhile, the fault-tolerant ability is offered, which can further enhance the reliability of the motor drive. A laboratory prototype has been built to experimentally verify the effectiveness of the proposed motor drive topology and the control schemes.

The third-harmonic injection two-stage matrix converter (3TSMC) not only possesses the advantages of a TSMC, but also enhances the input reactive power control capability. Due to the input current deviation caused by the voltage ripple across the input filter capacitors, the mains currents of the 3TSMC are distorted at sector boundaries. To improve mains current quality, this article proposes a mains current distortion suppression method for a 3TSMC, which adds a prefilter to the output side of the input voltage selector to reduce the input current harmonics. As a result, the input filter capacitor voltage ripple and the input current deviation are reduced. The details of design of the prefilter are explained mathematically. To compensate for the dc-link voltage variation after topology improvement, an algorithm based on calculation of the voltage drops across the prefilter inductors is proposed, which can further improve the mains current performance. The feasibility of the proposed method is verified by simulation and experimental results.

In a two-stage inverter, the instantaneous output power pulsates at twice the output frequency (2 f o), generating the second harmonic current (SHC), which will propagate into the front-end dc–dc converter. This article aims for suppressing the SHC in the front-end dc–dc converter with dc transformer (DCX)- LLC resonant converter. The small-signal model of the DCX- LLC resonant converter is proposed, and based on which, the unified small-signal model of the preregulator+ LLC converter is built. Then, the basic ideas for reducing the SHC are proposed, including the determination of the filter capacitors in the preregulator+ LLC converter and the control approach. After that, from a perspective of output impedance, the control schemes for reducing the SHC in the front-end preregulator+ LLC converter are proposed. By inserting a notch filter in the voltage loop and/or introducing a virtual impedance in series with the output rectifier of the LLC resonant converter, the output impedance of the preregulator+ LLC converter at 2 f o is increased and, thus, the SHC can be reduced. Finally, a 6-kVA two-stage three-phase inverter with boost+ LLC converter as the front-end dc–dc converter was fabricated and tested. The experimental results are provided to verify the proposed control schemes.

In a two-stage dc–dc intermediate bus architecture (IBA), an $LC$ input filter with a series parasitic resistance is often used in an intermediate bus converter (IBC) because of its discontinuous input current, which is designed using Middlebrook’s impedance criteria. Using the ripple voltage of the input filter capacitor, this article proposes a closed-loop pulsewidth modulation (PWM) control method in the IBC to mitigate limit-cycle oscillations (LCOs) in an IBA. This ripple voltage is shown to indirectly carry inductor current information of the IBC and offers a virtual damping in the closed-loop system. Small-signal models are derived, and stability conditions are established. A simple PI controller is shown to be sufficient to achieve tight output voltage regulation and fast transient response. The proposed technique is extended to a multiphase IBC to achieve equal current sharing among the phases. Hardware prototypes are developed, and the analytical claims are verified using experimental results.

This paper proposes an LCL-filter design based on the modulation index for grid-connected hybrid active neutral point clamped (ANPC) inverters. The three-level hybrid ANPC inverter consists of silicon insulated gate bipolar transistors and silicon carbide metal oxide semiconductor field effect transistors to reduce the switching losses. LCL-filter parameters for the three-level hybrid ANPC inverter are calculated using the current ripple factor. The current ripple factor is affected by phase voltage, which varies according to the modulation index, and therefore the inductance on the inverter side must be considered with the modulation index. To design inductance on the inverter side, the output phase voltage and grid voltage are used to analyze the current ripple factor. The filter capacitor and the inductance on the grid side are designed based on the reactive power absorption and current ripple attenuation. The effectiveness of the proposed LCL-filter design method is validated via simulation and experimental results.

The voltage source inverter is a key component in the distributed power generation systems where the LCL-filter is a popular choice for interfacing with the grid. However, the well-known resonance issue associated with the LCL-filter deteriorates the control performance and risk the inverter system stability. The inverter control design plays a significant role to ensure the quality of the injected grid current and stable operation according to the requirements of grid interconnection standards. This paper deals with an alternative control design method that modifies the internal damping loop design to improve the stability and damping characteristics. The proposed design employs a compensator across the filter and feedbacks the output of the augmented plant at the reference voltage point, and named as parallel feedforward compensation method. The filter capacitor current measured for damping loop implementation, and a high-pass filter compensator adopted in the proposed configuration. The proportional capacitor current feedback compensation method is considered for comparative studies. The current loop stability and control performance characteristics are investigated in detail under the resonance frequency and filter parameters variation condition. The significant outcomes of the proposed scheme are faster dynamic response, higher delay compensation capability, relatively improved resonance suppression, and potential for better tracking performance. An experimental prototype is developed to validate the efficacy of the proposed method.

International audience; With the development of High Voltage Direct Current (HVDC) and ultra HVDC, a growing number of high voltage film filter capacitors have been installed for harmonic suppression. But the capacitors generate severe audible noise in the converters, which has become more and more serious. Then it is important to imitate the practical working situation of capacitors for the research of noise characteristics to improve the capacitive performance in lab. In this paper, a FFT-based harmonic current control method is proposed for audible noise analysis of AC filter capacitor. Firstly, mathematical model of the Harmonic Current Injection System (HCIS) is built based on MATLAB. Then a Fast Fourier Transform (FFT) harmonics detection method is analyzed and used to detect the amplitude and phase of each harmonic considering a number of harmonic currents flowing through AC filter capacitors. Since the amplitude and phase spectrum of capacitor current are obtained, the Proportional Integral (PI) regulator is applied to adjust the specified harmonic amplitude to achieve zero-error control. Then accurate harmonic current can be injected to the tested capacitor and it will help to acquire the noise characteristics of the tested plant. At last, the simulation and experimental results validate the proposed strategy. © The Author(s) 2021.

In wind power system, the randomness of wind energy increases the probability of components fault. once the switch fault of the PWM rectifier is detected, it will lead to the distortion of the motor voltage and current waveform, the increase of torque ripple, the fluctuation of filter capacitor voltage, and the increase of harmonic content, which will affect the control performance and operation safety of the system. A common fault in a three-phase PWM rectifier is the open-circuit fault of the switch. This paper analyzes the current waveform distortion of the square wave motor when the rectifier switch fault, and proposes different fault-tolerant control strategies for different situations of switch fault, include single, double and triple switches fault. This method is based on several special driving modes under power generation situation of square wave motor. The strategy is easy to implement and does not need to change the circuit topology. It can realize fault-tolerant control of switch faults in the same side half bridge or the same bridge arm of the three-phase PWM rectifier. The effectiveness of the proposed fault-tolerant strategy is verified by simulation and experiment at the end of the article.

An integrated generator-rectifier system can produce high conversion efficiency and reduce the size of the active rectifier in high-power ac-to-dc conversion. A major disadvantage of this system is the use of bulky filter capacitors with passive rectifiers to obtain a low voltage-ripple dc bus. These filters are the main contributor to the overall system size, weight, cost, and failure, as well as to the low power factor at the ac ports powering the passive rectifiers. This article presents an alternative approach: integrating the function of the filter elements into the active rectifier. A voltage opposite the passive-rectifier ripple component is synthesized at the active-rectifier dc-side by modulating the ac-side current. Compensation occurs due to the series connection of the rectifier dc outputs. In addition, an overall control architecture is proposed to use the active rectifier both as a filter element and a dc-bus voltage regulator. Simulation on a 3-MW, 4.9-kV dc system shows the total dc-bus-voltage ripple factor is reduced by 57%, while the power factor at the passive-rectifier ac sides is 0.95. The proposed control architecture achieves regulation of the dc-bus voltage at variable dc-bus current and variable generator speed conditions. Experimental results corroborate the findings.

An analysis of the method for ensuring the sinusoidality of the output voltage in power generation systems with self-commutated voltage inverters under the requirements of the international standard IEEE-519 is presented. In a number of programs, especially low-power generation systems, a low-cost solution is needed to provide the sinusoidal waveform of the output voltage with the total harmonic distortion of 5%. This solution is to use two-level voltage inverters with an output sine LC filter. However, the feature of the sine filter with the frequency converter is that the PWM frequency affects the spectrum of higher harmonics of the output voltage. In addition, there is the starting current of the filter capacitor, which can disable the power switches of the voltage inverter. The developed method for calculating the values of the LC filter with the two-level voltage inverter in the PWM mode is presented meeting the requirements of the international standard IEEE-519, taking into account the modulation frequency and limitation of the starting current of the filter capacitor. To confirm the required quality of the output voltage of the two-level voltage inverter with the sine filter, an appropriate simulation model was created in the Matlab/Simulink computer simulation environment. The oscillograms and harmonic analysis of the input and output voltages of the sine filter, which showed the total harmonic distortion of 1.88%, are presented. A physical prototype of the investigated system was created on the basis of a 5.5kW OVEN PChV203-5K5-V frequency converter (Ukraine). Using the SIGLENT SDS1104X-E oscilloscope (China), the real waveform and the results of the harmonic analysis of the sine filter output voltage, confirming the implementation of the necessary sinusoidality criteria, were obtained

Electromagnetic interference in power converters is a crucial problem for circuit designers. Electromagnetically compliant converter design is required for the safety of an operation. A novel filter design approach considering ground leakage current, different winding styles for common mode choke, tolerance of filter capacitor is proposed in this study to solve the electromagnetic interference problem. In the study, electromagnetic compatibility issue is investigated for a 25 kW, 15 kHz switching frequency, three-phase/level T-type grid-connected solar inverter. The test setup is installed based on EN55011 standard, and the interferences emitted by the inverter to the grid through conduction are measured. Then, a filter design is made to prevent these interferences from being transmitted to the grid. After the filter is designed and engaged, the measurements are repeated. So, the noise attenuation of the EMI filter is verified experimentally. Experiences obtained from the hardware modification in the EMI filter, which is designed for an industrial solar inverter, have been discussed. It is observed that the result of conducted emission measurement is within the limits of the EN55011 Class B standard.

The operation principles of multilevel inverter circuits and methods for controlling them are considered. The operation of a multilevel circuit as part of a distributed transformer-based series compensation device is analyzed. The specific feature pertinent to the operation of a self-excited inverter within a distributed series compensation device is that it is loaded on the transformer connected in series into the power transmission line. In this case, the load is in fact a current transformer. Analytical expressions for calculating the circuit parameters are presented. The results of spectral modeling and simulation of the multilevel circuit in different modes of its operation are given. By using the spectral modeling, the currents and voltages of all power circuit components and their harmonic composition were estimated in the steady-state operation mode, and it has been shown that inductive injection is the heaviest mode of operation, because the inverter current reaches its maximum value in this mode. In using the multilevel circuit, additional requirements are posed to the control system, which, in addition to ensuring stable control of the output voltage, must also balance the voltages across the capacitors in the inverter arm. In selecting a storage capacitor and filter capacitor, it should be borne in mind that the maximum possible voltage across these components is determined not only by the necessary boost voltage, but also by the line current in the rectifier mode and can be significantly higher than the originally evaluated value. The obtained results can be used in designing distributed series compensation devices on the basis of an NPC inverter.

In recent years, the serious vibration and noise problem of high voltage filter capacitor has become the primary problem of noise reduction in high voltage direct current (HVDC) converter station. The current research mainly focuses on the experimental measurement of the vibration and noise of the filter capacitor, without considering the influence of the residual charge on the dielectric interface stress. In this paper, the experimental platform is built for measuring the residual charge of the dielectric film in filter capacitor component, and the measurement results show that there are non-uniform residual charges on the dielectric surface of filter capacitor. In order to study the influence of uneven distribution of charge on dielectric interface stress, 12 different residual charge distributions are designed, and the results show that the uneven distribution of surface residual charge has a great influence on dielectric interface stress, and the higher uneven distribution of residual charge can cause the larger the stress on the dielectric surface of filter capacitor. The negative residual charge can lead to larger dielectric interface stress, which has a more serious impact on the vibration of filter capacitor component.

To improve both the stability and the disturbance suppression ability of single-phase grid-connected inverters through LCL filters, this paper proposes an inverter output impedance enhancing control mechanism. The impedance enhancing control mechanism employs a virtual impedance control and a node-voltage feedforward control to ensure sufficient passivity and high amplitude of inverter output impedance over wide frequency range of interest. The proposed control mechanism is realized through combination control of a low-voltage bidirectional voltage-source-converter (B-VSC) connected at the filter capacitor branch and the main inverter. The B-VSC sustains an extra low power without sacrificing the efficiency of the inverter. Both the simulation and experimental results are finally given to verify the validity of the proposed method, which shows the performance improvement of the proposed radial-line inverter system working under variable grid conditions.

Filter capacitors are among the most serious noise sources in HVDC converter stations, and there are still no satisfactory noise reduction measures. This paper proposes the use of the mass tuning (MT) method to adjust the vibration frequency response characteristics and to realize vibration control and noise reduction. First, the theoretical model of the MT structure is developed based on continuum mechanics. Based on the theoretical model, it is revealed that inserting an MT component into the capacitor element package will cause a decrease in the resonant frequencies and antiresonant frequencies. Furthermore, the movement degree of the resonant frequencies increases as the position of the MT component becomes closer to the package end, while the movement degree of the antiresonant frequency is the largest when the MT component is located in the middle of the package model. The vibrations and the noise levels of an example MT capacitor are then compared with the results of an original capacitor. The comparison results show that the MT scheme designed in this paper can achieve a noise reduction effect of 12–15 dB(A). The proposed reduction method is proven to be both effective and efficient.

LCL filter is widely used in grid-connected converters for good harmonic mitigation performance. However, resonance poles of LCL filter challenge system stability, especially in a digital control system. This paper studies the suppression method of the active power filter output LCL filter resonance. Because of the defect that the traditional active damping based on the filter capacitor current or capacitor voltage feedback needs to add additional sensors, a novel active damping with grid-side current component feedback is proposed. And analysis and design of the feedback function, the resonance suppression characteristics, and the impact on harmonic compensation performance are analyzed in detail respectively and proposes a novel active damping control method based on a quasi-resonant controller grid-side current feedback. On this basis, a mathematical model of the SAPF system with the proposed novel active damping was established, and the resonance characteristics were analyzed. Finally, the proposed method was verified through relevant experiments.

This study presents a control method for DC–DC switching power converters to avoid the instability caused by the interaction between a tightly controlled switching converter and an input low-pass filter. The proposed method is based on the Lyapunov stability criterion. A non-linearised model is established, and the instantaneous quantities of the state variables are considered. The switching command is formulated by calculating the stability of the system. The inductor current and voltage across the filter capacitor, along with the state variables in the switching converter, follow the corresponding references. A boost converter is considered to demonstrate the associated effectiveness. The results of several simulations and experiments pertaining to the start-up, tracking, and regulation stages validate the proposed control approach. Moreover, the robustness of the approach against variations in the parameters of the controlled system is examined experimentally. To demonstrate the superiority of the proposed method, the method is compared with the proportional–integral, fuzzy, and flatness-based controllers.

For a conventional islanded microgrid, each distributed generation (DG) unit usually equips with an LC filter and a closed-loop filter capacitor voltage control is applied to ensure an accurate tracking of DG voltage. In this article, a cost reduction microgrid and DG units configuration is developed via the following two steps. First, an L -type filter is adopted by each DG unit and a centralized shunt capacitor is placed at point of common coupling (PCC). Then, the inherent synchronization feature of droop control is further exploited as an inherent synchronizer to identify the carrier angle relationships between parallel inverters, but without any communications between them. With the carrier information obtained, a decentralized interleaving pulsewidth modulation (PWM) among parallel inverter can be easily achieved via a slow proportional integral (PI) regulation of each DG unit relative carrier. Accordingly, the high-frequency switching harmonics of PCC voltage are suppressed even with simplified and size reduced DG output chokes. Second, a virtual impedance control is applied to DG units to cancel the voltage drops on the DG feeder in a direct PWM manner. Accordingly, mitigating the low-order harmonic PCC voltages is obtained without using any closed-loop voltage tracking at DG unit local processor. Comparative experimental results have been provided to validate the correctness of the proposed method.

A novel topological family of multi-level inverters with flyback high frequency link is proposed in this study. The inverters can transfer high DC voltage into regulated sinusoidal voltage with low total harmonic distortion (THD). The circuit configuration consists of high DC input voltage, DC-link capacitors, novel multi-level conversion unit, high frequency flyback transformer, cyclo-converter, output filter capacitor and AC load. This topological family includes diode-clamp type full-wave mode, hybrid-clamp half-bridge mode, multi-end mode and improved multi-end mode. To achieve reliable multi-level inversion and overcome DC-link capacitor voltages unbalance, multi-carrier modulation and DC-link capacitor voltage balancing strategy are presented. In addition, steady principle and AC small-signal model are analysed. Simulation and experimental results are given to prove that the novel flyback high frequency isolated multi-level inverters have the following advantages such as the high frequency electrical isolation, the bi-directional power flow, the two-stage power conversion (DC-high frequency AC (HFAC) - low frequency AC (LFAC)), the lower voltage stress of power switches and the low THD of output voltage.

LCL filter has been widely used in the grid connected inverter, since it is effective in attenuation of the switching frequency harmonics in the inverter. However, the resonance in this filter causes stability problems and must be damped effectively to achieve stability. There are some methods to damp the resonance; one method is passive damping of resonance by adding a series resistor with the filter capacitor, but passive element reduces the inverter efficiency. Other method uses active damping (AD) by adding a proportional control loop of filter capacitor current, but this method needs additional sensor to measure filter capacitor current; moreover, when the control loops are digitally implemented, the computation delay in AD control loop will lead to some difficulties in choosing control parameters and maintaining system stability. This paper presents current control scheme for the grid connected inverter with the LCL filter. The proposed scheme ensures the control of injected current into grid with AD of the resonance in the LCL filter while keeping system stability and eliminating the effect of computation delay of the AD loop. An estimation of filter capacitor current with one step ahead is performed using the discrete time observer based on measuring the injected current. This reduces the cost and increases the robustness of the system. Proportional Resonant (PR) controller is used to control the injected current. Design of control system and choosing its parameters are studied and justified in details to ensure suitable performance with adequate stability margins. Simulation and experimental results show the effectiveness and the robustness of the proposed control scheme.

In the LCL-filtered grid-tied inverter, the classical low-cost control strategy which is composed of the single converter-side current control and the unit grid voltage feedforward compensation, is commonly employed to inject the sinusoidal current into the utility. However, the inverter output admittance features the non-passive behaviour, which indicates that the harmonic currents may be amplified under the disturbances of the grid voltage and the grid impedance. Therefore, two dedicated current loops based on only the converter-side current feedback are proposed, which consist of the low-pass filter-based current regulation and the high-pass filter-based active damping (HFAD). The mixed asymmetrical regular sampling method is further used to reduce the control delay of the HFAD. Moreover, the low-pass filter-based feedforward is developed to make a compromise between the disturbance rejection and the stability. Fair comparisons with other typical control strategies are made through analysing the virtual resistor in parallel with the filter capacitor, which reveals that the positive virtual resistance at the frequency lower than half of the switching frequency is maintained. With the elaborated control parameters, the exhaustive experimental results finally verify the effectiveness of the proposed method in passivating the inverter output admittance.

The critical conduction mode (CRM) boost power factor correction (PFC) converter is widely used in low-to-medium power applications due to its low switching loss and simple control. In order to compensate the negative inductor current, variable on-time control provides a longer on -time near the zero-crossing input voltage, where the input voltage v in varies sharply especially in 360–800 Hz applications. Therefore, it is imprecise to assume that v in is constant during the switching period. Considering that v in is variable during the switching period, an accurate operation analysis is studied in this article. Moreover, a comparative analysis between the proposed accurate operation analysis and imprecise assumption-based operation analysis is conducted. Based on the operation analysis, an input filter capacitor (IFC) current compensation method is proposed to minimize the phase-leading caused by IFC current in the input current. The effectiveness of the proposed methods is verified with a 160 W gallium nitride-based CRM boost PFC converter. With the proposed methods, the input current total harmonic distortion is only 1.7% at 360 Hz input with full load and 2.42% at 800 Hz input with full load.

The adoption of low-voltage DC microgrid at a large scale is hindered by the lack of an effective protection scheme. This work proposes a dedicated protection scheme based on multi-threshold current values, which enhances the security of the system by avoiding the risk of false tripping. This is achieved in a few milliseconds without losing the deadline of critical fault clearing time post, which the voltage sources converter interfaced power sources may get disrupted leading to de-energisation of the system. The algorithm relies upon the transient response of the series resistor–inductor–capacitor (R–L–C) equivalent circuit having initially charged filter capacitors. The threshold values of the fault current for each protection device at every network node are set locally by considering the weakest fault criterion. The extensive simulation study has been performed on MATLAB/Simulink for validating the reliability of the proposed algorithm under heavy load transient, at different fault locations, and with high fault resistance.

In critical conduction mode (CRM) boost power factor correction (PFC) converters, the input filter capacitor (IFC) is used to limit the propagation of switching noise into the ac line and the inherently existing parasitic capacitance of power semiconductor devices resonates with the boost inductor to achieve soft switching, which is voltage dependent and nonlinear. However, IFC leads to the crossover distortion of the rectified input voltage and thus the zero-crossing distortion of input current, which is ignored at the utility line frequency (50–60 Hz) since the effect of IFC is relatively small in this case. However, for wide variable frequency (360–800 Hz) power system, the effect of IFC becomes severe and unnegligible, which causes the deterioration of input current total harmonics distortion (THD). Besides, the nonlinearity of the parasitic capacitance is ignored and an equivalent constant linear capacitance is used in existing variable on-time (VOT) controls, which will cause the inaccuracy of VOT control, and thus, exacerbates the input current distortion. In order to improve the input current THD at high line frequency, this article proposes the IFC compensation method to minimize the effect of IFC and a variable parameter control is also achieved to suppress the effect of nonlinear parasitic capacitance. The experimental results of an 115-Vac-input 160-W/270-Vdc-output CRM boost PFC prototype are presented to verify the effectiveness and advantages of the proposed VOT methods. With the proposed methods, the input current THD is only 2.04% at 360 Hz input with full load and 3.14% at 800 Hz input with full load.