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29 results on '"Fraschke, Mirko"'

1. Integration of Memristive Devices into a 130 nm CMOS Baseline Technology

Author

Mahadevaiah, Mamathamba Kalishettyhalli, Lisker, Marco, Fraschke, Mirko, Marschmeyer, Steffen, Perez, Eduardo, Quesada, Emilio Perez-Bosch, Wenger, Christian, Mai, Andreas, Kasabov, Nikola, Series Editor, Amari, Shun-ichi, Editorial Board Member, Avesani, Paolo, Editorial Board Member, Benuskova, Lubica, Editorial Board Member, Brown, Chris M., Editorial Board Member, Duro, Richard J., Editorial Board Member, Georgieva, Petia, Editorial Board Member, Hou, Zeng-Guang, Editorial Board Member, Indiveri, Giacomo, Editorial Board Member, King, Irwin, Editorial Board Member, Kozma, Robert, Editorial Board Member, König, Andreas, Editorial Board Member, Mandic, Danilo, Editorial Board Member, Masulli, Francesco, Editorial Board Member, Thivierge, JeanPhilippe, Editorial Board Member, Villa, Allessandro E.P., Editorial Board Member, Ziegler, Martin, editor, Mussenbrock, Thomas, editor, and Kohlstedt, Hermann, editor

Published
2024
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4. Tunable Schottky barrier and high responsivity in graphene/Si-nanotip optoelectronic device

Author

Di Bartolomeo, Antonio, Giubileo, Filippo, Luongo, Giuseppe, Iemmo, Laura, Martucciello, Nadia, Niu, Gang, Fraschke, Mirko, Skibitzki, Oliver, Schroeder, Thomas, and Lupina, Grzegorz

Subjects
Condensed Matter - Mesoscale and Nanoscale Physics
Abstract

We demonstrate tunable Schottky barrier height and record photo-responsivity in a new-concept device made of a single-layer CVD graphene transferred onto a matrix of nanotips patterned on n-type Si wafer. The original layout, where nano-sized graphene/Si heterojunctions alternate to graphene areas exposed to the electric field of the Si substrate, which acts both as diode cathode and transistor gate, results in a two-terminal barristor with single-bias control of the Schottky barrier. The nanotip patterning favors light absorption, and the enhancement of the electric field at the tip apex improves photo-charge separation and enables internal gain by impact ionization. These features render the device a photodetector with responsivity (3 A/W for white LED light at 3 mW/cm2 intensity) almost an order of magnitude higher than commercial photodiodes. We extensively characterize the voltage and the temperature dependence of the device parameters and prove that the multi-junction approach does not add extra-inhomogeneity to the Schottky barrier height distribution. This work represents a significant advance in the realization of graphene/Si Schottky devices for optoelectronic applications., Comment: Research paper, 22 pages, 7 figures

Published
2016
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11. Graphene/Silicon Schottky diodes

Author

DI BARTOLOMEO, Antonio, Giubileo, Filippo, Luongo, Giuseppe, Iemmo, Laura, Martucciello, Nadia, Niu, Gang, Fraschke, Mirko, Skibitzki, Oliver, Schroeder, Thomas, and Lupina, Grzegorz

Published
2017

12. (Invited) Si1-xGex/Si MQW Based Uncooled Microbolometer Development and Integration into 130 nm BiCMOS Technology

Author

Baristiran Kaynak, Canan, primary, Yamamoto, Yuji, additional, Göritz, Alexander, additional, Korndoerfer, Falk, additional, Zaumseil, Peter, additional, Kulse, Philipp, additional, Schulz, Katrin, additional, Fraschke, Mirko, additional, Marschmeyer, Steffen, additional, Wolansky, Dirk, additional, Wietstruck, Matthias, additional, Shafique, Atia, additional, Gurbuz, Yasar, additional, and Kaynak, Mehmet, additional

Published
2018
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14. BiCMOS Integrated Microfluidic Packaging by Wafer Bonding for Lab-on-Chip Applications

Author

Inac, Mesut, primary, Wietstruck, Matthias, additional, Goritz, Alexander, additional, Cetindogan, Barbaros, additional, Baristiran-Kaynak, Canan, additional, Marschmeyer, Steffen, additional, Fraschke, Mirko, additional, Voss, Thomas, additional, Mai, Andreas, additional, Palego, Cristiano, additional, Pothier, Arnaud, additional, and Kaynak, Mehmet, additional

Published
2017
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17. Geometric conductive filament confinement by nanotips for resistive switching of HfO2-RRAM devices with high performance

Author

Niu, Gang, primary, Calka, Pauline, additional, Auf der Maur, Matthias, additional, Santoni, Francesco, additional, Guha, Subhajit, additional, Fraschke, Mirko, additional, Hamoumou, Philippe, additional, Gautier, Brice, additional, Perez, Eduardo, additional, Walczyk, Christian, additional, Wenger, Christian, additional, Di Carlo, Aldo, additional, Alff, Lambert, additional, and Schroeder, Thomas, additional

Published
2016
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18. (Invited) Optimized HfO2-Based MIM Module Fabrication for Emerging Memory Applications

Author

Kalishettyhalli, Mamathamba, Lisker, Marco, Fraschke, Mirko, Marschmeyer, Steffen, Schmidt, Detlef, Wenger, Christian, Perez, Eduardo, and Mai, Andreas

Abstract

In this work we have investigated the influence of three different fabrication approaches on the electrical behavior of HfO2-based MIM stacks which are most popularly used in RRAM technologies. Two specific MIM layouts are analyzed to verify the electrical performance of the devices. The electrical characterization of the MIM devices are performed on wafer-scale and the characteristics of the devices are compared in terms of leakage currents, breakdown voltages, capacitances and Q-factors. Additionally, the RRAM switching behavior is investigated in terms of forming, reset and set process steps.

Published
2019

20. Graphene based electron field emitter

Author

Wenger, Christian, primary, Kitzmann, Julia, additional, Wolff, André, additional, Fraschke, Mirko, additional, Walczyk, Christian, additional, Lupina, Gregorz, additional, Mehr, Wolfgang, additional, Junige, Marcel, additional, Albert, Matthias, additional, and Bartha, Johann W., additional

Published
2015
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22. (Invited) Combining SiGe BiCMOS and InP Processing in an on-top of Chip Integration Approach

Author

Lisker, Marco, primary, Trusch, Andreas, additional, Krüger, Andreas, additional, Fraschke, Mirko, additional, Kulse, Philipp, additional, Marschmeyer, Steffen, additional, Schmidt, Jens, additional, Meliani, Chafik, additional, Tillack, Bernd, additional, Weimann, Nils, additional, Kraemer, Tomas, additional, Ostermay, Ina, additional, Krüger, Olaf, additional, Jensen, Thomas, additional, Al-Sawaf, Thualfiqar, additional, Krozer, Viktor, additional, and Heinrich, Wolfgang, additional

Published
2014
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26. Impact of Temperature on the Resistive Switching Behavior of Embedded \HfO2-Based RRAM Devices.

Author

Walczyk, Christian, Walczyk, Damian, Schroeder, Thomas, Bertaud, Thomas, Sowinska, Małgorzata, Lukosius, Mindaugas, Fraschke, Mirko, Wolansky, Dirk, Tillack, Bernd, Miranda, Enrique, and Wenger, Christian

Subjects
SWITCHING circuits, TEMPERATURE effect, COMPLEMENTARY metal oxide semiconductors, ELECTRIC resistance, ENERGY levels (Quantum mechanics), POINT defects, HAFNIUM oxide, RANDOM access memory, BIPOLAR transistors, ELECTRIC contacts
Abstract

Back-end-of-line integrated \1 \times \1\ \mu\m^2 \ \TiN/HfO_2/\break \Ti/TiN MIM memory devices in a 0.25-\mu\m complementary metal–oxide–semiconductor technology were built to investigate the conduction mechanism and the resistive switching behavior as a function of temperature. The temperature-dependent I–V characteristics in fresh devices are attributed to the Poole–Frenkel mechanism with an extracted trap energy level at \phi \approx \0.2\ \eV below the \HfO2 conduction band. The trap level is associated with positively charged oxygen vacancies. The electroformed memory cells show a stable bipolar switching behavior in the temperature range from 213–413 K. The off -state current increases with temperature, whereas the on-state current can be described by a weak metallic behavior. Furthermore, the results suggest that the I–V cycling not only induces significant changes in the electrical properties of the MIM memory devices, i.e., the increase in the off-state current, but also stronger temperature dependence. The temperature effect on the on-state and off-state characteristics is modeled within the framework of the quantum point-contact model for dielectric breakdown using an effective temperature-dependent confinement potential. [ABSTRACT FROM PUBLISHER]

Published
2011
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27. (Invited) Combining SiGe BiCMOS and InP Processing in an on-top of Chip Integration Approach

Author

Lisker, Marco, Trusch, Andreas, Kruger, Andreas, Fraschke, Mirko, Kulse, Philipp, Marschmeyer, Steffen, Schmidt, Jens, Meliani, Chafik, Tillack, Bernd, Weimann, Nils, Kraemer, Tomas, Ostermay, Ina, Kruger, Olaf, Jensen, Thomas, Al, Thualfiqar, Krozer, Viktor, and Heinrich, Wolfgang

Abstract

Applications such as radar imaging and wideband communications are driving the research on millimeter-wave circuits. For some applications SiGe hetero junction bipolar transistors (HBTs) are limited in output power. III-V technologies (like InP) can realize devices showing a high product of peak transit frequency multiplied with the open base breakdown voltage. Therefore, merging the qualities of both III-V and Si technology will enable a new class of high-performance ICs. Our approach combines an InP-DHBT transferred-substrate process with a Si-BiCMOS process. The key method is an aligned face-to-face wafer bonding with a subsequent removal of the InP substrate. Different integrated signal sources with an output frequency up to 246 GHz were designed and produced using different combinations of BiCMOS and InP circuit building blocks to demonstrate the capabilities of the hetero-integration routine. In this paper the influences of the wafer bonding and the finalization of the InP-DHBT process on SiGe devices were investigated. It was found that the influences on the BiCMOS devices were rather small.

Published
2014

28. InP-Si BiCMOS Heterointegration Using a Substrate Transfer Process

Author

Lisker, Marco, Trusch, Andreas, Kruger, Andreas, Fraschke, Mirko, Kulse, Philipp, Borokhovych, Yevgen, Tillack, Bernd, Ostermay, Ina, Kramer, Tomas, Thies, Andreas, Kruger, Olaf, Schmuckle, Josef, Krozer, Viktor, and Heinrich, Wolfgang

Abstract

Broadband transmitters for radio links in the mm-wave range are key building blocks for future wireless communication systems. In this work such components are to be realized by means of an InP-on-BiCMOS technology. This allows the combination of the favorable power performance of III-V transistors with the advantages of BiCMOS circuits such as complexity and integration density.This helps to avoid critical performance trade-offs compared to the pure III-V or BiCMOS versions. The heterointegration technology allows the integration of sub-mm-wave front-ends together with control logics and other lower-frequency components on a single chip. This drastically reduces packaging efforts. The strategy is to rely on BiCMOS as far as possible and to apply III-V elements only for functions for which they show clear superiority. In a first run the passive elements and the dc- and rf-interconnects between InP and BiCMOS were tested. This test showed the feasibility of the wafer bond process for the heterointegration of InP and BiCMOS. For that purpose a five metal layer Al back-end with silicon dioxide as interlayer dielectric was built on the silicon wafer. A three layer metallization (Au) in benzocyclobutene (BCB) as insulating dielectric represented the environment for the InP-HBTs. Thin film micro strip lines and special designed interconnects between the two metallization systems were characterized in dependence of frequencies up to 100 GHz to estimate the insertion losses.

Published
2013

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