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In recent years, various methods for hotspot detection during optical proximity correction (OPC) verification have been studied. They try to predict hotspots by analyzing optical features of aerial image such as peak intensity. However, detection accuracy in these conventional methods is still not sufficient. We cannot distinguish hotspots from nonhotspots by only focusing on aerial image of hotspot because one often becomes hotspot and the other does not despite of the same aerial images. On the other hand, optical features of pattern next to the hotspot are different even in such a case. Therefore, optical features which are extracted from surrounding patterns of hotspot are one of the promising metrics for hotspot detection. In this paper, we propose a new method to detect hotspots more accurately. A new metric, Surrounding Optical Feature (SOF), is introduced. SOF indicates optical features which are extracted from surrounding pattern of the evaluated pattern. The optical feature includes critical dimension (CD), normalized image log-slope (NILS), integral intensity, peak intensity of optical image. The proposed method consists of two steps. In step 1, appropriate SOF is extracted by using training data. In step 2, OPC verification is carried out with the SOF. The effectiveness of the proposed method is confirmed in the experimental comparisons.

Although self-aligned double and quadruple patterning (SADP, SAQP) have promising processes for sub-20 nm node advanced technologies and beyond, not all layouts are compatible with them. In advanced technologies, feasible wafer image should be generated effectively by utilizing SADP and SAQP where a wafer image is determined by a selected mandrel pattern. However, predicting a mandrel pattern is not easy since it is different from the wafer image (or target pattern). In this paper, we propose new routing methods for spacer-is-dielectric (SID)-type SADP, SID-type SAQP, and spacer-is-metal (SIM)-type SADP to generate a feasible layout satisfying the connection requirements. Routing algorithms comprising simple connecting and cutting rules are performed on a new grid structure where two (SID-type SADP) or three colors (SID-type SAQP and SIM-type SADP) are assigned alternately to grid-nodes. Then a mandrel pattern is selected without complex coloring or decomposition methods. Also, we try to reduce hotspots (potentially defective regions) by the proposed dummy pattern flipping for SID-type SADP. In experiments, feasible layouts meeting the connection requirements are generated and the effectiveness of the proposed framework is confirmed.

Self-Aligned Quadruple Patterning (SAQP) will be one of the leading candidates for sub-14nm node and beyond. However, compared with triple patterning, making a feasible standard cell placement has following problems. (1) When coloring conflicts occur between two adjoining cells, they may not be solved easily since SAQP layout has stronger coloring constraints. (2) SAQP layout cannot use stitch to solve coloring conflict. In this paper, we present a framework of SAQP-aware standard cell placement considering the above problems. When standard cell is placed, the proposed method tries to solve coloring conflicts between two cells by exchanging two of three colors. If some conflicts remain between adjoining cells, dummy space will be inserted to keep coloring constraints of SAQP. We show some examples to confirm effectiveness of the proposed framework. To our best knowledge, this is the first framework of SAQP-aware standard cell placement.

Highly charged ion is useful to produce nanostructure on various materials, and is key tool to realize single ion implantation technique. On such demands for the application to nanotechnology, we have designed an electron bean ion source. The design stresses on the volume of drift tubes where highly charged ions are confined and the efficiency of ion extraction from the drift tube through collector electrode in order to obtain intense ion beam as much as possible. The ion source uses a discrete superconducting magnet cooled by a closed-cycle refrigerator in order to reduce the running costs and to simplify the operating procedures. The electrodes of electron gun, drift tubes, and collector are enclosed in ultrahigh vacuum tube that is inserted into the bore of the magnet system.

The structure of CH4 monolayer physisorbed on a Ag (111) surface was observed by LEED. The LEED patterns were recorded with suppressed electron current using a cooled CCD camera in order to minimize the electron stimulated desorption of adsorbed CH4. The LEED pattern indicated that the lattice of CH4 molecules forms hexagonal structure in rotationally ordered incommensurate state. Under specific equilibrium condition, intermediate state with the coverage less than unity was found to exist.

Self-Aligned Quadruple Patterning (SAQP) is one of the most leading techniques in 14 nm node and beyond. However, the construction of feasible layout configurations must follow stricter constraints than in LELELE triple patterning process. Some SAQP layout decomposition methods were recently proposed. However, due to strict constraints required for feasible SAQP layout, the decomposition strategy considering an arbitrary layout does not seem realistic. In this paper, we propose a new routing method for feasible SAQP layout requiring no decomposition. Our method performs detailed routing by correct-by-construction approach and offers compliant layout configuration without any pitch conflict.

In this paper, we propose a new flexible routing method for Self-Aligned Double Patterning (SADP). SADP is one of the most promising candidates for patterning sub-20 nm node advanced technology but wafer images must satisfy tighter constraints than litho-etch-litho-etch process. Previous SADP routing methods require strict constraints induced from the relation between mandrel and trim patterns, so design freedom is unexpectedly lost. Also these methods assume to form narrow patterns by trimming process without consideration of resolution limit of optical lithography. The proposed method realizes flexible SADP routing with dynamic coloring requiring no decomposition to extract mandrel patterns and no worries about coloring conflicts. The proposed method uses realizable trimming process only for insulation of patterns. The effectiveness of the proposed method is confirmed in the experimental comparisons.

Computational spacer patterning technology (SPT) has been developed for the first time to address the challenges concerning hotspots and mask specifications in SPT. A simulation combined with a lithography, etching and deposition model shows the strong correlation of 0.999, 0.993, 0.980 with the experimental critical dimension (CD), mask error-enhancement factor (MEEF) and defect printability through a series of spacer processes, respectively. Furthermore, a design for manufacturability (DfM) flow using computational SPT can find hotspots caused by spacer patterning processes as well as those caused by lithography process and help designers make the circuit layout more robust. Besides, a newly defined MEEF and defect printability, which are primary metrics for mask specification, can be predicted so accurately by using computational SPT that the new scheme to determine appropriate mask specifications is shown to be feasible under the spacer patterning process condition. Thus, computational SPT is found to be promising for addressing the challenges concerning hotspot removal and mask specification in the upcoming 20-30nm node and beyond.

A neural network (NN)-based approach with a lumped model is found to be much more promising to predict process proximity effects (PPEs) caused through space patterning processes than a conventional tandem-based approach with a consecutive physical model. The NN-based lumped approach can improve PPE prediction accuracy by 25% compared to the conventional tandem-based approach, subject to the same workload of experimental data acquisition, and reach the specification of PPE residual in 3x nm node with smaller amounts of data volume than any other approach. Process proximity correction scheme using the NN-based lumped model built for 3x nm node can achieve the expected correction accuracy for various kinds of one-dimensional patterns. It is anticipated that the NN-based lumped PPE prediction model will greatly improve the prediction and/or correction accuracy in the space patterning technology process for 3x nm node and beyond.

Flow of fixing of hot spot induced by optical variation among exposure tools is discussed for quick ramp-up of high volume products. To achieve robust pattern formation for optical variation, following hot spot detection and fixing approaches are introduced: i) at the design stage, hot spot detection within the optical variation space and hot spot fixing by layout modification or OPC optimization, ii) in order to efficiently detect hot spots within the optical variation space, lithography simulation by combinations of optical parameters determined by the design of experiment (DoE), iii) at the manufacturing stage, hot spot fixing by adjustment of optical parameters using the multi-variable optimization to match OPE between the primary and secondary exposure tool.

Robust optical proximity correction (OPC) and design for manufacturability (DFM) methodology for optical variation among exposure tools is proposed. It is demonstrated that application of the methodology improves standard deviation of CD difference for target CD by 33% compared with the case of using the conventional methodology. Under the low-k1 lithography condition, hot spots induced by optical variation among exposure tools delay ramp-up of production of high-volume products. To realize robust pattern formation for all exposure tools, the following new methodologies are introduced : i) OPC modeling methodology using actual optics of primary tool, ii) OPC processing methodology using averaged or designed optics, iii) at the design stage, hot spot detection within the optical variation space centered on average or designed optics and hot spot fixing by layout modification or OPC optimization, iv) at the manufacturing stage, hot spot detection using actual optics and hot spot fixing by optical adjustment of troubled tool.