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This paper proposes a two step fault detection scheme for medium-voltage dc (MVDC) networks based on wavelet analysis. The proposed Grid Transients Classifier (GTC) is used to continuously monitor energy of wavelet packet decomposition levels (WPDL) for voltage and current signals to determine any transient disturbance like load change, pole to pole (PP) or pole to ground (PG) faults, pole to pole to ground (PPG), voltage sags, switching, etc. Subsequently, type of disturbance is identified through an artificial neural network (ANN) classifier. Then, proposed Active Grid Impedance Estimator (AGIE) injects a signal with two fundamental frequencies to evaluate grid impedance from the measurement point in new condition. Using the obtained data, fault type, location and its severity are specified. Hardware-in-the-Loop (HIL) results are provided for a shipboard grid case study to validate the real-time application of the proposed method and demonstrate its effectiveness.

A high-voltage operation and breakneck switching speed of medium-voltage (MV) silicon carbide (SiC) devices demand gate drivers (GDs) with high voltage withstanding capability, high common-mode (CM) transient immunity and a reliable short-circuit protection. An isolated GD to meet these challenging requirements is presented in this article. A novel isolated gate driver power supply using high-frequency wireless power transfer (WPT) with a nonoverlapped winding arrangement for a small coupling capacitance is proposed. Moreover, a grounded shield is added to further reduce the effective coupling capacitance and the CM current. The receiver (Rx) coil of the WPT system along with its power processing circuit have been epoxy encapsulated to achieve a very high breakdown voltage and an extremely small form factor without violating very demanding clearance and creepage distance requirements. The impact of epoxy, winding arrangement, Rx circuits, and the grounded shield on the coupling capacitance is analyzed in details. In addition, a sophisticated overcurrent protection (OCP) scheme with soft-turn- off capability for MV SiC devices is developed. The designed OCP scheme achieves fast protection and simultaneously avoids false tripping due to very high current overshoot associated with the MV SiC devices during turn- on transitions. An experimental prototype is developed and the performance of the proposed GD under various operating conditions is evaluated experimentally.

This paper evaluates the Electromagnetic Interference (EMI) caused by Active Neutral Point Clamped (ANPC) phase leg undergoing Zero Voltage Switching (ZVS). ZVS, together with a high fundamental frequency operation is encountered in Dual Active Bridge (DAB) converters. This allows ANPC phase leg to be operated in a different manner than its inverter counterpart. A comprehensive evaluation of four switching schemes for NPC/ANPC-DAB with regard to their EMI performance, voltage overshoot, and losses have been done. Switching state redundancies have been used to reduce the EMI of the ANPC phase leg. To further help in reduction of high frequency EMI and voltage overshoot, a low inductance busbar design has been presented for through-hole discrete devices. Finite element simulation and measurement results show a busbar inductance of 7.7 nH for long commutation loops. Finally, EMI performance (conducted and radiated) together with the busbar design have been experimentally validated for two of the most useful switching schemes. The switching schemes and the busbar design can boost adoption of NPC/ANPC-DAB by ensuring EMI compliance and improved efficiency without affecting the normal DAB operation or using additional hardware.

Medium-voltage (MV) silicon carbide (SiC) devices have opened up new areas of applications which were previously dominated by silicon-based IGBTs. From the perspective of a power converter design, the development of MV SiC devices eliminates the need for series connected architectures, control of multilevel converter topologies which are necessary for MV applications, and the inherent reliability issues associated with it. However, when SiC devices are used in these applications, they are exposed to a high peak stress (5–10 kV) and a very high $dv/dt$ (10–100 kV/ $\mu$ s). Using these devices calls for a gate driver with a dc–dc isolation stage that has ultralow coupling capacitance in addition to be able to withstand the high isolation voltage. This paper presents a new MV gate driver design to address these issues while maintaining a minimal footprint for the gate driver. An MV isolation transformer is designed with a low interwinding capacitance, while maintaining the clearance, creepage, as well as insulation standards. A dc isolation test has been performed to validate the integrity of the insulating material. The key features include low input common mode current, and a short-circuit protection scheme specifically designed for 10 kV SiC mosfet s. The performance of the gate driver is evaluated using double pulse tests and continuous tests. Experimental results validate the advantages of the gate driver and its application for MV SiC devices exhibiting very high $dv/dt$ . The proposed gate driver concept is aimed at providing an efficient and reliable method to drive MV SiC devices.

With the increasing energy demand and stress on the conventional power grid, focus has shifted towards integrating Renewable Energy Sources (RES), with smart devices into the grid. In order to incorporate smart devices and energy efficient resources, with real-time control of energy supply and demand, Energy Routers (ER) are required. ER is an intelligent ac-dc interface for RES and grid integration, which dynamically manages the energy supply/demand and information exchange within the grid. This paper discusses the architecture and control of Grid Forming (GFM) ER proposed for Solar/Photovoltaic (PV) and Energy Storage (ES) grid integration applications. Proposed GFM control emulates the behavior of a Synchronous Machine (SM) to reduce or even eliminate the frequency deviations and grid instability issues due to low inertia of inverter based RES resulting in efficient and stable RES and grid integration.

This paper presents an optimal design method of the double-sided LCC (Inductor-capacitor-capacitor) compensation network to achieve a high efficiency by optimizing compensation factors of the primary and secondary circuit of an inductive power transfer (IPT) system. Simulation and experimental results show that with a proper selection of the compensation factors, it is possible to achieve a high and sustained efficiency over a wide load variation and misalignment. The double-sided LCC topology is compared with the LCC-S (S: series) and LCC-P (P: parallel) topology in terms of the transfer efficiency at the operating frequency of 85kHz, transfer gap of 160mm and misalignment up to 90mm. The result reveals that the designed double-sided LCC topology is superior to its counterparts in terms of transfer efficiency. A deep discussion of these topologies is included to provide insights for all three topologies analyzed in this paper.

The increasing integration of Renewable Energy Sources (RES) with smart sensing devices, advanced control, and integrated communication in smart grid has surged the motivation towards improving power density, efficiency, and reducing the size/weight of power converters. This has shifted the focus on planar magnetics as components such as inductor, transformer account for major share of losses and volume in a converter. Planar magnetics replace the traditional wire-wound structure with windings on Printed Circuit Board (PCB), or using thin copper sheets resulting in low profile and high power density. The design of a planar transformer for Dual Active Bridge (DAB) for RES and grid integration applications is discussed in this paper. Multi-objective optimization is conducted with objectives of reducing losses and overall volume of DAB with a planar transformer. A planar transformer hardware prototype for DAB was constructed and tested to demonstrate transformer performance and advantages of this design approach.

Integrating Energy Storage (ES) with intermittent Renewable Energy Sources (RES) is critical for wide-spread adoption of RES. Such systems offer several system-level advantages such as participation in demand response programs, demand charge reduction, arbitrage to maximize time-of-use rates, and increase resilience. For efficient and cost-effective integration of ES with RES, a Multi-Port Converter (MPC) is highly desirable. An isolated Triple Active Bridge (TAB) converter for Solar Photovoltaic (PV) and battery (ES) integration is discussed in this paper. Multi-objective optimization of this topology, for interfacing 10 kVA PV-ES system with 240 V AC grid, is conducted with the objectives to reduce losses and overall volume of the MPC. Finite Element Analysis (FEA) is performed to validate the outcome of the analytical modeling based optimization procedure. A control scheme to manage power flow between AC grid, PV, and ES is designed, and several case scenarios are simulated to demonstrate advantages of the proposed approach in enabling high RES penetration.

This paper presents an inductive power transfer (IPT) system for vehicle-to-vehicle (V2V) charging applications utilizing an intermediate coil. Two different intermediate coil structures are discussed and compared, which shows that a concentrated winding brings a higher mutual inductance. Furthermore, different matching networks, namely series-series-series (SSS) and LCC-S-LCC, are analyzed for the V2V IPT application. The analysis shows that by properly selecting compensation factors, the LCC-S-LCC topology can provide higher and more stable efficiency than the former counterpart. In addition, power flow analysis has been performed, which shows the relation between transferred power and phase angle between input and output inverter’s voltage. As a result, the phase angle is utilized to control the power flow between the two EVs. PLECS simulations are performed to verify the proposed concept and analysis.

Emerging medium voltage (MV) Silicon Carbide (SiC) 10 kV MOSFETs have low on-state resistance and are capable of very high switching speeds. As a result, a highly efficient and compact MV power conversion system can be realized using these devices, which is desirable for many existing and emerging high power applications. However, at very high switching speeds in MV, leads to extremely high dV/dt during switching transitions. This gives rise to increased attention towards circuit parasitics as the parasitic capacitance of the filter components provides a path for the high-frequency current. Therefore, a very high dV/dt operation imposes a strict requirement on the parasitic capacitance of the filter components to meet the stringent conducted ElectroMangnetic Interference (EMI) standards. A design methodology to reduce the parasitic capacitance of the filter inductor in MV power conversion is proposed. The Analytical model of the parasitic capacitance is developed, and compared with finite element analysis along with actual value measurements through an impedance analyzer. The inductors performance is also evaluated experimentally using an XHV-9 module-based Power Electronic Building Block (PEBB).

Sub-Modules (SM) are basic building blocks in Modular Multi-level converters (MMC). Multiple Sub-Module topologies with two capacitors per SM are reported in the literature. These SMs are termed as Double-Capacitor Sub-Modules (DCSM) in this paper. The motivation behind the evolution of these DCSMs includes the introduction of DC-side short circuit withstanding capability and reduction in the effective number of devices per SM. Some DCSMs has the feature to have a parallel connection of its capacitors. This helps in reducing the SM capacitor voltage ripple at lower switching frequencies. In this paper, a sorting-selecting based modulation scheme for different DCSMs is presented. The traditional sorting-selecting modulation technique either inserts or bypasses SMs depending on the arm current direction. However, the sorting-selecting algorithm used for DCSMs needs to decide the operating mode of the inserted SM as well. The algorithm to select the SMs is improvised for DCSMs with capacitor paralleling feature. This proposed algorithm helps in the decision making of the series/parallel capacitor connection in the inserted DCSM. A detailed analysis of the proposed sorting-selecting algorithm is performed along with the simulation studies to validate the scheme.

A DC-DC converter is an essential component in Hybrid Electric Vehicle (HEV) to achieve power transfer from High Voltage bus (HV) to Low Voltage bus (LV) and vice-versa. Very high current on the LV side of the high power DC-DC converter in a heavy-duty hybrid vehicle makes its design extremely challenging. Dual Active Bridge with an integrated matrix planar transformer is considered due to its advantages over other existing topologies, such as the ability to handle very high current on the LV side, bi-directional power flow, high power density, zero voltage switching capability, and high modularity. An integrated planar Matrix transformer is chosen for galvanic isolation, as it helps in handling very high current on the LV side efficiently. Multi-Objective Design Optimization, with low converter loss and low converter volume as its objectives, is used as a basis of parameters and components design. Current-mode control is implemented to achieve a fast response and avoid transformer saturation due to the DC flux injection during the transients. The design algorithm and control scheme has been experimentally verified.

Large scale integration of Renewable Energy Sources (RES) with smart devices into the grid is becoming an attractive concept to meet increasing energy demand, and to reduce the stress on conventional grid. However, it comes with its concerns of controlling large number of inverter based RES, with low inertial energy to achieve grid stability and efficient power transfer among RES, grid, and the loads. In order to incorporate smart devices and energy efficient RES with real-time control of energy supply and demand, Grid Forming (GFM) Energy Routers (ER) are required. ER is a compact, intelligent ac-dc interface for RES and grid integration, which dynamically manages the energy supply/demand and information exchange within the grid. GFM control emulates the behavior of a Synchronous Machine (SM) to reduce/eliminate the frequency deviations and grid instability issues due to low inertia of inverter based RES, resulting in efficient and stable RES and grid integration. This paper investigates the stability response and load control of proposed GFM ER for RES and grid integration.

Reduction in the Levelized Cost of Energy (LCOE) can drive the widespread adoption of the PV and can contribute to sustainable development. Large scale PV parks are gaining popularity, thanks to its low LCOE compared to the commercial and residential scale PV. Further, LCOE reduction can be achieved by migrating from the low voltage AC to the Medium Voltage (MV) DC collection network. A re-configurable Two-stage boost LLC resonant converter is proposed for the MVDC integration of large PV parks. Detailed analytical loss models of the semiconductor devices and magnetic components have been developed, and multi-objective optimization has been performed to obtain losses and volume optimized design. A 7kV, 25kW converter is developed to validate the analysis.

With the recent advancement in semiconductor technology, SiC Mosfets with a high blocking voltage, e.g. 10kV, and a high switching frequency, e.g. 100kHz, has been fabricated and bring great opportunities for medium voltage (MV) converters to have a high power density while achieving simple architectures compared to conventional multilevel converters. However, the high blocking voltage and high switching frequency results in a high dV/dt during switching transients, causing a serious common-mode (CM) current noise that circulates through gate driver (GD) and control circuit, which can interrupt the operation of the MV converters. Therefore, in order to ensure a proper operation of the MV converters, gate driver power supplies (GDPSs) should have a low coupling capacitance as well as a high voltage insulation. This paper presents a compact dual-output isolated power supply (PS) powering GD circuits of medium voltage (MV) converters, which satisfies the two above requirements. The impact of rectifier and shielding on the coupling capacitance is analyzed in details. The proposed PS is based on the principle of wireless power transfer (WPT) with one transmitter (Tx) coil powering two receiver (Rx) coils simultaneously at the operation frequency of 4MHz. These coils are fabricated on a single PCB. Measurements are performed to validate the designed gate driver power supply (GDPS) and show that it achieves a compact size and a high voltage isolation while maintaining a low coupling capacitance.

Neutral Point Clamped (NPC) converter configuration is suitable for operation at Medium Voltage DC (MVDC) level as it allows the use of a higher DC bus voltage than the blocking capability of individual switching devices. The Active NPC (ANPC) configuration offers more flexibility than NPC in terms of control and power loss distribution. NPC/ANPC phase leg aspires to be an ideal candidate for the MVDC side of a Dual Active Bridge (DAB) converter which is used in a wide range of applications requiring bidirectional power flow, voltage matching and soft-switching. Operation under Zero Voltage Switching (ZVS) and the conducted Electromagnetic Interference (EMI) performance of the ANPC converter phase leg is being analyzed in this paper. Based on the analysis, a Printed Circuit Board (PCB) bus-bar has been designed to suppress the high frequency conducted EMI of the system. Minimization of parasitic capacitance from drain to heat sink has also been discussed.

This paper evaluates the performance of a 10kV SiC MOSFET based direct Medium Voltage (MV) connected Extreme Fast Charger (XFC) for Electric Vehicle (EV) charging applications. Two-stage converter topology is considered, where the Active Front End (AFE) is directly connected to the 4.16kV MV grid. The MVDC output of the AFE is processed by the isolated DC-DC converter to achieve the output voltage that is compatible with the EV battery. Thanks to the reconfiguration capability, the proposed XFC can charge both 400V and 800V EVs without any significant performance degradation. The data collected through experimental characterization of the 10kV SiC MOSFETs is used for simulating the complete converter of MV-XFC and performing loss analysis through MV SiC modeling in PLECs software. Analytical transformer losses and multiobjective design optimization are obtained using MATLAB. Based on the outcome of the multiobjective design optimization, the converter design parameters are selected and the trade-off between the loss and volume of the proposed design has been evaluated.

Wide bandgap materials such as Silicon Carbide (SiC) has enabled the use of medium voltage unipolar devices like Metal-Oxide Field Effect Transistors (MOSFETs) and Junction Field Effect Transistors (JFETs), which can switch at much higher frequencies as compared to their silicon counterparts. It is therefore imperative to evaluate the performance of these medium voltage devices. In this paper, the static characterization and the switching performance of the new single die 3.3 kV, 45 A 4H-SiC MOSFET developed by Cree Inc are presented. The switching performance is measured through the conventional Double Pulse Test. Testing is done at a dc-link voltage of 1.5 kV for different values of current, and gate resistances.

A simple scheme to realize Phase-Disposition carrier Pulse Width Modulation (PD PWM) for parallel Two-Level Voltage Source Converters (2L-VSCs) is presented in this paper. The proposed implementation only uses a single carrier signal and can easily be implemented using a digital signal processor. The operation of the parallel VSCs with the Coupled Inductor (CI), under the PD PWM is briefly discussed and the associated dc flux injection problem is investigated. A CI saturation issue during the band transition under the PD PWM scheme is also explored and the strategy to avoid this problem is presented. In addition, the proposed strategy also maintains a volt-sec balance to synthesize desired reference space voltage vector during the band transition. As a result, a smooth transition from one modulation band to the other is ensured without causing disturbances in the line-to-line voltage. The switching losses and the harmonic performance of the proposed implementation are also compared with the commonly used Phase-Shifted carrier Pulse Width Modulation (PS PWM). The implementation issues are discussed and the experimental results are also presented.

Isolated bi-directional DC-DC converter is required in many applications, such as solid-state transformer, DC distribution system for future grids, naval power systems, and electrical mobility. Dual Active Bridge (DAB) is a preferred candidate in these applications because of the soft-switching operation and bidirectional power flow capability. The conducted Electromagnetic Interference (EMI), due to high dv/dt and parasitic capacitance, of the DAB based isolated DC-DC system is analyzed. Isolated DC-DC systems based on single-phase and three-phase DAB are analyzed for different modulation schemes. Stray capacitance of the semiconductor device package and medium-frequency transformer is considered. Based on the analysis of the existing systems, an improved DC-DC converter architecture is proposed that can significantly reduce the conducted EMI. The proposed approach ensures synchronization and matching of the rising edge of the node voltage of one converter leg with the falling edge of node voltage of another converter leg to cancel the common-mode current.

Series-connected Low Voltage (LV) devices (SiC MOSFETs) is an efficient and cost-effective approach to realize Medium Voltage (MV) power switch for many emerging MV power conversion applications. This approach has low on-state resistance, which results in low conduction losses and it is more cost-effective than equivalent MV semiconductor devices. The main concern of the series connected SiC devices is unequal voltage distribution during commutation especially turn-off period. This paper proposes a closed loop active gate driver circuit which can control the rate of rise of the drain-source voltage of SiC MOSFET during turn-off and turn-on interval. The principle of operation for the active gate driver circuit is explained and based on the derived model for the control circuit, stability analysis of the closed-loop system is carried out for SiC MOSFET. Simulations were carried out using SaberRD tool and finally experimental results obtained to verify the effectiveness of the proposed technique.

Emerging Medium Voltage (MV) Silicon Carbide (SiC) 10kV/15kV MOSFETs are capable of high switching speed, which makes them highly desirable for many existing and emerging high power MV power conversion applications. One of the significant technical challenges of using these devices is extremely high dV/dt during switching transitions, imposing a stringent requirement on capacitive coupling in gate driver circuit to reduce Electromagnetic Interference (EMI). This paper presents the design of an isolated gate-driver power supply (GDPS) using a high-frequency inductive power transfer (IPT) to achieve a low coupling capacitance. The clearance and creepage requirements are met in compact form factor by encapsulating the IPT system in a potting compound. This paper provides a systematic approach for the design of the IPT system used for the isolated power supply, including coil optimization, analysis of matching network and hardware implementation. LMG5200 GaNs are utilized in the conversion circuit of the proposed IPT system which works at 4 MHz. Experiments show that the proposed IPT system is suitable to drive MV devices.

Emergence of reliable medium voltage (MV) silicon carbide (SiC) devices, has made it possible to use these for MV applications, including grid interconnections, and medium voltage drives system. In a converter structure, the isolated power supplies of the gate drivers for these MV devices experience a peak stress up to 15 kV and a very high dv/dt (up to 100 kV/μs). Exposing the gate driver to such harsh conditions leads to various challenges in providing the required insulation, and maintaining the signal fidelity (due to common mode (CM) currents across the parasitic capacitance of the transformer). The failure of gate drivers at a converter level can lead to destructive damage to the converter. This calls for a methodology to design, test and qualify the gate drivers before implementing them in the field for long-term operation. This paper provides a detailed design methodology and analysis to qualify the gate drivers for a long-term operation. The analysis and design-phase ensures reliable operation of the gate driver, and the testing and qualifying phase ensures long-term operation of the gate driver. The experimental test setup has been built and test results have been provided based on a gate driver designed for 10 kV SiC MOSFETs.

The Voltage Source Converters (VSCs) are often connected in parallel to realize a high current rating. In such systems, the harmonic quality of the output voltage can be improved by interleaving the carrier signals of the parallel VSCs. However, an additional inductive filter is often required to suppress the circulating current that flows between the parallel interleaved VSCs. One of the ways to deal with the circulating current problem is to use the coupled inductors in a whiffletree configuration. This paper proposes the integration of the line filter inductor and the circulating current filter inductor in a single magnetic component for such systems. The fundamental frequency component of the flux is mostly confined to the limbs around which the coils are placed, whereas other parts of the magnetic structure only experiences high frequency flux excitation. As a result, the integrated inductor can be made smaller and the power density of the overall converter system can be increased. The magnetic structure of the integrated inductor is analyzed and performance is verified by simulation and experimental studies.

The use of silicon carbide (SiC) devices in medium voltage (MV) applications has become a possibility due to the development of reliable MV SiC power devices. However, when SiC devices are used in these MV applications, they are exposed to a high voltage peak stress (of up to 15 kV across the primary and secondary side of the gate driver) and a very high $dv/dt$ (of up to 100 kV/μs across the isolation transformer). The gate driver design is very critical for proper functioning of the MV devices under the presence of such high dv/dt. This paper presents a design of an improved gate driver power isolation method, with a low coupling capacitance between the primary and the secondary side. The footprint of the isolation transformer is minimized to meet the clearance and insulation requirements. Comparisons have been drawn with an existing gate driver topology, on the basis of size of the gate driver, and common mode performances for different $dv/dt$ . Experimental results are provided to validate both the gate driver designs. The testing and analysis is carried out on a 10 kV SiC MOSFET developed and packaged by Wolfspeed. In addition, a brief discussion on the insulation standards for these kinds of applications is provided. The gate driver concept is aimed at providing a benchmark for building an efficient and reliable method to drive MV SiC devices.

Integration of solar energy (PV) using isolated high frequency power electronic converters to the utility grid or microgrid is fast becoming an attractive option due to the improvement in power density and elimination of the bulky low frequency transformer. This paper presents and analyzes the integration of solar energy and battery based energy storage system (ESS) to the grid using a two stage topology which includes triple port dual active bridges (DABs) and a conventional 2-level inverter. This paper considers the triple port DABs as the basic building blocks which can be connected in different configurations to meet the voltage and power requirements. Detailed simulation results are provided, investigating various operating and control modes. Experimental result showing the triple port DC-DC converter waveforms are also included. This paper shows that the triple port DAB modules along with the inverter is a viable option for large scale PV-ESS grid integration.

This paper introduces a power delivery architecture for an Extreme Fast Charging (XFC) station that is meant to simultaneously charge multiple electric vehicles (EVs) with a 300-mile range battery pack in about 15 minutes. The proposed approach can considerably improve overall system efficiency as it eliminates redundant power conversion by making use of partial power rated dc-dc converters to charge the individual EVs as opposed to a traditional fast charging station structure based on full rated dedicated charging converters. Partial power processing enables independent charging control over each EV, while processing only a fraction of the total battery charging power. Energy storage (ES) and renewable energy systems such as photovoltaic (PV) arrays can be easily incorporated in the versatile XFC station architecture to minimize the grid impacts due to multi-mega watt charging. A control strategy is discussed for the proposed XFC station. Experimental results from a scaled down laboratory prototype are provided to validate the functionality, feasibility and cost-effectiveness of the proposed XFC station power architecture.

An accurate measurement of switching losses in SiC MOSFETs is necessary in order to design and evaluate the thermal performance of modern converter systems. Conventionally, electrical measurement methods, such as the double-pulse test (DPT) are used for calculating the hard-switching losses. However, with the advent of wide-bandgap devices, which have fast switching transients, it is rather difficult to capture the waveforms accurately during switching transitions, and consequently the measurement of switch loss suffers. This paper presents an accurate calorimetric method for measuring the switching losses. The conventional calorimetric measurement methods can accurately measure the device losses. However, the segregation of the conduction, turn-on and turn-off loss is not possible. This paper addresses this issue and proposes a method that can be used to determine individual loss components. The calorimetric test setup is described and a novel modulation scheme is introduced which enables the separation of turn-on and turn-off switching losses. The experimental test setup has been built and the method has been verified by measuring the losses of a Wolfspeed CMF10120D device.

The paper presents a two phase shift control strategy for Dual Active Bridge(DAB) and Triple Active Bridge(TAB) converter to eliminate the dc transients from the high frequency transformer winding currents during operating phase angle change from one cycle to the next cycle. The proposed two phase shift method controls the alternating nature of high frequency current in transformer windings in one switching cycle without using any high frequency current sensor. The proposed control strategy applies two different phase shift angles during positive and negative half cycles in order to eliminate the dc transients from transformer winding currents during steady state phase angle change. The control strategy is analyzed and applied for power flow direction reversal of Dual Active Bridge Converter and for changing power flow mode from three port scenario to two port scenario in case of Triple Active Bridge converter. The proposed control strategy study has been verified by performing experimental study on a hardware prototype.