222 results on '"Giuseppe Tagliavini"'
Search Results
2. QR-PULP: Streamlining QR Decomposition for RISC-V Parallel Ultra-Low-Power Platforms.
3. Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms.
4. RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor (Invited Paper).
5. ANGELS - Smart Steering Wheel for Driver Safety.
6. End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture.
7. HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC.
8. DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors.
9. Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters.
10. Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.
11. PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning.
12. Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference.
13. An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing.
14. TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes.
15. Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters.
16. Optimizing Random Forest-Based Inference on RISC-V MCUs at the Extreme Edge.
17. Vega: A Ten-Core SoC for IoT Endnodes With DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
18. A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics.
19. RVfplib: A Fast and Compact Open-Source Floating-Point Emulation Library for Tiny RISC-V Processors.
20. A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.
21. Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs.
22. GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors.
23. Towards Long-term Non-invasive Monitoring for Epilepsy via Wearable EEG Devices.
24. Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers.
25. XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions.
26. TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE.
27. A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference.
28. Enabling mixed-precision quantized neural networks in extreme-edge devices.
29. Combining learning and optimization for transprecision computing.
30. 4.4 A 1.3TOPS/W @ 32GOPS Fully Integrated 10-Core SoC for IoT End-Nodes with 1.7μW Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
31. Efficient Transform Algorithms for Parallel Ultra-Low-Power IoT End Nodes.
32. XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes.
33. Energy-Efficient Hardware-Accelerated Synchronization for Shared-L1-Memory Multiprocessor Clusters.
34. DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs.
35. End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture.
36. GVSoC: A Highly Configurable, Fast and Accurate Full-Platform Simulator for RISC-V based IoT Processors.
37. HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC.
38. Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode.
39. Design and Evaluation of SmallFloat SIMD extensions to the RISC-V ISA.
40. FlexFloat: A Software Library for Transprecision Computing.
41. A Transprecision Floating-Point Architecture for Energy-Efficient Embedded Computing.
42. The transprecision computing paradigm: Concept, design, and applications.
43. A transprecision floating-point platform for ultra-low power computing.
44. BioWolf: A Sub-10-mW 8-Channel Advanced Brain-Computer Interface Platform With a Nine-Core Processor and BLE Connectivity.
45. Mr.Wolf: An Energy-Precision Scalable Parallel Ultra Low Power SoC for IoT Edge Processing.
46. DNN is not all you need: Parallelizing Non-Neural ML Algorithms on Ultra-Low-Power IoT Processors.
47. Vega: A 10-Core SoC for IoT End-Nodes with DNN Acceleration and Cognitive Wake-Up From MRAM-Based State-Retentive Sleep Mode.
48. DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs.
49. XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Network on RISC-V based IoT End Nodes.
50. Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers.
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.