366 results on '"Goh Wang Ling"'
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2. A 0.4 V 21.6 nW Duty Cycle Generator Based on Compact Pulsed Modulator for MEMs Sensing Interface
3. Towards Robust Curve Text Detection with Conditional Spatial Expansion
4. Correlation Propagation Networks for Scene Text Detection
5. Learning Markov Clustering Networks for Scene Text Detection
6. Security Development with an Industrial Device for SCADA System
7. Supervised Contrastive Learning Framework and Hardware Implementation of Learned ResNet for Real-time Respiratory Sound Classification
8. A Battery-input Hysteretic Buck Converter with 430nA Quiescent Current and 5×104 Load Current Dynamic Range for Wearable Biomedical Devices
9. Supervised Contrastive Pretrained ResNet with MixUp to Enhance Respiratory Sound Classification on Imbalanced and Limited Dataset
10. ECG Classification using Binary CNN on RRAM Crossbar with Nonidealities-Aware Training, Readout Compensation and CWT Preprocessing
11. Bottom-Up Scene Text Detection with Markov Clustering Networks
12. A Nanowatt Temperature-Independent Tunable Active Capacitance Multiplier with DC Compensation in $0.13-\mu\mathrm{m}$ CMOS
13. Classification of ECG Anomaly with Dynamically-biased LSTM for Continuous Cardiac Monitoring
14. Sparsity Through Spiking Convolutional Neural Network for Audio Classification at the Edge
15. 282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing
16. A compensation scheme for non-ideal circuit effects in biomedical impedance sensor
17. A Non-Idealities Aware Software–Hardware Co-Design Framework for Edge-AI Deep Neural Network Implemented on Memristive Crossbar
18. Wafer bonding technology for the production of dielectrically isolated silicon substrates incorporating buried metal silicide layers
19. An SOI-CMOS low noise chopper amplifier for high temperature applications.
20. A 330 GHz frequency modulator using 0.13-μm SiGe HBTs.
21. Noise-Aware and Lightweight LSTM for Keyword Spotting Applications
22. Temperature Compensation on SRAM-Based Computation in Memory Array
23. Parasitic-Aware Modeling and Neural Network Training Scheme for Energy-Efficient Processing-in-Memory With Resistive Crossbar Array
24. Recovering Accuracy of RRAM-based CIM for Binarized Neural Network via Chip-in-the-loop Training
25. 0.08mm2 128nW MFCC Engine for Ultra-low Power, Always-on Smart Sensing Applications
26. An Energy-Efficient Processing Element Design for Coarse-Grained Reconfigurable Architecture on FPGA
27. 0.08mm² 128nW MFCC engine for ultra-low power, always-on smart sensing applications
28. A Backpropagation Extreme Learning Machine Approach to Fast Training Neural Network-Based Side-Channel Attack
29. Parasitic-Aware Modelling for Neural Networks Implemented with Memristor Crossbar Array
30. A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router
31. A Study on 77 GHz Automotive Radar for Radar-Camera Fusion Module
32. Design of Fully Differential Energy-Efficient Inverter-Based Low-Noise Amplifier for Ultrasound Imaging
33. Efficient Implementation of Activation Functions for LSTM accelerators
34. Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design
35. Dynamically-biased Fixed-point LSTM for Time Series Processing in AIoT Edge Device
36. An Energy-Efficient Convolution Unit for Depthwise Separable Convolutional Neural Networks
37. A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron
38. A 7-GHz multiloop ring oscillator in 0.18-μm CMOS technology
39. A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations
40. A 3-MHz 17.3-$\mu$ W 0.015% Period Jitter Relaxation Oscillator With Energy Efficient Swing Boosting
41. Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model
42. Effect of via etching process and postclean treatment on via electrical performance
43. Effects of Seeding Layers on Electroless Copper Deposition
44. A TDM-Based 16-Channel AFE ASIC With Enhanced System-Level CMRR for Wearable EEG Recording With Dry Electrodes
45. An Integrated Multi-Channel Biopotential Recording Analog Front-End IC With Area-Efficient Driven-Right-Leg Circuit
46. Performance Analysis of Convolutional Neural Network Using Multi-level Memristor Crossbar for Edge Computing
47. Voice Keyword Recognition Based on Spiking Convolutional Neural Network for Human-Machine Interface
48. Recent Design Techniques for Improving Sensing Accuracy of Oscillator-based Sensor Interfaces in Standard CMOS Process
49. Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers
50. Power and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing
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