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Leveraging the advanced manufacturing capabilities of the semiconductor industry promises to help scale up silicon-based quantum processors by increasing yield, uniformity and integration. Recent studies of quantum dots fabricated on 300 mm wafer metal-oxide-semiconductor (MOS) processes have shown control and readout of individual spin qubits, yet quantum processors require two-qubit interactions to operate. Here, we use a 300 mm wafer MOS process customized for spin qubits and demonstrate coherent control of two electron spins using the spin-spin exchange interaction, forming the basis of an entangling gate such as $\sqrt{\text{SWAP}}$. We observe gate dephasing times of up to $T_2^{*}\approx500$ ns and a gate quality factor of 10. We further extend the coherence by up to an order of magnitude using an echo sequence. For readout, we introduce a dispersive readout technique, the radiofrequency electron cascade, that amplifies the signal while retaining the spin-projective nature of dispersive measurements. Our results demonstrate an industrial grade platform for two-qubit operations, alongside integration with dispersive sensing techniques.

Cryogenic semiconductor device models are essential in designing control systems for quantum devices and in benchmarking the benefits of cryogenic cooling for high-performance computing. In particular, the saturation of subthreshold swing due to band tails is an important phenomenon to include in low-temperature analytical MOSFET models as it predicts theoretical lower bounds on the leakage power and supply voltage in tailored cryogenic CMOS technologies with tuned threshold voltages. Previous physics-based modeling required to evaluate functions with no closed-form solutions, defeating the purpose of fast and efficient model evaluation. Thus far, only the empirically proposed expressions are in closed form. This article bridges this gap by deriving a physics-based and closed-form model for the full saturating trend of the subthreshold swing from room down to low temperature. The proposed model is compared against experimental data taken on some long and short devices from a commercial 28-nm bulk CMOS technology down to 4.2 K., Comment: Accepted for publication in IEEE Transactions on Nanotechnology

Silicon spin qubits are among the most promising candidates for large scale quantum computers, due to their excellent coherence and compatibility with CMOS technology for upscaling. Advanced industrial CMOS process flows allow wafer-scale uniformity and high device yield, but off the shelf transistor processes cannot be directly transferred to qubit structures due to the different designs and operation conditions. To therefore leverage the know-how of the micro-electronics industry, we customize a 300mm wafer fabrication line for silicon MOS qubit integration. With careful optimization and engineering of the MOS gate stack, we report stable and uniform quantum dot operation at the Si/SiOx interface at milli-Kelvin temperature. We extract the charge noise in different devices and under various operation conditions, demonstrating a record-low average noise level of 0.61 ${\mu}$eV/${\sqrt{Hz}}$ at 1 Hz and even below 0.1 ${\mu}$eV/${\sqrt{Hz}}$ for some devices and operating conditions. By statistical analysis of the charge noise with different operation and device parameters, we show that the noise source can indeed be well described by a two-level fluctuator model. This reproducible low noise level, in combination with uniform operation of our quantum dots, marks CMOS manufactured MOS spin qubits as a mature and highly scalable platform for high fidelity qubits., Comment: 22 pages, 13 figures

The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of existing CMOS integration technologies, such devices can offer a platform for large scale quantum computation. However, a quantum mechanical framework bridging a device's physical design and operational parameters to the qubit energy space is lacking. Furthermore, the spin to charge coupling introduced by intrinsic or induced Spin-Orbit-Interaction (SOI) exposes the qubits to charge noise compromising their coherence properties and inducing quantum gate errors. We present here a co-modelling framework for double quantum dot (DQD) devices and their charge noise environment. We use a combination of an electrostatic potential solver, full configuration interaction quantum mechanical methods and two-level-fluctuator models to study the quantum gate performance in realistic device designs and operation conditions. We utilize the developed models together alongside the single electron solutions of the quantum dots to simulate one- and two- qubit gates in the presence of charge noise. We find an inverse correlation between quantum gate errors and quantum dot confinement frequencies. We calculate X-gate fidelities >97% in the simulated Si-MOS devices at a typical TLF densities. We also find that exchange driven two-qubit SWAP gates show higher sensitivity to charge noise with fidelities down to 91% in the presence of the same density of TLFs. We further investigate the one- and two- qubit gate fidelities at different TLF densities. We find that given the small size of the quantum dots, sensitivity of a quantum gate to the distance between the noise sources and the quantum dot creates a strong variability in the quantum gate fidelities which can compromise the device yields in scaled qubit technologies., Comment: 37 pages , 24 figures

Large-scale superconducting quantum computing systems entail high-fidelity control and readout of large numbers of qubits at millikelvin temperatures, resulting in a massive input-output bottleneck. Cryo-electronics, based on complementary metal-oxide-semiconductor (CMOS) technology, may offer a scalable and versatile solution to overcome this bottleneck. However, detrimental effects due to cross-coupling between the electronic and thermal noise generated during cryo-electronics operation and the qubits need to be avoided. Here we present an ultra-low power radio-frequency (RF) multiplexing cryo-electronics solution operating below 15 mK that allows for control and interfacing of superconducting qubits with minimal cross-coupling. We benchmark its performance by interfacing it with a superconducting qubit and observe that the qubit's relaxation times ($T_1$) are unaffected, while the coherence times ($T_2$) are only minimally affected in both static and dynamic operation. Using the multiplexer, single qubit gate fidelities above 99.9%, i.e., well above the threshold for surface-code based quantum error-correction, can be achieved with appropriate thermal filtering. In addition, we demonstrate the capability of time-division-multiplexed qubit control by dynamically windowing calibrated qubit control pulses. Our results show that cryo-CMOS multiplexers could be used to significantly reduce the wiring resources for large-scale qubit device characterization, large-scale quantum processor control and quantum error correction protocols., Comment: 16+6 pages, 4+1+5 figures, 1 table

The quality of the semiconductor-barrier interface plays a pivotal role in the demonstration of high quality reproducible quantum dots for quantum information processing. In this work, we have measured SiMOSFET Hall bars on undoped Si substrates in order to investigate the quality of the devices fabricated in a full CMOS process. We report a record mobility of 17'500 cm2/Vs with a sub-10 nm oxide thickness indicating a high quality interface, suitable for future qubit applications. We also study the influence of gate materials on the mobilities and discuss the underlying mechanisms, giving insight into further material optimization for large scale quantum processors., Comment: 3 pages plus appendix 1 page with 7 figures

Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current Noisy Intermediate-Scale Quantum (NISQ) technology, each quantum device is controlled and characterised though a dedicated signal line between room temperature and base temperature of a dilution refrigerator. This approach is not scalable and is currently limiting the development of large-scale quantum system integration and quantum device characterisation. Here we demonstrate a custom designed cryo-CMOS multiplexer operating at 32 mK. The multiplexer exhibits excellent microwave properties up to 10 GHz at room and millikelvin temperatures. We have increased the characterisation throughput with the multiplexer by measuring four high-quality factor superconducting resonators using a single input and output line in a dilution refrigerator. Our work lays the foundation for large-scale microwave quantum device characterisation and has the perspective to address the wiring problem of future large-scale quantum computers., Comment: 22+11 pages, 3+5 figures, 1+1 tables