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The bi-modal breakdown processes can well explain the lifetime model in grooved gate oxide with rounded local structure. We have clarified for the first time that the gate oxide reliability is strongly dependant on the tunneling characteristics in the rounded channel of the center and the N+ junction edge corners

The paper presents layout dependency of PMOS I off degradation during off-state stress, which is induced by inverter leakage currents (I off ) have been increased by electron trapping in PMOSFET. Extensive test result represents time dependence of PMOS hump is based on the STI edge trap. To conclude, we can expect that hot temperature bake evaluation causing partial recovery of I off leakage is the reason for that trap location is a nitride liner of STI edge rather than edge gate oxide.