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In this paper, a study of the power alignment issue in digital predistorters is presented. The proper alignment is achieved by adjusting the normalization gain used to synthesize the predistortion function. The dependencies of the linearity and power efficiency of the linearized amplifier upon the gain normalization factor are investigated, and it is shown that the efficiency of the linearized amplifier is almost unaffected by variation of the normalization gain. Conversely, the linearity performance of the linearized power amplifier is found to be dependent on the gain normalization factor, as a consequence of the average power variation through the predistorter. Indeed, the proper power alignment of the predistorter following an adequate choice of the normalization gain shows a significant improvement in the measured adjacent channel power ratio at the linearized amplifier output. Index Terms--Digital predistortion, look-up tables, nonlinearity, power amplifier, small-signal gain.

A novel approach for power amplifiers static non-linearity characterization in the presence of memory effects is presented. A subsampling technique is used to reduce the bandwidth of the test signal without changing the waveform characteristics. This cancels the memory effects of the amplifier without affecting its static behavior. Memoryless AM/AM and AM/PM characteristics are measured as a function of the carrier frequency. This points out the contribution of the frequency dependency of the amplifier's static nonlinearity to its behavior under wideband signal drive. A memoryless post-compensation technique is then introduced to accurately assess the performance of several behavioral models. In fact, it is demonstrated that direct comparison of the measured output of the device-under-test with the estimated output does not provide reliable assessment of the model performance. Conversely, memoryless post-compensation efficiently differentiates the performance of these models. To provide a comprehensive approach for model validation and prototype performance evaluation, memory effects intensity metrics are introduced. These metrics are applied to evaluate the memory effects present in a 300-W peak power Doherty amplifier driven by various multicarrier wideband code division multiple access signals. Index Terms--Behavioral modeling, digital predistortion, linearization, memory effects, post-compensation, power amplifier (PA), static nonlinearity, third generation (3G), wideband code division multiple access (WCDMA).

A novel approach for power amplifier (PA) characterization suitable for single iteration digital predistorter synthesis is proposed. This approach consists of synergetic crest factor reduction and baseband digital predistortion to avoid the average power variation at the input of the PA between the characterization and linearization steps. This is achieved by bypassing the crest factor reduction block during the characterization step and by applying it concurrently with digital predistortion in the linearization step. First, the PA's behavior sensitivity to the average input power is evaluated. The limitations of conventional approaches for the PA characterization, in the context of single iteration digital predistortion, are then demonstrated. The performance of the proposed technique is validated experimentally on a 300-W peak PA. The measured improvement of the adjacent channel power ratio at the output of the linearized amplifier is 16 dBc for the conventional approach and 29 dBc for the proposed approach. Index Terms--Crest factor reduction, digital predistorter (DPD), linearization, peak-to-average power ratio (PAPR), power amplifier (PA), wideband code division multiple access (WCDMA).

In this paper, a comprehensive study of the robustness of the digital predistortion function synthesis is presented. This study covers two aspects: the processing of the power amplifier (PA) input and output measured data intended for the extraction of the corresponding predistortion function, and the optimal setting of the predistorter's small-signal gain to adaptively track the average power variation between the input and output of the predistorter. First, the accuracy of the polynomial curve fitting and the lookup table's scheme in mimicking the measured AM/AM and AM/PM characteristics of the PA is investigated. To address the high dispersion of coefficients of the polynomial function, which limits the order that can be implemented and the fitting capabilities, a pre-processing technique is proposed. Second, the titled PA curves are used to investigate the effects of the small-signal gain of the predistortion function on the linearization performance. An automated average power tracking technique is introduced in order to maintain a unit average gain of the predistorter. The measured spectra at the output of the amplifier show an additional 12-dBc improvement in the output spectrum regrowth. Index Terms--Digital predistorter (DPD), lookup table (LUT), nonlinearity, polynomial model, power amplifier (PA).

An active load-pull-based large-signal modeling approach, suitable for designing and optimizing load modulated amplifiers such as Doherty or linear amplification using nonlinear components based amplifiers, is proposed. A Doherty amplifier was designed by optimizing the dynamic loads seen by the amplifier's transistor using a large-signal load--pull-based behavior model built into computer-aided-design software. Simulation and measurement results showed good agreement, while results obtained using an empirical model of this transistor demonstrated discrepancies. The load-pull-based model was then used to study performance degradation of the Doherty amplifier when load impedance was moved out from the perfect 50 [ohm]. It has been shown that the load mismatch can greatly affect the linearity and efficiency performance of the amplifier unless its phase is controlled and kept within a specific range. A load mismatch system level compensator scheme, capable of restituting the linearity loss and maintaining the power-added efficiency close to its maximum range, is proposed. Index Terms--Active load modulation, Doherty amplifier, high efficiency, load-pull measurement.

In this paper, a new architecture for baseband digital predistortion dedicated to wide-band transmissions is presented. The proposed predistorter consists of a cascade of a static lookup-table-based predistorter and a subband filtering block. The subband filtering technique is used to improve the correction bandwidth limitation of conventional architectures. The cases of four-and eight-subband decomposition were considered and compared to the case where the full-band signal is processed. This revealed that the subband processing results in a better sensitivity and an independent tuning ability of the predistorter at each subband. In addition, it was shown that, in the proposed predistorter, the computational complexity and the required processing speed are reduced proportionally to the number of subbands. Moreover, in an adaptive digital predistortion context, a quicker convergence can be achieved. Experimental validation of the subband-based predistortion concept was successfully carried on a 100-W peak envelop power lateral double diffused metal-oxide semiconductor power amplifier. Index Terms--Baseband digital predistortion, hybrid Hammerstein structure, lookup table (LUT), power amplifier (PA), subband processing.