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This paper presents a novel three-phase DC-link multilevel inverter topology with reduced number of input DC power supplies. The proposed inverter consists of series-connected half-bridge modules to generate the multilevel waveform and a simple H-bridge module, acting as a polarity generator. The inverter output voltage is transferred to the load through a three-phase transformer, which facilitates a galvanic isolation between the inverter and the load. The proposed topology features many advantages when compared with the conventional multilevel inverters proposed in the literatures. These features include scalability, simple control, reduced number of DC voltage sources, and less devices count. A simple sinusoidal pulse-width modulation technique is employed to control the proposed inverter. The performance of the inverter is evaluated under different loading conditions and a comparison with some existing topologies is also presented. The feasibility and effectiveness of the proposed inverter are confirmed through simulation and experimental studies using a scaled down low-voltage laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper presents a new compact three-phase cascaded multilevel inverter (CMLI) topology with reduced device count and high-frequency magnetic link. The proposed topology overcomes the predominant limitation of separate dc power supplies, which CMLI always require. The high-frequency magnetic link also provides a galvanic isolation between the input and output sides of the inverter, which is essential for various grid-connected applications. The proposed topology utilizes an asymmetric inverter configuration that consists of cascaded H-bridge cells and a conventional three-phase two-level inverter. A toroidal core is employed for the high-frequency magnetic link to ensure compact size and high-power density. Compared with counterpart CMLI topologies available in literature, the proposed inverter has the advantage of utilizing the least number of power electronic components without compromising the overall performance, particularly when a high number of output voltage levels is required. The feasibility of the proposed inverter is confirmed through extensive simulation and experimentally validated studies. [ABSTRACT FROM AUTHOR]

One of the key challenges in multilevel inverters (MLIs) design is to reduce the number of components used in the implementation while maximising the number of output voltage levels. This paper proposes a new concept that facilitates a device count reduction technique of existing cascaded MLIs. Moreover, the proposed concept can be utilised to extend existing single phase cascaded MLI topologies to three-phase structure without tripling the number of semiconductor components and input dc-supplies as per the current practice. The new generalized concept involves two stages; namely, cascaded stage and phase generator stage. The phase generator stage is a combination of a conventional three-phase two level inverter and three bi-directional switches while the cascaded stage can employ any existing cascaded topology. A laboratory prototype model is built and extensive experimental analyses are conducted to validate the feasibility of the proposed cascaded MLI concept. [ABSTRACT FROM AUTHOR]

A special cascaded configuration of asymmetric multilevel inverter is presented in this paper. This configuration cancels the redundancy of output voltage steps and maximizes the number of levels in the output voltage. This structure is built by using series connected stages, which minimize the number of semiconductor switches, gate drive arrangements, occupying area, and cost. It is a modular type inverter model and the number of voltage levels can be increased by adding new stages without changing the previous connection. Space vector modulation has been applied as the control strategy. A prototype of the proposed inverter topology has been built in the laboratory. The attached hardware results indicate the accuracy of the proposed model, which include the topology as well as the control technique. [ABSTRACT FROM AUTHOR]