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This study investigates the feasibility of using a two-stage process combining a photochemical oxidation process (UV/[H.sub.2][O.sub.2]) and a biological fluidized-bed system to treat dilute-organic wastewater discharged from semiconductor manufacturing facilities. This combined process has the merits of decomposing recalcitrant organic chemicals into intermediate products more amenable to biodegradation, thereby achieving high degree of mineralization of organic compounds that are otherwise toxic to aerobic biodegradation. Six organic solvents, including propylene glycol methyl ether acetate, ethyl lactate, tetramethylammonium hydroxide, 1-methyl-2-pyrrolidone, isopropanol, and phenol, were evaluated due to their common applications in various wafer fabrication processes. The optimal operating conditions ([H.sub.2][O.sub.2] dosage, pH, exposure time) for the first-stage UV/[H.sub.2][O.sub.2] were determined for each chemical, and a nominal condition was selected for the ensuing biodegradation experiments. GC/MS analyses demonstrated that UV/[H.sub.2][O.sub.2] indeed decomposed the chemicals into smaller fragments that could be effectively mineralized by aerobic biodegradation. Excellent reduction efficiencies (>95%) in both TOC and compound concentration were achieved for all compounds except for NMP, whose stable ring structure was refractory to both low-dosage UV/[H.sub.2][O.sub.2] oxidation and biodegradation. No significant difference in reduction efficiencies was observed between treatment of the compounds as individual components and as a mixture, suggesting the favorable applicability of the proposed technology. Index Terms--Advanced oxidation processes, biodegradation, microelectronics, organic wastewater, photochemical intermediates, ultraviolet oxidation.

We demonstrate an antireflective coating structure, which is based on the three-layer metal interference called the Fabry-Perot structure, for a deep-ultraviolet binary mask. The antireflective coating structure is composed of a metal-oxide-metal stack. By addition of different optimized structures, reflectances of less than 1.5% at both 248 and 193 nm have been achieved. At the three-layer Fabry-Perot structure, the bottom chrome layer provides suitable absorption. By controlling the thickness of the intermediate silicon oxide layer, we can tune the minimum-reflection regime to the desired exposure wavelength. The top metal layer can prevent charge accumulation during e-beam writing. OCIS codes: 220.3740, 310.1210, 310.1860, 310.1620.

Drain-induced barrier lowering effects and low-temperature characteristics of p-channel transistors with Si[subscript 1-x]Ge[subscript x] raised source and drain (RSD) are examined. Si[subscript 1-x]Ge[subscript x] device perform better compared to pure Si RSD devices, and improvements become more dramatic as channel length is reduced.

Indium super steep retrograde channel implantation was used to demonstrate high performance and high reliability 80 nm dynamic threshold voltage MOSFETs.

Ultrathin gate oxides were examined for plasma-induced charging damage.

The effects of titanium (Ti) and tantalum (Ta) adhesion layers on the ferroelectric and microstructural properties of sol-gel-derived SrBi[sub 2]Ta[sub 2]O[sub 9] (SBT) films are investigated. It is found that the atoms from the adhesion layer play a significant role in the resultant microstructures and physical properties of SBT films. The electron spectroscopy for chemical analysis clearly indicates that both the Ti and Ta atoms of adhesion layers have out-diffused behavior onto the surface of bottom-electrode Pt films after a thermal treatment of 750 °C, 1 min. Various out-diffused species do cause the distinct properties of SBT films, which are confirmed by the results of surface analysis and polarization-electric field (P-E) measurements. The formation of undesirable second phase compounds near the SBT/PT interface has been observed in specimens with Ti layer, and it is speculated to be the significant degradation of spontaneous polarization. On the contrary, Ta species are found to exhibit the pure bismuth-layered structure (BLS) phase and the good ferroelectric properties of SBT films, which have been identified by x-ray diffraction spectra and P-E measurements. The remnant polarization values of SBT films on top of Pt/Ti/SiO[sub 2]/Si and Pt/Ta/Ti/SiO[sub 2]/Si substrates are 11.1 and 14.2 μC/cm² at 5 V, respectively. The same phenomenon was also observed at specimens with an increased annealing temperature of 800 °C. Consistently, the SBT film with Ta adhesion layer displays a better polarization value of 16.2 μC/cm² than that with Ti adhesion layer (12.6 μC/cm²). The fatigue tests of all samples depict the near-fatigue-free characteristics except for the specimens with Ti adhesion layer crystallized at 800 °C. It is suggested that the employment of the Ta element for the adhesion layer in the SBT process is more favorable to obtain a desirable BLS phase and to improve the ferroelectric properties. [ABSTRACT FROM AUTHOR]

Strained boron-doped Si[sub 1-x]Ge[sub x] layers with different Ge mole fractions were selectively deposited by ultrahigh vacuum chemical molecular epitaxy to form shallow p[sup +]-n junction suitable for raised source/drain metal-oxide-semiconductor field effect transistor applications. Detailed electrical characterizations were performed. Our results show that the reverse leakage current could be optimized by a rapid thermal annealing at 950 °C for 20 s, and a near perfect forward ideality factor (i.e., <1.01) is obtained for the p[sup +]-n Si[sub 1-x]Ge[sub x]/Si junction. By analyzing the periphery and area leakage current components of p[sup +]-n Si[sub 1-x]Ge[sub x]/Si junctions with various perimeter lengths and areas, the degree of misfit dislocations and undercut effect were studied. The specific contact resistance was found to decrease as Ge mole fraction increases. Junction depth measurements also show that the junction depth decreases monotonically with increasing Ge mole fraction. The reduced B diffusion constant is attributed to the increasing Ge gradient in the transition region. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Presents a study that proposed a self-aligned subtractive gate process by alternating several masking and polycrystalline silicon gate etching steps from a conventional process to build high-voltage and complementary thin-film transistors (TFT) on insulating substrates. Compatibility of the process with conventional TFT mask sets and standard processing techniques; Advantage of using the process; Fabrication of complementary metal-oxide-semiconductor and high-voltage TFT devices.