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Spintronic rf detectors were demonstrated, recently, for energy harvesting and wireless communication at low input power. Here we report on the optimization of the rectified output dc voltage using magnetic tunnel junctions (MTJ) with strong perpendicular anisotropy (PMA) of both the polarizing and the free layer. The magnetization of the polarizing layer is fixed out of plane, while the free layer thickness is adjusted so that its magnetization orientation changes from in plane to out of plane. The rectification dc output voltage lies in the mV range for moderate rf powers, with a signal to noise ratio of 10 to 100 for Prf = -25dBm. It shows a strong dependence on the dimensions of the MTJ: it increases by a factor of 5 to 6 when reducing the diameter from 150nm to 20nm. This enhancement can be doubled when reducing the FL thickness from 1.8nm to 1.6nm. This dimensional enhancement is attributed to the change of the effective anisotropy of the excited free layer, and the MTJ resistance. The results are of interest for the design of spintronic based rf detectors with optimized sensitivity.

In this study, a new type of compact magnetic memristor is demonstrated. It is based on the variation of the conductivity of a nano-sized magnetic tunnel junction as a function of the angle between the in-plane reference layer magnetization and a free layer exhibiting an isotropic in-plane coercivity. The free layer magnetization is rotated by two spin transfer torque contributions: one originating from the in-plane magnetized reference layer and the other one from an additional perpendicular polarizer integrated in the stack. Thanks to a proper tuning of the relative influence of these two torques, the magnetization of the free layer can be rotated step by step clockwise or anticlockwise in a range of angle between 0° (parallel configuration) and 180° (anti-parallel configuration) by sending pulses of current through the stack, of one or opposite polarity. The amplitude of the rotation steps and therefore of the conductance variations depends on the pulse amplitude and duration. In this way, we achieve monotonous variations of the resistance with the voltage polarity through the application of pulses in the ns range. We also retrieve the analytical expression of critical current density which is found to be in good agreement with the experimental results. The thermal stability of the intermediate resistance levels and the role of Joule heating are also discussed.

International audience; The concept of a spintronic memristor based on angular variation of Tunnel Magnetoresistance relies on the development of an isotropically coercive free layer able to stabilize the magnetization in any in-plane direction. In this work, we first demonstrate those properties in a composite ferromagnet/antiferromagnet/ferromagnet trilayer by performing hysteresis loops at different in-plane angles and rotating field experiments. In the second part, we describe the material composition of the total stack and the fabrication process to create the final device. In the last part, the hysteresis loops at different in-plane angles and the rotating field experiments are performed at device level and compared with the ones performed at full sheet film, confirming the magnetically isotropic nature of the free layer.

The concept of Perpendicular Shape Anisotropy STT-MRAM (PSA-STT-MRAM) has been recently proposed as a solution to enable the downsize scalability of STT-MRAM devices beyond the sub-20 nm technology node. For conventional p-STT-MRAM devices with sub-20 nm diameters, the perpendicular anisotropy arising from the MgO/CoFeB interface becomes too weak to ensure thermal stability of the storage layer. In addition, this interfacial anisotropy rapidly decreases with increasing temperature which constitutes a drawback in applications with a large range of operating temperatures. Here, we show that by using a PSA based storage layer, the source of anisotropy is much more robust against thermal fluctuations than the interfacial anisotropy, which allows considerable reduction of the temperature dependence of the coercivity. From a practical point of view, this is very interesting for applications having to operate on a wide range of temperatures (e.g. automotive -40 °C/+150 °C).

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International audience; Measured switching voltage-field diagrams of perpendicular magnetic tunnel junctions exhibit unexpected behavior at high voltages associated with significant heating of the storage layer. The boundaries deviate from the critical lines corresponding to the coercive field, which contrasts with the theoretically predicted behavior of a standard macrospin-based model. Combining recent experimental studies of the temperature dependence of spin polarization and perpendicular magnetic anisotropy, we are proposing a modified model. Our approach takes into account the Joule heating during the writing pulse, which reduces the spin polarization and the anisotropy, thereby reducing the spin torque efficiency and the coercive field during the switching. The numerical macrospin simulations based on this model are in agreement with our experimental measurements and consistent with the results derived from the linearization of Landau-Lifshitz-Gilbert equation.

International audience; Magnetic Random-Access Memory (MRAM) is a non-volatile class of solid-state storage device where the information is stored in the magnetic state of a ferromagnetic layer. Microelectronic industry has recently shown a strong interest for MRAM as they are very promising for embedded RAM applications and particularly embedded FLASH replacement. The main building bloc of an MRAM is a trilayer FM1/I/FM2 (Fig. 1.a) named magnetic tunnel junction (MTJ) , where FM1(2) refer to ferromagnetic layers and I to a thin insulating tunnel barrier (~ 1.2 nm). Nowadays researches are mainly focused on perpendicularly (p) magnetized tunnel junctions written by spin transfer torque (STT) , where the perpendicular axis is defined by the growth direction. FM1 is called the reference layer, its magnetization is pinned in one specific direction (for example, the up direction). FM2 is called the storage layer or free layer, its magnetization is free to be moved between its two stable states (up and down). The resistance of the stack depends on the relative orientation of the two magnetizations. The parallel (P) state (up/up) is a low resistance state while the antiparallel (AP) state (up/down) is a high resistance state, thus respectively coding the "0" and "1" of the binary logic. The tunneling magnetoresistance (TMR) is defined by the ratio =. The P and AP states are separated by an energy barrier Eb, used to define the thermal stability of the memory ∆= E /k T with kBT the thermal energy (Fig. 1.b). For practical applications, one aims for ∆ values from 60 to 100.

Spin-Transfer-Torque Magnetic Random Access Memories (STT-RAM) based on out-of-plane magnetized MTJ (pMTJ) are one of the most promising emerging non-volatile memory technologies as they combine a unique set of assets: quasi-infinite write endurance, high speed, low power consumption and scalability. Embedded STT-MRAM are about to enter in volume production for e-FLASH replacement. For this type of applications not requiring very high memory density, the preferred etching technique is still Ion Beam etching (IBE) [1]. However this technique is not appropriate for high density memory as it requires to etch the MTJ stack at specific angles to minimize the re-deposition on the sidewalls of the tunnel junctions. Etching at some angle leads to shadowing effects which give to the pillars a conical shape. This effect worsens as the memory pitch shrinks below typically 5F resulting in a poor control of the critical dimension at very dense pitch. Besides it is difficult to implement on large wafer with good uniformity [2]. Reactive ion etching (RIE) was also tried for MTJs with various gas but was found to be very complex due to the heterogeneous nature of the MTJ stacks and to cause corrosion of the magnetic materials [3]. Therefore, to be able to use STT-RAM as a dense working memory requires a new method for nanopatterning MTJ elements at small feature size $(< 20$ nm) and high pitch $( \sim 2\mathrm {F})$. In the approach we propose, the MTJ material is directly deposited on pre-patterned pillars (e.g Ta pillars prepared by RIE or Cu or W vias prepared by damascene process). The MTJ stack is then naturally patterned while being deposited thus not requiring any post-deposition etching. For the pre-patterned non-magnetic posts, we chose Ta as post-material since its reactive ion etching is very well controlled. In order to avoid the risk of electrical shorts between pillars due to the material deposited in the trenches between posts, the latter are given an undercut shape. Thanks to this shape, during the MTJ deposition, no metal gets deposited on the pillar sidewalls nor at the foot of the metallic posts. The process for fabricating the conducting non-magnetic Ta posts with undercut is depicted in Fig. 1. Ta is coated by Pt to form the top part of the post and protect the top Ta surface from oxidation. Then, following the formation of cylindrical Ta/Pt posts by an anisotropic RIE process, an isotropic RIE process is subsequently used in order to laterally trim the Ta part of the posts. Perpendicular MTJ stacks with MgO barrier were then deposited on these pre-patterned substrates. By depositing the MgO tunnel barrier at oblique incidence while rotating the substrate, it is possible to completely coat the MTJ bottom electrode with MgO and even to get thicker MgO deposit on the sidewall of the bottom electrode than on the horizontal part of the MTJ. This can help to concentrate the current away from the edge of the nano-patterned MTJ thus reducing the influence of possible edge defects. Similarly, lateral gradient of chemical composition can be induced in the storage or reference layers. Such gradient can be used to induce different properties at the edges and center of each dot in order for instance to reduce demagnetizing or nucleation effects at edges and improve STT switching efficiency. The magnetic properties of pMTJ stacks deposited on the pre-patterned substrate were evaluated by focused Kerr microscopy. Half-MTJ stacks were first deposited with bottom and top electrodes only to characterize the interfacial perpendicular anisotropy of the deposits on top of the posts CoFeB/MgO. The contribution of individual pillars and of the continuous deposit in the trenches could be distinguished. After optimizing the structural and magnetic properties, electrically characterization of these patterned MTJs were performed in terms of TMR and STT switching characteristics. The field-voltage switching phase diagram at room temperature was measured and is shown in Fig.2. At a constant applied field and even at zero field, the junctions can be switched from AP to P and from P to AP by STT. A switching voltage of 0.34 V for 100ns pulse was measured which is quite comparable or even slightly lower than similar MTJs patterned by IBE [4]. These electrical results demonstrate that functional patterned perpendicular MTJs can be obtained by this novel patterning process consisting in depositing the MTJ material on pre-patterned conducting posts. In conclusion, we have demonstrated a novel approach for nanopatterning MTJ down to sub-30nm dimensions at very narrow pitch by depositing the MTJ material on pre-patterned metallic posts. Remarkably, our approach allows to fabricate extremely dense arrays of very small size MTJs which is still impossible to achieve by IBE. This opens a possible route toward high density STT-MRAM application.

International audience; A new approach to increase the downsize scalability of perpendicular STT-MRAM is presented. It consists in significantly increasing the thickness of the storage layer in out-of-plane magnetized tunnel junctions (pMTJ) as compared to conventional pMTJ in order to induce a perpendicular shape anisotropy (PSA) in this layer. This PSA is obtained by depositing a thick ferromagnetic (FM) layer on top of an MgO/FeCoB based magnetic tunnel junction (MTJ) so that the thickness of the storage layer becomes of the order or larger than the diameter of the MTJ pillar. In contrast to conventional spin transfer torque magnetic random access memory (STT-MRAM) wherein the demagnetizing energy opposes the interfacial perpendicular magnetic anisotropy (iPMA), in these novel memory cells, both PSA and iPMA contributions favor out-of-plane orientation of the storage layer magnetization. Using thicker storage layers in these PSA-STT-MRAM has several advantages. Thanks to the PSA, very high and easily tunable thermal stability factors can be achieved, even down to sub-10 nm diameters. Moreover, low damping material can be used for the thick FM material thus leading to a reduction of the write current. The paper describes this new PSA-STT-MRAM concept, practical realization of such memory arrays, magnetic characterization demonstrating thermal stability factor above 200 for MTJs as small as 8nm in diameter and possibility to maintain thermal stability factor above 60 down to 4nm diameter.

International audience; Due to their high speed[1], high endurance[2] and non-volatility, perpendicular STT-MRAM (P-STT-MRAM) are seen as one of thebest candidate for non volatile memory embedded applications. However, their data retention time at elevated temperature such as thesoldering reflow criterion and the automotive application temperature range is still a critical point. In this paper, P-STT-MRAM deviceswith diameters ranging from 20nm to 150nm have been tested in temperature. The thermal stability factor has been extractedelectrically for temperatures up to 190°C. Then the loss in the Curie temperature of the storage layer compared to bulk values has beenmeasured and directly linked to the thermal stability values. At last, a model is proposed to predict the temperature dependance of thethermal stability factor.

In this work, we studied the influence of the buffer layer composition on the IrMn thickness threshold for the onset of exchange bias in IrMn/Co bilayers. By means of magnetometry, x-ray absorption and x-ray photoelectron spectroscopy, we investigated the magnetic and chemical properties of the stacks. We demonstrated a higher diffusion of Mn through the Co layer in the case of a Cu buffer layer. This is consistent with the observation of larger IrMn thickness threshold for the onset of exchange bias.

In the ongoing Big Data revolution, the semiconductor industry faces major issues associated to the energy cost and time delay of transferring data between the processor cores and the multiple levels of memory. Since the advent of the MOS transistor, the performance of microelectronic circuits has followed Moore's law, stating that their speed and density would double every 18 months. Today, this trend tends to get out of breath: the continuously decreasing size of devices and increasing operation frequency lead to critical power consumption and heating issues. While the microprocessor unit is running in the GHz range, the main external memory (DRAM) is very slow. To speed up operations, cache memories, mostly composed of SRAM (Static Random Access Memory), are inserted between the processor and DRAM to fill this so-called “memory gap”. SRAMs are very fast but have a large footprint, hence a large silicon cost, which limits the amount of on-chip memory that can be practically embedded on-chip. Furthermore, SRAM are volatile which means that they require to be constantly powered and thus consume energy to retain information. With the downscaling of SRAM, this has today become a major issue [1] as the CMOS transistor current leakage has led to a large increase in the static (e.g. standby) power consumption. Moreover, the sensitivity to process and environmental variation reduces the static noise margin of SRAM, limiting their downscaling. Finally, the growing number of access to caches has also led to a large rise in dynamic power consumption. As multicore processors cannot afford keeping more than a very small fraction of all cores active at any given moment, their performances are limited and their scaling is hitting a power wall. As pointed by the ITRS, one of the best solutions to stop this trend is the modification of the memory hierarchy by the integration of nonvolatility (NV) as a new feature of memory caches, which would immediately minimize static power as well as paving the way towards normally-off/instant-on computing. The development of an electrically addressable nonvolatile (e.g. zero-leakage) memory combining processor speed (Ghz), infinite endurance and a higher-than-SRAM density is a crucial step towards higher performance and more energy efficient computing platforms.

International audience; Low frequency noise has been studied for two types of magnetic field sensors based on magnetic tunnel junctions (MTJ). The first structure, composed of a few large MTJs, is designed for low noise applications; the second one, composed of hundreds of small MTJs, is designed for general purposes. At low frequency, both structures exhibit 1/f noise, but with very different amplitudes. The sensors for general purposes show a much higher noise level compared to the low-noise sensors. However, the sensitivity of the low noise sensors is much smaller compared to the other ones. Thus, the limit of detection, defined as the ratio of noise and sensitivity, turns out to be roughly the same for both technologies. Using the advantages of each sensor could help to design a sensor with an improved limit of detection.

A new concept to increase the downsize scalability of perpendicular spin transfer torque magnetic random-access memory (p-STT-MRAM), called perpendicular shape anisotropy (PSA) STT-MRAM is presented. This approach consists of significantly increasing the thickness of the storage layer in p-STT-MRAM to values comparable to the cell diameter so as to induce a PSA in this layer which comes on top of the MgO/FeCoB interfacial anisotropy. This PSA-STT-MRAM is provided by depositing a thick ferromagnetic (FM) layer on top of an MgO/FeCoB based magnetic tunnel junction (MTJ) so that the thickness of the storage layer becomes of the order or larger than the diameter of the MTJ pillar. In contrast to conventional spin transfer torque (STT) magnetic random access memory, wherein the demagnetizing energy opposes the interfacial perpendicular magnetic anisotropy (iPMA), in these novel memory cells, both PSA and iPMA contributions favor out-of-plane orientation of the storage layer magnetization. Using thicker storage layers in these PSA-STT-MRAM has several advantages. Thanks to this robust source of bulk anisotropy, PSA-STT-MRAM offers a greatly improved downsize scalability over conventional perpendicular p-STT-MRAM. Despite the large thickness of the storage layer, PSA-STT-MRAM cells can still be written by STT provided their thermal stability factor Δ is adjusted in the same range as in conventional p-STT-MRAM, i.e. Δ of the order of 60–100 depending on the memory capacity and required bit error rate. Moreover, a low damping material can be used for the thick FM material, thus leading to a reduction of the write current. Thanks to the PSA, very high and easily tunable thermal stability factors can be achieved, even down to sub-10 nm diameters. The paper describes this new PSA-STT-MRAM concept, practical realization of such memory arrays, magnetic characterization demonstrating thermal stability factor above 200 for MTJs as small as 8 nm in diameter and the possibility to maintain thermal stability factor above 60 down to 4 nm diameter. We also show that thanks to the increased thickness of the storage layer, the anisotropy and therefore the memory retention are much less sensitive on temperature than in conventional p-STT-MRAM. This is very interesting for applications operating on a wide range of temperatures (e.g. automotive −40 °C to +150 °C), as well as to fulfill solder reflow compliance.

International audience; While perpendicular STT-MRAM are seen as a promising next-generation memory, retention becomes critical and must be characterized precisely. Four extraction methods are explained taking special emphasize on accuracy and precision. They are then applied from single cell to kb-array, from 50 to 250 nm diameter cells and up to 235°C in order to show the limitations and advantages of each method.

International audience; STT-MRAM are foreseen as the best contender forDRAM replacement. STT-MRAM could also be used for SRAMapplications if switching time below 1ns could be realized in areliable way. In this study, we demonstrate that sub-ns switchingwith final state determined by the current polarity through thestack can be achieved in STT-MRAM cells comprising two spinpolarizinglayers having orthogonal magnetic anisotropies [1],[2].We carried out a thorough experimental and modeling study ofthese ultrafast STT-MRAM. We demonstrated that a quitereliable switching can be achieved by increasing the cell aspectratio (AR) or advantageously by applying an in-plane statictransverse field on the cell. Switching in 200ps could bedemonstrated with write energy less than 100fJ.

We report here the development of Pt and Pd-free perpendicular magnetic tunnel junctions (p-MTJ) for STT-MRAM applications. We start by studying a p-MTJ consisting of a bottom synthetic Co/Pt reference layer and a synthetic FeCoB/Ru/FeCoB storage layer covered with an MgO layer. We first investigate the evolution of RKKY coupling with Ru spacer thickness in such a storage layer. The coupling becomes antiferromagnetic above 0.5 nm and its strength decreases monotonously with increasing Ru thickness. This contrasts with the behavior of Co-based systems for which a maximum in interlayer coupling is generally observed around 0.8 nm. A thin Ta insertion below the Ru spacer considerably decreases the coupling energy, without basically changing its variation with Ru thickness. After optimization of the non-magnetic and magnetic layer thicknesses, it appears that such a FeCoB/Ru/FeCoB synthetic storage layer sandwiched between MgO barriers can be made stable enough to actually be used as hard reference layer in single or double magnetic tunnel junctions, the storage layer being now a single soft FeCoB layer. Finally, we realize Pt- or Pd-free robust perpendicular magnetic tunnel junctions, still keeping the advantage of a synthetic reference layer in terms of reduction of stray fields at small pillar sizes.

Understanding quantitatively the heating dynamics in magnetic tunnel junctions (MTJ) submitted to current pulses is very important in the context of spin-transfer-torque magnetic random access memory development. Here we provide a method to probe the heating of MTJ using the RKKY coupling of a synthetic ferrimagnetic storage layer as a thermal sensor. The temperature increase versus applied bias voltage is measured thanks to the decrease of the spin-flop field with temperature. This method allows distinguishing spin transfer torque (STT) effects from the influence of temperature on the switching field. The heating dynamics is then studied in real-time by probing the conductance variation due to spin-flop rotation during heating. This approach provides a new method for measuring fast heating in spintronic devices, particularly magnetic random access memory (MRAM) using thermally assisted or spin transfer torque writing., Comment: 6 pages, 9 figures

Dependence of time-dependent dielectric breakdown with pulsewidth was investigated on MgO magnetic tunnel junctions. Barrier breakdown measurements were performed using different pulsewidths, from 10 ns up 1 s. The equivalence of the breakdown results between DC and pulsed voltage experiments was established using the total cumulated pulse time under electrical stress as the relevant parameter. Two different breakdown regimes were identified: the first one corresponding to pulses longer than 100 ns up to the DC limit and a second regime for pulses shorter than 100 ns. The barrier lifetime is increased for pulsewidths lower than 100 ns pulses. The breakdown process was shown to be thermally activated, but the longer lifetime at shorter pulses cannot be simply explained assuming a lower temperature during the pulse application.

In field written thermally assisted (TAS) MRAM, the storage layer is pinned with an antiferromag-netic layer. The writing of TAS-MRAM consists of heating the storage layer above the blocking temperature of the antiferromagnet using an injected current pulse through the tunnel barrier. This pulse can be used to assist the writing either combined to an external magnetic field or to a spin transfer torque (STT) [1] effect coming from the spin polarized current flow. After setting the storage layer direction during the write step, the current pulse is removed, pinning the storage layer in the set direction. The actual temperature decay occurs in a timescale of few tens of nanoseconds [2]. STT is efficient while the current is flowing through the junction but disappears during cooling, once the heating pulse is removed. This assumption is valid if the temperature gradients across the barrier, giving rise to spin accumulation of thermal origin are negligible. In these conditions, when the temperature is above or close to the blocking temperature of the antiferromagnetic layer pinning the storage layer, the written state might be thermally unstable. In this paper, we have investigated the possibility of controlling the temperature decay, so that the spin polarized current and temperature decay at the same rate. We show that there is an improvement in writing reproducibility using a linear transition at the end of the current pulse during the cooling phase. This is especially evident in cases where STT influence on the field writing is more significant. The write error rate dependence with the voltage transition duration was measured, and we find an optimum value for a 70ns transition, corresponding to a linear pulse amplitude decay of 18mV/ns.

Magnetic Tunnel Junctions (MTJs) with perpendicular anisotropy have been studied extensively in recent years since their remarkable properties (high write speed, scalability, endurance, low critical current density for Spin Transfer Torque (STT) switching, etc.) make them particularly attractive components to use in Magnetic Random Access Memories (MRAM) [1]. In the meantime, the use of a double barrier in planar junctions appeared to enhance STT efficiency [2] and reduce the bias dependence of Tunnel MagnetoResistance (TMR).

International audience; The magnetic properties of double tunnel junctions with perpendicular anisotropy were investigated. Two synthetic antiferromagnetic references are used, while the middle storage magnetic layer can be either a single ferromagnetic or a synthetic antiferromagnetic FeCoB-based layer, with a critical thickness as large as 3.0 nm. Among the different achievable magnetic configurations in zero field, those with either antiparallel references, and single ferromagnetic storage layer, or parallel references, and synthetic antiferromagnetic storage layer, are of particular interest since they allow increasing the efficiency of spin transfer torque writing and the thermal stability of the stored information as compared to single tunnel junctions. The latter configuration can be preferred when stray fields would favour a parallel orientation of the reference layers. In this case, the synthetic antiferromagnetic storage layer is also less sensitive to residual stray fields. (C) 2015 AIP Publishing LLC.

International audience

International audience; Microstructural effects on the antiferromagnetic layer were investigated on IrMn/Co exchange biased square dots. IrMn grain size and distributions were tuned by changing Cu buffer layer or IrMn thicknesses. Lateral dimensions from 200 to 50nm were varied. Exchange bias (Hex) variability was analysed through focused Kerr measurements on small groups of dots. Patterned samples presented average exchange bias values following the trends and values of full sheet samples. Concerning the dot to dot behaviour, it resulted that IrMn microstructure variations have minor effects on Hex variability, because no particular trend is observed as a function of grain size and distribution. The variability is attributed to geometry variation and Co intrinsic variability.

International audience; Spintronics devices and in particular thermally assisted magnetic random access memories require a wide range of ferromagnetic/antiferromagnetic (F/AF) exchange bias (EB) properties and subsequently of AF materials to fulfil diverse functionality requirements for the reference and storage. For the reference layer, large EB energies and high blocking temperature (T B) are required. In contrast, for the storage layer, mostly moderate T B are needed. One of the present issues is to find a storage layer with properties intermediate between those of IrMn and FeMn and in particular: (i) with a T B larger than FeMn for better stability at rest-T but lower than IrMn to reduce power consumption at write-T and (ii) with improved magnetic interfacial quality, i.e., with reduced interfacial glassy character for lower properties dispersions. To address this issue, the EB properties of F/AF based stacks were studied for various mixed [IrMn/FeMn] AFs. In addition to EB loop shifts, the F/AF magnetic interfacial qualities and the AF grains thermal stability are probed via measurements of the low-and high-temperature contributions to the T B distributions, respectively. A tuning of the above three parameters is observed when evolving from IrMn to FeMn via [IrMn/FeMn] repetitions.

The influence of the microstructure on the exchange bias properties of antiferromagnetic/ferromagnetic submicronic dots was investigated in arrays of IrMn/Co square dots of lateral dimensions ranging between 200 and 50 nm. IrMn grain size and distributions were tuned by changing the Cu buffer layer or IrMn thicknesses. Exchange bias variability was analysed through focused Kerr measurements on small groups of dots. The average exchange bias field in the patterned samples have similar values as in full sheet samples and with similar variations versus Cu and IrMn thicknesses. Concerning the exchange bias variability, an increase in variability was observed in the patterned samples caused by grain cutting at the dot edges during the patterning process. This increase in exchange bias variability is observed to be even more important in samples having large average grain sizes, particularly for small dots. These effects are correlated with the grain size distributions on full sheet samples.

Équipe 107 : Physique des plasmas chauds; International audience; The magnitude of exchange bias (H-ex) at room temperature can be significantly enhanced in IrMn/Co and (Pt(or Pd)/Co)/IrMn/Co structures thanks to the insertion of an ultrathin Cu dusting layer at the IrMn/Co interface. The combination of trilayer structure and interfacial Cu dusting leads to a three-fold increase in H-ex as compared to the conventional IrMn/Co bilayer structure, with an increased blocking temperature (T-B) and a concave curvature of the temperature dependence H-ex(T), ideal for improved Thermally Assisted-Magnetic Random Access Memory storage layer. This exchange bias enhancement is ascribed to a reduction of the spin frustration at the IrMn/Co interface thanks to interfacial Cu addition.

We study in-plane magnetic tunnel junctions with additional perpendicular polarizer for subnanosecond-current-induced switching memories. The spin-transfer-torque switching dynamics was studied as a function of the cell aspect ratio both experimentally and by numerical simulations using the macrospin model. We show that the anisotropy field plays a significant role in the dynamics, along with the relative amplitude of the two spin-torque contributions. This was confirmed by micromagnetic simulations. Real-time measurements of the reversal were performed with samples of low and high aspect ratio. For low aspect ratios, a precessional motion of the magnetization was observed and the effect of temperature on the precession coherence was studied. For high aspect ratios, we observed magnetization reversals in less than 1 ns for high enough current densities, the final state being controlled by the current direction in the magnetic tunnel junction cell., Comment: 6 pages, 7 figures

This work reports on advances in MRAM cells aiming at sub-nanosecond switching and for sub-20nm technology nodes. Ultrafast precessional spin-transfer switching in elliptical magnetic tunnel junction nanopillars is possible to obtain in samples integrating a perpendicular polarizer and a tunnel junction with in-plane magnetized electrodes. We show that spin transfer torque (STT) switching in less than 500ps can be achieved in these structures with corresponding write energy less than 100fJ. For high density integration and possibly sub-20nm diameter cells the use of a thermally assisted concept for perpendicular anisotropy cells, where the intrinsic heating is used to simultaneously achieve high thermal stability and low current switching.

This paper describes the working principle of thermally assisted MRAM extending the downsize scalability of MRAM and introducing new functionalities particularly useful for security applications. Ultimately, STT switching assisted by thermally induced anisotropy reorientation can be used in MTJ with perpendicular magnetic anisotropy to obtain ultimate downsize scalability with reduced power consumption.

This paper describes an original concept of thermally assisted MRAM in which memory and logic functions are combined in the same stack. The memory cell is represented by a magnetic tunnel junction having an exchange biased storage layer and a soft reference layer (called sense layer), replacing the conventional pinned reference layer. The write of the storage layer is ensured by a combination of heating pulses and magnetic stray fields created by the soft reference layer. The read is performed in a self-referenced manner by measuring the resistance variation associated to a field variation. This makes these memories much more tolerant to cell to cell variability. In addition, this stack intrinsically performs both a storage function and a comparison (XOR) function. This device called a Magnetic Logic Unit (MLU™) is particularly suited for security applications and Content Addressable Memories.

A method to switch the magnetization of the free layer in magnetic tunnel junctions with perpendicular anisotropy is demonstrated. It consists in assisting the spin transfer switching of the magnetization by a thermally induced reorientation of the free layer magnetic anisotropy from out-of-plane to in-plane. The junction temperature increase is due to the Joule dissipation around the tunnel barrier produced by the same pulse of current which generates the spin transfer torque. This magnetic reorientation allows the spin transfer torque efficiency to be maximal since the spin polarization of the current is perpendicular to the magnetization of the free layer. Such a thermally assisted switching allows designing highly down-size scalable magnetoresistive random access memory cells with improved write efficiency.

International audience; Finite size effects on the exchange-bias properties of patterned antiferromagnetic/ferromagnetic (IrMn/Co) nanodots were investigated experimentally and by numerical simulations. Both the dot lateral dimension (200 × 200 nm2-50 × 50 nm2) and ferromagnetic layer thickness (2-25 nm) were varied. Two different behaviours were observed: single-shifted loops with coherent reversal for thin Co layers and double-shifted loops via a multidomain state during magnetization reversal for thicker Co. Atomistic simulations including magnetostatic interactions confirmed the existence of these two different regimes. MOKE measurements, focused on few dots, allowed a quantitative evaluation of dot-to-dot exchange-bias variability, which becomes particularly large in the regime of switching via multidomain state formation. This variability issue is of particular importance in the context of MRAM development and of magnetoresistive heads for hard-disk drives.

We have determined the write power density dependence on heating pulse width and antiferromagnet (AF) thickness using magnetic tunnel junctions whose storage layer is exchange biased with IrMn or FeMn. An increase in write power density needed to write the storage layer has been observed for both AF as pulse width is decreased from 0.1 ms to 10 ns. Quasistatic blocking temperatures (Tb) were measured on both full sheet and patterned samples, showing a reduction in Tb for patterned samples which we link to process induced damages. Power-temperature relationship was established based on a correspondence between writing power for long pulse duration and quasistatic Tb measurement. Both write power density and associated temperature results show a dependence of the Tb on AF thickness at pulse width as short as 10 ns. Particularly for IrMn, the relationship between write power and pulse width becomes weakly dependent on the AF thickness above a certain AF thickness. The write power density is significantly low...

The magnetic switching of the exchange biased storage layer in thermally assisted magnetic random access memory cells has been studied in the nanosecond time domain. Under reversed static external field, the magnetic tunnel junctions (MTJs) were subjected to current heating pulses long enough to heat the structure above the blocking temperature of the antiferromagnetic layer. The magnetic response of the storage layer was characterized by single-shot real-time measurement of MTJ resistance. The switching of the storage layer exhibits stochastic fluctuations. Nevertheless, using a heating current density of 4.7×106 A/cm2 corresponding to a bias voltage of 1.8 V, the switching takes place in less than 4 ns under 5 mT. Interestingly, the probability of switching versus pulse duration exhibits characteristic periodic steps which are ascribed to a combined effect of the applied field and spin transfer produced by the heating current pulses.

The temperature required to set the exchange bias of a ferro∕antiferromagnetic (F∕AF) storage bilayer as a function of the heating pulse width was studied on magnetic tunnel junctions (MTJs) of thermally assisted magnetic random access memories. Heating is produced by a pulse of electric current flowing through the junction. For sufficiently long heating pulse (>20ns), a quasiequilibrium temperature profile is reached in the MTJ. In this stationary regime, a relationship between the temperature of the storage layer and the power of the pulse was established by using an Arrhenius–Neel model of thermal relaxation. The introduction of thermal barriers between the junction tunnel barrier and the electrodes allows a significant reduction of the power required to achieve a given temperature rise of the storage layer. When the heating pulse duration is reduced from 1sto2ns, the heating power required for setting the F∕AF storage bilayer increases by about 80%. This experimental observation is quantitatively inte...

We present a study of the magnetic properties and magnetization processes in hard Co-Pt (Pt∼20at.%) films. Co-rich Co-Pt films, with thickness t ranging from 5nm up to 2μm, were prepared by electrodeposition on (0001)-oriented Ru underlayers. All samples displayed strong perpendicular magnetic anisotropy and high coercivity. Virgin magnetic domain structures for varying thickness were investigated by magnetic force microscopy (MFM). The observed increase of domain width with film thickness is well understood by full two-dimensional micromagnetic computations with no adjustable parameters. The easy-axis magnetization process, as observed by measuring virgin curves by magnetometry and imaging the corresponding magnetization configurations by MFM in variable field, consists of two stages separated by a well-defined critical field, marking the onset of domain wall propagation. A thorough analysis of the out-of-plane angular dependence of the switching field points out that unpinning of domain walls is the dom...

This work investigates the tunnel junction heating process for micrometer and submicrometer size junctions to be used in a thermally assisted magnetic random access memories write scheme. The time evolution of the heating process was obtained from experimental measurements and numerical thermal simulations. Simulation results show an initial temperature regime at very short pulse widths associated with the intrinsic heating of the junction (adiabatic regime). In this regime, for the same power density, the temperature increase is independent of the junction area. In the studied geometry, for pulse widths around 1ns and higher an additional heating occurs in the electrical leads (diffusion regime). The write power density is in this case lower for large junction areas. The use of thermal barriers is an effective mean to decrease the power density required for writing and to eliminate its junction area dependence.

The dynamic heating of submicron size junctions developed for the thermomagnetic write scheme was investigated. The dependency of the heating power density with the voltage pulse width (Δt) was measured and shows a [1−exp(−Δt∕t0)] phenomenological variation in the investigated range of pulse widths (5ns–1s). For submicron junction areas and constant pulse width, the heating power required for writing decreases as the junction area is reduced. The thermomagnetic write scheme was demonstrated through cycling of the cell between the two low and high resistance levels. This scheme was also shown to be insensitive to stray magnetic fields even in absence of any magnetic shielding of the memory.