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Photo modulated optical reflectance (PMOR) is an ideal ultra-shallow junction area metrology technique for measurement of transistor dopant distribution in integrated circuit fabrication, and the characterization of process parameters such as implant energy, implant angle, and implant dose has a significant impact on the accuracy of the ion implantation process. This study utilized deep learning to analyze various process parameters concurrently and assessed its performance on boron-doped silicon samples, the data were obtained from the power curves measured from Carrier Illumination (CI) experiments in PMOR, a deep learning model with multi-task learning architecture was developed and trained to characterize multiple process parameters, and the PMOR model incorporating a multi-task learning architecture for process parameters demonstrated superior performance in terms of accuracy and speed of characterization. The analyses indicated that applying deep learning methods to CI metrology in PMOR technology is feasible. In particular, compared with the conventional carrier irradiation technique, the ability to obtain the implantation dose and doping profile along with other process parameters such as implantation energy, implantation angle, and implantation type can better assist in the accurate realization of the ion implantation process with acceptable accuracy and time cost. [ABSTRACT FROM AUTHOR]

Asymmetric quantum wells (AQWs) utilizing interband transitions enhance second-order susceptibility over a wide wavelength range compared to natural crystals. The nonlinear susceptibility is further enhanced in AQWs with type-II band alignment as compared to type-I band alignment, a result of the larger interband charge shift. This enhancement is demonstrated in this work by analyzing three type-I and type-II AQW designs based on the lattice-matched InP/AlGaInAs materials systems using the envelope wavefunction approximation. The calculated interband second-order susceptibility tensor elements in type-II structures range between 20 and 1.60 × 103 pm/V for nearly resonant optical rectification and difference frequency generation applications at near-infrared and terahertz wavelengths, an improvement of nearly 1 order of magnitude over the type-I structures and 1–2 orders of magnitude over natural crystals such as LiNbO3, KTiOPO4 (KTP), or GaAs. A factor of 2–3 further enhancement of the tensor elements is achieved by optimizing the well widths and band offsets of the type-II asymmetric quantum wells. The type-II structure can be implemented in other material systems spanning the longwave infrared to visible wavelengths, enhancing nonlinear susceptibility for various applications, including photonic integrated circuits. [ABSTRACT FROM AUTHOR]

The dissociative photoionization of phenyl triflate (C6H5OSO2CF3), a neutral photoacid generator used in photolithography, was investigated in a gas phase experiment employing extreme ultraviolet (EUV) synchrotron radiation at 92 eV and photoelectron–photoion coincidence detection. The interaction of EUV photons with the molecule leads almost exclusively to dissociation, which is dominated by a sequential fragmentation mechanism, in which SO2, CF3, CO, and C2H2 are lost. For lithographic purposes, the lack of the observation of a fragment that could serve as a precursor for the formation of triflic acid means that the effective photoacid generator concentration in a photoresist is reduced, impacting its patterning performance in EUV lithography. A better understanding of the dissociative photoionization of photoresist components and proxies thereof can provide a crucial handle that guides the design of photoresists for the upcoming technology nodes with ever decreasing feature sizes for more powerful computer chips. [ABSTRACT FROM AUTHOR]

Photonic topological insulators have been widely studied due to the robustness of energy transport via supported edge modes immune to structural disorder. In this work, a topological gap waveguide is constructed by introducing line defect into a topological photonic crystal structure and combining it with a gap waveguide structure, the design of which, therefore, combines the advantages of both topological and gap waveguides. Not only does it give high transmission efficiency but it also enables high robustness for energy transmission under structural defects and sharp bends. Our proposed topological waveguide design can be implemented with conventional semiconductor technology and integrated into optical circuits for communication systems. [ABSTRACT FROM AUTHOR]

Herein, a novel enhancement-mode (E-mode) GaN-based p-channel FETs (p-FETs) with a linearly graded AlGaN (LGA) p-channel is proposed and numerically studied by Silvaco TCAD. Thanks to strong polarization-induced doping, three-dimensional hole gas (3DHG) can be uniformly generated in LGA to form a continuous p-channel with a hole concentration over 1018 cm–3. Combined with an optimized recessed gate structure, the LGA p-FET can simultaneously achieve a large threshold voltage (| V TH|) > 2 V and a high current density (| J DS|) of ∼10 mA mm−1 at V DS = −10 V. Additionally, two critical parameters of the LGA p-FETs, i.e. the depth of recessed gate and initial Al composition of LGA, are specifically studied to reveal the unique carrier behavior of 3DHG in the devices. Importantly, the LGA structure is further optimized and implemented as the p-type cap layer to construct an E-mode GaN n-FET. Thereby, based on the same LGA configuration, a GaN-based inverter with the matched complementary n- and p-FETs is monolithically constructed, showing sharp voltage transition. The reported novel LGA structure and its availability in both GaN-based E-mode n- and p-FETs provides valuable insights and guidance to construct highly efficient GaN p-type devices and All-GaN-based integrated circuits for compact power electronic systems. [ABSTRACT FROM AUTHOR]

Summary: While wavelength division multiplexing (WDM) technology combines several wavelengths onto a single waveguide, the technology of mode division multiplexing (MDM) allows many orthogonal modes of the same wavelength to operate simultaneously without interchannel crosstalk. Thus, the hybrid WDM and MDM network in which the two above‐mentioned techniques cooperate could give a several‐fold increase in the overall network capacity. Constructing this network requires hybrid wavelength‐and‐mode multiplexers, especially ones with high integration and complementary metal‐oxide‐semiconductor (CMOS) compatibility. In this paper, we propose a design of a four‐mode triple‐band multiplexer that is capable of multiplexing up to 12 separate optical signal flows by utilizing four eigenmodes (TE0, TE1, TE2, and TE3) and three‐wavelength windows, which center at 1310, 1490, and 1550 nm. The device is on silicon‐on‐insulator (SOI) platform, consisting of four butterfly‐shaped multimode interference (MMI) couplers, four directional couplers, and a 4×1 cascaded asymmetric Y‐junction coupler. Via numerical simulations, the proposed design is verified to be able to operate effectively on the three aforementioned bandwidth slots with an optical conversion efficiency of over 93% in all functions. Moreover, it exhibits insertion loss less than 1.5 dB and crosstalk smaller than −16 dB within 25 nm bandwidth at each wavelength window. These results can affirm the success of wavelength–mode combination, which leads to a massive improve in the channel capacity on the same optical multiplexing system for optical telecommunications and photonics on‐chip interconnections. [ABSTRACT FROM AUTHOR]

The multiplier is a pervasive critical component today. However, most of them are difficult to be integrated into an integrated circuit. In this study, we proposed a novel analog multiplier for AC power application, using CMOS process to realize the analog voltage multiplication function of double-ended input and single-ended output. Under the working voltage of 3.3 V, the multiplier can operate with a wide input voltage range of 0–1.6 V (about 48.8% of the working voltage) and a wide output voltage range of 0–2.56 V (about 77.5% of the working voltage). The multiplier is implemented through the current difference between two NMOSs operating in the linear region and the saturation region, respectively. Compared with the existing technique, the proposed analog multiplier has a wider input and output range, and better linearity. It is suitable for AC power signal tracking and modulation. Finally, the United Microelectronics Corporation 0.18 μm 1P4M CMOS standard process was used for physical implementation. Moreover, there is not any BJT or special device used. It was measured that the analog multiplier circuit consumes about 0.56 mW at a working voltage of 3.3 V. [ABSTRACT FROM AUTHOR]

Adders and subtractors are essential to many integrated circuits (IC), including microprocessors, and micro controllers. However, using complementary metal oxide semiconductor (CMOS) and field effect transistor (FET) technology to make conventional adders and subtractors increased transistor count and power consumption. So, this effort begins with hybrid adder-subtractor designs using FinFET and graphene nano-ribbon FET(GnrFET) nano technologies. Initial development of an enhanced full adder with carry prediction (EFOCP) based on multiplexer logic with rapid carry-output selection reduced sum estimation delays. The considerable reduction in carry-output selection time led to this finding. The dynamic path auto-configurable adder (DPAA) selects high-speed and low-speed carry propagation channels using the EFOCP module. The DPAA was also used to create a two-complement based dynamic path auto-configurable subtractor (DPAS). Last, the dynamic path auto-configurable joint adder-subtractor (DPAJAS) combines DPAA and DPAS. Compared to existing approaches, the proposed DPAJAS design reduces Total Energy Consumption (TEC) by 23.3%, Total Path Delay (TPD) by 17.9%, and Carry Out Rise Delay by 18.2%. It also reduces Carry Out Fall Delay (COFD) by 19.4%, Sum Rise Delay (SRD) by 18.2%, and Sum Fall Delay by 18.3%. Finally, the proposed DPAJAS reduces Average Power Consumption (APC) 17.6%. These enhancements demonstrate the higher performance and efficiency of the proposed EFOCP, DPAA, DPAS, and DPAJAS designs. [ABSTRACT FROM AUTHOR]

This paper proposes the high speed low power analysis of 12 transistors 2x4 Low Power (LP) and Low Power Inverting (LPI) Decoders by using Dual Value Logic (DVL) and Complementary Metal Oxide Semiconductor (CMOS) Logic. A huge challenge faced by this era of developing is power reduction. The LP circuit design is a requesting issue in high performance digital frameworks, for example, microchips, DSPs and other different applications. Power and speed are the main highlights considered while comparing any design. Diminishing chip area is additionally truly impressive factor, designers need to recall when suggesting any novel design. 2x4 LP and LPI Decoders using 12T (Transistor) is used for conversion of binary inputs to associated output bits in a pattern. A novel design (CMOS logic and DVL logic) of 2x4 LP and LPI Decoders using 12T is proposed with area optimization, LP and high speed in this paper. Delay and power is evaluated between the novel design and CMOS logic. The novel design of 12T LP and LPI 2x4 Decoders is 60.72% optimized for power in contrast to CMOS logic design at a typical value of 1.8V. The proposed method has been validated using Cadence 45 GPDK (Generic Product Design Key) Virtuoso Tool. [ABSTRACT FROM AUTHOR]

This paper introduces a novel, cost-effective solution designed to achieve large absorption bandwidth within the THz spectrum employing a miniaturized, single-layer metamaterial structure. The designed structure features a single circular ring composed of an ohmic resistive sheet with notably higher sheet resistance than traditional metallic resonators. This distinctive design is implemented on a lossy dielectric polyimide substrate with a backing of metallic gold. Our developed absorbing structure demonstrates the capability to achieve a substantial absorption bandwidth ranging from 3.78 to 4.25 THz, maintaining a consistent absorption rate of over 90%. Moreover, we conducted an analysis to assess its absorption performance under various sheet resistance values within the top layer. Additionally, we characterized its angular stability and polarization insensitivity through oblique incident and polarization angle analysis. Finally, an RLC circuital and interference theory approach is adopted to justify its simulated results. The proposed absorber shows potential for a broad spectrum of applications, encompassing communication, imaging, and diverse integrated circuits operating within the THz band. [ABSTRACT FROM AUTHOR]

This paper introduces a novel, cost-effective solution designed to achieve large absorption bandwidth within the THz spectrum employing a miniaturized, single-layer metamaterial structure. The designed structure features a single circular ring composed of an ohmic resistive sheet with notably higher sheet resistance than traditional metallic resonators. This distinctive design is implemented on a lossy dielectric polyimide substrate with a backing of metallic gold. Our developed absorbing structure demonstrates the capability to achieve a substantial absorption bandwidth ranging from 3.78 to 4.25 THz, maintaining a consistent absorption rate of over 90%. Moreover, we conducted an analysis to assess its absorption performance under various sheet resistance values within the top layer. Additionally, we characterized its angular stability and polarization insensitivity through oblique incident and polarization angle analysis. Finally, an RLC circuital and interference theory approach is adopted to justify its simulated results. The proposed absorber shows potential for a broad spectrum of applications, encompassing communication, imaging, and diverse integrated circuits operating within the THz band. [ABSTRACT FROM AUTHOR]

Nanostructures of noble metal offer an exciting opportunity to tune photoluminescence (PL) in 2D materials, which has shown promise for applications in plasmonic devices. However, an efficient, designable, residue‐free nanofabrication method remains challenging. Herein, a one‐step ultrafast laser nanofabrication method is performed in fabrication of laser induced periodic surface structure (LIPSS) with continuously tunable periods over a wide range (from 439 to 2086 nm) on Au. The process of LIPSS imprinting is revealed at different time scales: periodical energy deposition within hundreds of femtoseconds, phase transition after 10 ps, and resolidification after 200 ps. Furthermore, the intensity and peak shift of PL in monolayer MoS2 (1L‐MoS2) can be tuned by LIPSS, 11‐fold enhancement resulting from nanoscale confinement of the incident laser and exciton‐trion localized interconversion emanating from hot electron transfer and tensile strain. The results are promising for 2D‐materials/metal heterostructures to applications in plasmonic devices and nanophotonic integrated circuits. [ABSTRACT FROM AUTHOR]

Although substrateless micro-scale silicon waveguides are a useful and versatile platform for terahertz waves, the fact that modal fields occupy the volume of the core limits the potential to dynamically manipulate guided waves. To address this, we introduce an aperiodic lattice structure to enable the monolithic co-integration of a Vivaldi antenna-like mode converter with a substrateless silicon waveguide. This broadband transition is experimentally confirmed to exhibit ∼2.5 dB average loss for two couplers, from 220 GHz to 330 GHz, and enables a photoexcited variable attenuator as proof-of-concept demonstration. This is an important enabling step to incorporate general-purpose dynamic reconfigurability, sensing, and modulation functionality into terahertz-range silicon-based integrated circuits, which are currently limited to primarily all-passive structures. [ABSTRACT FROM AUTHOR]

Direct printing of conjugated polymer thin‐film transistors enables the fabrication of deformable devices with low cost, high throughput, and large area. However, a relatively poor device performance of printed devices remains a major obstacle to their application in high‐end display backplanes and integrated circuits. In this study, high‐performance and highly stackable printed organic transistors is developed, arrays, and circuits using a near‐amorphous polymer, indacenodithiophene‐co‐benzothiadiazole (IDT‐BT). The printed devices exhibited high saturation mobility (>1 cm2 V−1 s−1), high on/off ratio (>107), and low subthreshold slope (245 mV dec−1). In addition, 16 × 16 printed IDT‐BT arrays achieved 100% fabrication yield, with excellent device‐to‐device uniformity and low variations of mobility (9.55%) and threshold voltage (4.51%), and good operational and environmental stability (>365 days). Furthermore, five stacked 3D transistors are demonstrated with an excellent 3D uniformity without compromising device performance due to a low required thermal budget for processing amorphous IDT‐BT. Finally, a new concept of 3D universal logic gate with high voltage gain (33.91 V/V) and record density (100 printed transistors per cm2) is proposed and fabricated, which is relevant for the commercialization of low‐cost printed display backplanes and high‐density integrated circuits based on highly processable polymeric semiconductors. [ABSTRACT FROM AUTHOR]

Compensatory growth is a feeding management strategy well documented in the literature. However, the molecular and histological effects on fish still require further knowledge. This study determined the biometric, morphological, and histometric changes in adults of catfish (Lophiosilurus alexandri) after chronic fasting. Sixty adults (396.6 ± 77.5 g) were tagged with microchips and distributed in two tanks (n = 30/tank), one with normal feed and the other with total food restriction for 60 d and then refed for another 15 d. Tissue and biometric samples were taken on days 20, 40, 60 and 75. Fish reared under chronic fasting presented weight loss and had significantly lower intestinal villi height, goblet cells and muscularis thickness than those fed on a control diet. In summary, a chronic food restriction protocol can change morphology and the 15-d refeeding period was not enough to reestablish the morphological parameters and weight of L. alexandri. [ABSTRACT FROM AUTHOR]

The emergence of high‐quality thin film lithium niobate on an insulator has opened up new research opportunities in the field of integrated photonics devices. Through heterogeneous integration, it is possible to integrate light sources, electro‐optic modulators, photodetectors, and other key components onto a single chip, achieving multifunctionality. This is an accomplishment beyond the capability of standalone thin film lithium niobate. Heterogeneous integration offers an effective approach to develop photonic integrated circuits based on thin film lithium niobate platform. This review article summarizes recent advances in heterogeneously integrated photonics based on thin film lithium niobate platform. This work provides an overview of basic heterogeneously integrated photonics materials, including silicon, silicon nitride, III–V semiconductors, and 2D materials, and basic devices such as waveguides, grating couplers, lasers, microring resonators, electro‐optic modulators, and photodetectors. This work discusses the operating mechanism, design principle, fabrication methodology, and performance metrics of each device. Finally, this work summarizes the recent key advances in heterogeneously integrated photonics based on thin film lithium niobate platform and addresses the challenges that need to be tackled for the future development. [ABSTRACT FROM AUTHOR]

This paper presents the effectiveness of the copper (Cu)-based coaxial through silicon vias (CTSVs) to reduce crosstalk noise and propagation delay. In the proposed CTSVs, the polymer liners are used as insulating material which cancels the crosstalk functional failures. The impacts of the proposed CTSVs on the electrical performance are noticed for different parameters and properties of the material. Simulations of the proposed CTSVs are executed using the standard HSPICE and SYMICAD tools. The results indicated that the effects of crosstalk are reduced using the polymer liners instead of silicon dioxide (SiO2) liners in the proposed CTSVs. The electrical performances of the proposed CTSVs are investigated for various thicknesses of Cu and BCB. Furthermore, a comparative study has been carried out for the SiO2 and benzocyclobutene (BCB) liners. It is observed that BCB liner-based CTSVs crosstalk noise and delay values are reduced by up to 25.06% and 27.8% compared to the SiO2 liner-based TSVs. [ABSTRACT FROM AUTHOR]

The progressive downscaling of silicon‐based microelectronic devices delivers compact and advanced integrated circuits for fast data processing and computing. Similarly, the miniaturization of conventional optoelectronics is also an important frontier of technology for emerging lighting, imaging, communication, and sensing. Herein, this study reports a miniature dual‐functional diode (DF‐diode) with both light‐emitting and light‐detecting functionalities. The proposed micro‐scale DF‐diode exhibits a record high responsivity of 300 mA W−1 at 265 nm with an ultrafast response rise time of 3.7 ns in light‐detecting mode. While operating in emitting mode, it demonstrates an extraordinarily high −3 dB optical bandwidth above 585 MHz with an enhanced external quantum efficiency performance. Significantly, the development of micro‐scale DF‐diodes has opened up a new avenue toward the realization of an effective and long‐distance solar‐blind optical communication system in the future. [ABSTRACT FROM AUTHOR]

Seeking high‐performance photoresists is an important item for semiconductor industry due to the continuous miniaturization and intelligentization of integrated circuits. Polymer resin containing carbonate group has many desirable properties, such as high transmittance, acid sensitivity and chemical formulation, thus serving as promising photoresist material. In this work, a series of aqueous developable CO2‐sourced polycarbonates (CO2‐PCs) were produced via alternating copolymerization of CO2 and epoxides bearing acid‐cleavable cyclic acetal groups in the presence of tetranuclear organoborane catalyst. The produced CO2‐PCs were investigated as chemical amplification resists in deep ultraviolet (DUV) lithography. Under the catalysis of photogenerated acid, the acetal (ketal) groups in CO2‐PC were hydrolysed into two equivalents of hydroxyl groups, which change the exposed area from hydrophobicity to hydrophilicity, thus enabling the exposed area to be developed with water. Through normalized remaining thickness analysis, the optimal CO2‐derived resist achieved a remarkable sensitivity of 1.9 mJ/cm2, a contrast of 7.9, a favorable resolution (750 nm, half pitch), and a good etch resistance (38 % higher than poly(tert‐butyl acrylate)). Such performances outperform commercial KrF and ArF chemical amplification resists (i.e. polyhydroxystyrene‐derived and polymethacrylate‐based resists), which endows broad application prospects in the field of DUV (KrF and ArF) and extreme ultraviolet (EUV) lithography for nanomanufacturing. [ABSTRACT FROM AUTHOR]

This letter introduces an ultra‐low‐power temperature sensor utilizing dynamic leakage‐suppression (DLS) logic and thoroughly analyses its working principle. The sensor effectively tackles the weak pull‐up challenge inherent in DLS logic ensuring its compatibility with standard digital logic. By capitalizing on the super cut‐off attribute of DLS logic, the frontend of the sensor achieves ultra‐low power consumption, without compromising on measurement precision or the breadth of the temperature range. The digital part of the proposed utilizes the output frequency of the sensor's frontend as the clock source, in conjunction with an external 50 Hz reference clock, achieving a low overall power consumption. The frontend of the temperature sensor was fabricated using a 180 nm process, occupying a minimal area of 374 μm2${\mu }\text{m}^2$. The digital part of the circuit is implemented using FPGA. Following a two‐point calibration and system error removal, the sensor, operating at a supply voltage of 0.8 V, demonstrated a 3δ$3\delta$ error of ±0.54$\pm 0.54$∘C$^\circ\text{C}$ across the temperature range of −20 to 125 ∘C$^\circ\text{C}$. At 25 ∘C$^\circ\text{C}$, the resolution figure of merit of the sensor was 0.037 pJ K2$\text{K}^2$, with a maximum voltage sensitivity of 4.2 ∘C/V$^\circ\text{C/V}$.This letter introduces an ultra‐low‐power temperature sensor utilizing dynamic leakage‐suppression logic. Leveraging the super cut‐off feature of dynamic leakage‐suppression logic, the sensor's frontend achieves exceptionally low power consumption while maintaining high measurement accuracy and a wide temperature range. The sensor exhibits a 3δ$3\delta$ error of ±0.54$\pm 0.54$∘C$^\circ\text{C}$ after calibration and its resolution figure of merit is 0.037 pJ K2$\text{K}^2$. [ABSTRACT FROM AUTHOR]

The requirement of a high speed and compact phase modulator is critical for optical phased arrays (OPA) and photonic integrated circuits as it gives the space for additional devices to be incorporated in the circuit. In this study, we propose a novel design for a p-i-n phase modulator, in which, by optimizing the structural configuration, we achieve a significant increase in carrier injection, resulting in an increased refractive index change of − 0.00703 at a low voltage of 1.2 V, while also providing a π phase shift within a compact length of approximately 110 µm. Additionally, our device exhibits a high switching speed of up to 25 GHz and ensures distortion-free transmission of message signals at rates of up to 23 Gbps. These results, coupled with its exceptional optical characteristics, position our device as a promising candidate for optical beam steering applications and integration into dense, energy-efficient, and high-speed photonic integrated circuits. [ABSTRACT FROM AUTHOR]

We propose a photonic crystal-based cascaded micro ring resonator to increase the quality factor using the concept of two-dimensional constrained topological edge states. The topological features of the photonic crystal are used to acquire the increased quality factor by finite-difference time-domain (FDTD) numerical simulation. Two micro ring resonators with different band topologies that come together at an interface and are confined inside a slab of dielectric material give rise to a topological edge state. The transmission dropout issue arises whenever the quality factor is enhanced in a conventional photonic system, which can be improved remarkably by employing the present approach. As an application, the proposed topological edge state structure is used to increase the sensitivity and quality factor of the pressure sensor. In FDTD simulation, resonance wavelength shifts are employed to calculate the pressure of a system, while structural deformation and refractive index change are used as input parameters. The proposed structure is incredibly small and suitable for photonic integrated circuits. [ABSTRACT FROM AUTHOR]

It is known that the determination of the good-dice-in-bad-neighborhoods (GDBNs) has been regarded as an effective technique to reduce the value of the defect parts per million (DPPM) by identifying and rejecting the suspicious dice even though they are good in testing. Instead of examining eight immediate neighbors in a small-sized $3\times 3$ window or exploiting simple linear regression, a large-sized window can be used to recognize the broad-sighted neighborhoods and accurately infer the suspiciousness level for any given die. In this paper, the artificial neural networks (ANN)-based method can be proposed to solve the GDBN identification. Furthermore, two enhanced techniques can be further presented to improve the inference accuracy of the original ANN-based method by considering the variation of the time-dependent wafer patterns and the wafer-to-wafer relationship between two adjacent wafers. After applying the two enhanced techniques, the business profits can be improved in the new ANN-based method. Various experiments on two datasets clearly reveal the superiority of the proposed ANN-based method over the other existing methods. In addition to the reduction of the DPPM value, the new ANN-based method can achieve the 1.5X–2X better reduction in the cost of the return merchandise authorization (RMA). On the other hand, the experimental results show that the similar result can also be obtained in the other lower-yield products. By using the new ANN-based method, the relationships on bad dice cross wafers can be captured and the highly-accurate inference results can be simultaneously maintained. [ABSTRACT FROM AUTHOR]

Photonic integrated circuits (PICs) are enabling breakthroughs in several areas, including quantum computing, neuromorphic processors, wearable devices, and more. Nevertheless, existing PIC measurement methods lack the spectral precision, speed, and sensitivity required for refining current applications and exploring new frontiers such as point‐of‐care or wearable biosensors. Here, the "sweeping optical frequency mixing method (SOHO)" is presented, surpassing traditional PIC measurement methods with real‐time operation, 30 dB higher sensitivity, and over 100 times better spectral resolution. Leveraging the frequency mixing process with a sweeping laser, SOHO excels in simplicity, eliminating the need for advanced optical components and additional calibration procedures. Its superior performance is demonstrated on ultrahigh‐quality factor (Q) fiber‐loop resonators (Q = 46 × 106), as well as microresonators, realized on a new optical waveguide platform. An experimental spectral resolution of 19.1 femtometers is demonstrated using an 85‐meter‐long unbalanced fiber Mach Zehnder Interferometer, constrained by noise resulting from the extended fiber length, while the theoretical resolution is calculated to be 6.2 femtometers, limited by the linewidth of the reference laser. With its excellent performance metrics, SOHO has the potential to become a vital measurement tool in photonics, excelling in high‐speed and high‐resolution measurements of weak optical signals. [ABSTRACT FROM AUTHOR]

Frequency‐dependent nonlinear process in microresonators is widely acknowledged, but there is no theory available to calculate the conversion efficiency for each resonance of the ring, except for the phase‐matching one. Similarly for azimuth‐dependent nonlinear process in birefringent rings, there is a lack of theory to analysis the conversion efficiency for each azimuth of the ring. Consequently, it leads to old‐fashioned or ill‐considered coupling position and inefficient energy conversion in birefringent microrings. Here, the study introduces spatio‐temporal coupled‐mode equation to describe mode spatial properties in the cavity, compensating for the deficiency of temporal coupled‐mode equation in describing sophisticated responses. By this equation, it is found that over a wide frequency range, the extremely strong second‐harmonic generation of TE modes can be achieved at different azimuth under different pumps in an X‐cut lithium niobate microring, as proved by a 440 000%/W conversion efficiency in a non‐poling ring recently. This theory is important for realizing an efficient entangled quantum light source, for example. Meanwhile, it will provide new ideas and guidelines for design and applications of monolithic birefringent photonic integrated circuits with high energy efficiency. [ABSTRACT FROM AUTHOR]

As the integration of chips in 3D integrated circuits (ICs) increases and the size of micro-bumps reduces, issues with the reliability of service due to electromigration and thermomigration are becoming more prevalent. In the practical application of solder joints, an increase in the grain size of intermetallic compounds (IMCs) has been observed during the reflow process. This phenomenon results in an increased thickness of the IMC layer, accompanied by a proportional increase in the volume of the IMC layer within the joint. The brittle nature of IMC renders it susceptible to excessive growth in small-sized joints, which has the potential to negatively impact the reliability of the welded joint. It is therefore of the utmost importance to regulate the formation and growth of IMCs. The following paper presents the electrodeposition of a Ni-W layer on a Cu substrate, forming a barrier layer. Subsequently, the barrier properties between the Sn/Cu reactive couples were subjected to a comprehensive and systematic investigation. The study indicates that the Ni-W layer has the capacity to impede the diffusion of Sn atoms into Cu. Furthermore, the Ni-W layer is a viable diffusion barrier at the Sn/Cu interface. The "bright layer" Ni2WSn4 can be observed in all Ni-W coatings during the soldering reflow process, and its growth was almost linear. The structure of the Ni-W layer is such that it reduces the barrier properties that would otherwise be inherent to it. This is due to the "bright layer" Ni2WSn4 that covers the original Ni-W barrier layer. At a temperature of 300 °C for a duration of 600 s, the Ni-W barrier layer loses its blocking function. Once the "bright layer" Ni2WSn4 has completely covered the original Ni-W barrier layer, the diffusion activation energy for Sn diffusion into the Cu substrate side will be significantly reduced, particularly in areas where the distortion energy is concentrated due to electroplating tension. Both the "bright layer" Ni2WSn4 and Sn will grow rapidly, with the formation of Cu-Sn intermetallic compounds (IMCs). At temperatures of 250 °C, the growth of Ni3Sn4-based IMCs is controlled by grain boundaries. Conversely, the growth of the Ni2WSn4 layer (consumption of Ni-W layer) is influenced by a combination of grain boundary diffusion and bulk diffusion. At temperatures of 275 °C and 300 °C, the growth of Ni3Sn4-based IMCs and the Ni2WSn4 layer (consumption of Ni-W layer) are both controlled by grain boundaries. The findings of this study can inform the theoretical design of solder joints with barrier layers as well as the selection of Ni-W diffusion barrier layers for use in different soldering processes. This can, in turn, enhance the reliability of microelectronic devices, offering significant theoretical and practical value. [ABSTRACT FROM AUTHOR]

High-dimensional entanglement of optical angular momentum has shown its enormous potential for increasing robustness and data capacity in quantum communication and information multiplexing, thus offering promising perspectives for quantum information science. To make better use of optical angular momentum entangled states, it is necessary to develop a reliable platform for measuring and analyzing them. Here, we propose a hybrid metadetector of monolayer transition metal dichalcogenide (TMD) integrated with spin Hall nanoantenna arrays for identifying Bell states of optical angular momentum. The corresponding states are converted into path-entangled states of propagative polaritonic modes for detection. Several Bell states in different forms are shown to be identified effectively. TMDs have emerged as an attractive platform for the next generation of on-chip optoelectronic devices. Our work may open up a new horizon for devising integrated quantum circuits based on these two-dimensional van der Waals materials. [ABSTRACT FROM AUTHOR]

Recently, a great deal of interest has been focused on developing sensors that can measure both pressure and light. However, traditional sensors are difficult to integrate into silicon (Si)-based integrated circuits. Therefore, it is particularly important to design a sensor that operates on a new principle. In this paper, junction piezotronic transistor (JPT) arrays based on zinc oxide (ZnO) nanowire are demonstrated. And the JPT arrays show high spatial resolution pressure and light mapping with 195 dpi. Because ZnO nanowires are arranged vertically above the p-type Si channel's center of the transistor, the width of the heterojunction depletion region is constricted by the positive piezoelectric potential generated by strained ZnO. In addition, photogenerated charge carriers can be created in the Si channel when JPT is stimulated by light, which increases its electrical conductivity. Consequently, the external pressure and light distribution information can be obtained from the variation in the output current of the device. The prepared JPT arrays can be compatible with Si transistors, which make them highly competitive and make it possible to incorporate both pressure and light sensors into large integrated circuits. This work will contribute to many applications, such as intelligent clothing, human–computer interaction, and electronic skin. [ABSTRACT FROM AUTHOR]

Integrated photonics is demanded in applications operating at ultraviolet to visible wavelengths, such as atomic/quantum systems, on‐chip broadband receivers, and far‐field structured illumination autofluorescence microscopy. A fundamental challenge in these applications is efficient edge coupling from a single‐mode fiber (SMF) to on‐chip photonic components, which is critical for on‐chip integration. In this paper, a high‐efficiency edge coupler based on an alumina‐on‐insulator platform is introduced and experimentally validated. The coupler employs a symmetric double‐tip taper and a multimode interference (MMI)‐based optical combiner. The double‐tip taper effectively expands the mode field diameter at the chip facet to match that of the SMF at the initial stage. Then the MMI‐based combiner efficiently combines the two channels in the taper into a highly confined strip waveguide. A coupling loss of 2.85 dB/facet has been achieved for the transverse magnetic mode at the wavelength of 407 nm, which is the lowest insertion loss for fiber‐chip coupling on this platform to the best of the knowledge. The design can significantly reduce the insertion loss associated with fiber‐chip coupling, offering a key component for diverse areas ranging from atomic/quantum photonic integrated circuits and ultra‐high capacity communications to optical microscopes. [ABSTRACT FROM AUTHOR]

Summary: In this study, couple inductor‐based buck power factor correction (PFC) converter is designed to mitigate dead zones of the converter. To minimize switching losses, all switches are controlled using a soft switching method, eliminating the need for snubber circuits. The circuit is controlled by an analog UC3843 pulse width modulation (PWM) integrated circuit (IC), providing natural PFC capability, which simplifies control and offers advantages in terms of size and cost compared to conventional ones. Simulation studies and prototype implementation are carried out to evaluate performance of the topology. The converter operates within a voltage range of 90–280 Vrms and has a power rating of 150 W. The results from both simulation and experimental analyses indicate that power factor (PF) of the circuit exceeds 98% and total harmonic distortion (THD) of the input current is found to be below 5% under various input voltage and load conditions. Furthermore, proposed topology demonstrated high efficiency, with measurements of 93% at full load and 95.6% at half load under 220 Vrms input voltage and 80 Vdc output voltage conditions. Outcomes highlight that the proposed topology achieves pure sinusoidal input current and exhibits competitive performance compared to other topologies used in the industry. [ABSTRACT FROM AUTHOR]

Terahertz (THz) fields are increasingly being used to address the critical challenges associated with achieving high data rates and rapid communication. In this study, a hybrid plasmonic THz waveguide is designed and analysed operating in the 2.5–3.5 THz frequency range. The waveguide is constructed using gallium arsenide as the high-refractive-index core, surrounded by aluminium arsenide and silver placed on a high-density polyethylene (HDPE) substrate. Graphene is strategically positioned between the HDPE layers to enhance light confinement. The mode properties of the proposed waveguide are simulated with Comol Multiphysics using the finite-element method and show unique characteristics. Observation of the simulated results at 2.5–3.5 THz reveals a high effective refractive index of 3.79, a maximum effective mode area of 1.88 mm2, a high birefringence of 0.2, a low dispersion of 0.10 ps THz−1 cm−1, a high mode field diameter of 15.8 mm, a high beat length of 123 mm and a low confinement loss of 1.79 × 10−9 mm−1. These features make the proposed waveguide suitable for applications in photonic integrated circuits for THz communications. [ABSTRACT FROM AUTHOR]

Photonic and plasmonic hybrid nanostructures are the key solution for integrated nanophotonic circuits with ultracompact size but relative low loss. However, the poor tunability and modulability of conventional waveguides makes them cumbersome for optical multiplexing. Here we make use of two‐dimensional molecular crystal, α‐Sb2O3 as a dielectric waveguide via total internal reflection, which shows polarization‐sensitive modulation of the propagating beams due to its large polarization mode dispersion. Both experiments and simulations are performed to verify such concept. These Sb2O3 nanoflakes can be coupled with plasmonic nanowires to form nanophotonic beam splitters and routers which can be easily modulated by changing the polarization of the incidence. It thus provides a robust, exploitable and tunable platform for on‐chip nanophotonics. [ABSTRACT FROM AUTHOR]

The growing demand for high-performance and energy-efficient processing in edge-oriented Systems-on-Chip is driving the adoption of dedicated integrated circuits that accelerate computationally intensive workloads. To minimize area and performance overhead, low-power, general-purpose CPUs are often tightly coupled with domain-specific coprocessors implementing custom instructions, thereby delivering higher throughput and reduced memory traffic. However, commonly used in-order CPUs are not optimized for instruction-level parallelism, leading to stalls in the instruction stream while waiting for long-latency coprocessor operations and under-utilization of the coprocessor while executing other instructions. This work investigates the benefits of replacing simple in-order cores with a more complex out-of-order architecture to dynamically schedule instructions for the main core and coprocessor, optimizing resource utilization and reducing execution time. To ensure generality, an in-depth analysis was carried out by offloading instructions to a custom dummy coprocessor capable of emulating iterative and pipelined operations with arbitrary latency. Various workloads simulating real-world applications were executed on two variants of an open-source microcontroller equipped with a recent out-of-order core and the state-of-the-art CV32E40X in-order core, respectively. Results from Register Transfer Level simulations show that the former configuration executes up to 60% more instructions per cycle, with a modest 12% system area overhead on a 65 nm CMOS technology node. [ABSTRACT FROM AUTHOR]

Power estimation has a major impact on the reliability of very-large-scale integration (VLSI) circuits. As a results power estimation is highly needed in VLSI circuits at the early stages. One of the evident challenges in integrated circuit (IC) industry is development and investigation of techniques for the reduction of design complexity due to the growing process variations and reduction of chip manufacturing turnaround time. Under these conditions, the higher design levels of average power estimation before the chip manufacturing process is highly essential for the calculation of power budget and to take the necessary steps for the reduction of power consumption. Over the years, most of the approaches were designed to estimate the power usage, however, most of the conventional techniques are time consuming, resource-intensive and largely manual. Machine learning techniques have received much attention in many of the engineering applications and are capable for modelling the complex systems through historical data. Hence, in this work on chip-based power estimation for complementary metaloxide-semiconductor (CMOS) VLSI using support-vector machine (SVM) is presented to estimate the power. The SVM is employed to estimate the usage of power at runtime. The performance of this model is evaluated in terms of Power usage, delay, data accuracy and error rate. [ABSTRACT FROM AUTHOR]

For the development of the remote elemental analysis method in a radiation environment based on the laser-induced breakdown spectroscopy (LIBS), the radiation effects on the laser oscillation properties of the single crystal (SC) Nd:YAG microchip laser (MCL) were investigated and compared with those of ceramic Nd:YAG MCL. The laser oscillation properties were measured under gamma ray irradiation as a function of dose rate. The effects on the SC MCL properties were very small compared to those on the ceramics, indicating minimal radiation effects on the LIBS signal when using SC MCL. Pulse energy and oscillating build-up time (BUT) were measured for cumulative dose exceeding 1400 kGy. The pulse energy remained stable under irradiation. The BUT also remained stable, demonstrating negligible optical loss accumulation that could affect laser properties even at the demonstrated cumulative dose. The results indicate that the effects of dose rate and cumulative dose on SC MCL laser properties are minimal. The SC MCL was then integrated into the LIBS system, and the gadolinium signal was successfully measured at a dose rate of 5 kGy/hr. These findings highlight the radiation tolerance of SC MCL for remote LIBS applications in harsh radiation environments. [ABSTRACT FROM AUTHOR]

Topological photonics is considered to be a robust and flexible platform for the design of nanophotonic devices against structural imperfections and performance degradation. Combining with parity‐time (PT) symmetry systems based on spatially distributed gain and loss, photonic crystal (PhC) lasers with micron‐size carrier reservoirs offer an ideal test bed for lasing mode competition and topological protection in nanophotonic structures. In this study, single topological edge mode (TEM) lasing is demonstrated in PhC lasers with a Su–Schrieffer–Heeger lattice comprised of coupled nanoresonators. By inducing directional loss control, a mode selection strategy is implemented, that achieves single TEM lasing with a side‐mode‐suppression ratio exceeding 30 dB. One of the TEMs exhibits remarkable robustness against local potential variation introduced by additional loss channels. This strategy integrating both topological protection and PT symmetry in nanophotonics would open up new prospects for the development of on‐chip single‐mode topological lasers unperturbed by output channels in nanophotonic integrated circuits. [ABSTRACT FROM AUTHOR]

Gallium Phosphide (GaP) has recently received considerable attention as a suitable material for building photonic integrated circuits due to its remarkable optical and piezoelectric properties. Usually, GaP is grown epitaxially on III–V substrates to keep its crystallinity and later transferred to silicon wafers for further processing. Here, an alternative promising route for the fabrication of optomechanical (OM) cavities on GaP epitaxially grown on nominally (001)‐oriented Si is introduced by using a two‐step process consisting of a low‐temperature etching of GaP followed by selective etching of the underneath silicon. The low‐temperature (–30 °C) during the dry‐etching of GaP hinders the lateral etching rate, preserving the pattern with a deviation between the design and the pattern in the GaP layer lower than 5%, avoiding the complex process of transferring and bonding a GaP wafer to a silicon‐on‐insulator wafer. To demonstrate the quality and feasibility of the proposed fabrication route, suspended OM cavities are fabricated and experimentally characterized. The cavities exhibit optical quality factors between 103 and 104 at telecom wavelengths, and localized mechanical resonances ≈3.1 GHz with quality factors ≈63 when measured at room temperature. These results suggest a simple and low‐cost way to build GaP‐based photonic devices directly integrated on industry‐standard Si(001) photonic wafers. [ABSTRACT FROM AUTHOR]

Deep learning has revolutionized many sectors of industry and daily life, but as application scale increases, performing training and inference with large models on massive datasets is increasingly unsustainable on existing hardware. Highly parallelized hardware like Graphics Processing Units (GPUs) are now widely used to improve speed over conventional Central Processing Units (CPUs). However, Complementary Metal-oxide Semiconductor (CMOS) devices suffer from fundamental limitations relying on metallic interconnects which impose inherent constraints on bandwidth, latency, and energy efficiency. Indeed, by 2026, the projected global electricity consumption of data centers fueled by CMOS chips is expected to increase by an amount equivalent to the annual usage of an additional European country. Silicon Photonics (SiPh) devices are emerging as a promising energy-efficient CMOS-compatible alternative to electronic deep learning accelerators, using light to compute as well as communicate. In this review, we examine the prospects of photonic computing as an emerging solution for acceleration in deep learning applications. We present an overview of the photonic computing landscape, then focus in detail on SiPh integrated circuit (PIC) accelerators designed for different neural network models and applications deep learning. We categorize different devices based on their use cases and operating principles to assess relative strengths, present open challenges, and identify new directions for further research. [ABSTRACT FROM AUTHOR]

The pain assessment in animals is challenging as they cannot verbally express the site and severity of pain. In this study, we tried a small implantable actimeter, "Nanotag", to monitor spontaneous locomotor activity and body temperature in animals suffering from a chemical-induced rat knee arthritis as compared to naïve and steroid-treated rats. Nanotag could detect the decrease in locomotor activity quickly after the arthritis induction and anti-inflammation analgesic treatment by intra-articular injection of steroid significantly improved locomotor activity. These changes were in the same line with those of a conventional knee pain evaluation method (incapacitance test). Nanotag can be utilized as the non-interventional, continuous, and completely objective monitoring the amount of pain in rat knee arthritis model. This traditional yet innovative method may be universally applicable to various pain models and species, making it a worthwhile device for research across diverse fields. [ABSTRACT FROM AUTHOR]

AlN is a promising candidate for photonic integrated circuits. In this study, horizontally stacked transverse quasi‐phase‐matched (QPM) waveguides with an AlN center core and Si3N4, Ta2O5, and TiO2 side cores were designed to generate squeezed light at 920 nm. The squeezing level was calculated by considering the propagation loss at the wavelengths of the squeezed light and pump light. Using TiO2 for the side cores enhanced the electric field amplitude of the pump light in the AlN center core, and a high nonlinear coupling coefficient was obtained. Owing to the small propagation loss of the AlN waveguide on sapphire and high nonlinear coupling coefficient of the transverse QPM with TiO2 side cores, a squeezing level of over 8.1 dB was expected with a 1 cm long waveguide and pump power of 70 mW. [ABSTRACT FROM AUTHOR]

In integrated photonic circuits, microring resonators are essential building blocks but are susceptible to phase errors due to fabrication imperfections and optical power fluctuations. Conventional active phase tuning methods are power-intensive and challenging to integrate into densely packed photonic chips. This study proposes a solution by integrating a thin 2D layer of In4/3P2Se6 (InPSe) onto silicon microring resonators (Si-MRR). This approach mitigates sensitivity to laser power and achieves non-volatile wavelength trimming. Under bias voltage, the device exhibits electro-optic behavior, offering a non-volatile phase trimming rate of −2.62 pm/V to −4.62 pm/V, corresponding to InPSe thicknesses of 45 nm to 120 nm. Low optical losses of 0.0091 to 0.0361 dB/μm were also measured, corresponding to thicknesses of 30 nm to 120 nm. The devices demonstrate stable in-situ resonance wavelength stabilization and bidirectional trimming, ensuring cyclic stability for non-volatile phase control. This advancement enhances the performance of silicon photonics across diverse applications, facilitating high-capacity, high-power operation in compact designs. [ABSTRACT FROM AUTHOR]

The logic circuit is the main component of an integrated circuit chip that dictates the operation and performance of the chip. The logic circuit based on a memristor can improve the integration and operation speed of the existing integrated circuit and reduce the chip size and the number of devices used by a single logic circuit. However, most of the research on logic circuits based on memristors has focused only on simulations, and research on the realization of logic circuits by hardware using actual memristors is limited. In this paper, a memristor based on graphene oxide with stable complementary resistive switching characteristics is fabricated, a logic circuit is built by using this device, and the logic functions of "IMP," "AND," and "NOR" are successfully realized. The complementary resistive switching device can alleviate the severe power loss caused by the memory separation of the von Neumann architecture. Moreover, its unique structure enables it to realize material logic independently without the use of multiple memristors and resistors, providing a new scheme for the physical realization of logic circuits. It also opens up a new path for integrated chips to break through von Neumann architecture. [ABSTRACT FROM AUTHOR]

Efficient isolation and patterning of biomolecules is a vital step within sample preparation for biomolecular analysis, with numerous diagnostic and therapeutic applications. For exosomes, nanoscale lipid‐bound biomolecules, efficient isolation is challenging due to their minute size and resultant behavior within biofluids. This study presents a method for the rapid isolation and patterning of magnetically tagged exosomes via rationally designed micromagnets. Micromagnet fabrication utilizes a novel, scalable, and high‐throughput laser‐based fabrication approach that enables patterning at microscale lateral resolution (<50 µm) without lithographic processing and is agnostic to micromagnet geometry. Laser‐based processing allows for flexible and tunable device configurations, and herein magnetophoretic capture within both an open‐air microwell and an enclosed microfluidic system is demonstrated. Patterned micromagnets enhance localized gradient fields throughout the fluid medium, resulting in rapid and high efficiency magnetophoretic separation, with capture efficiencies nearing 70% after just 1s within open‐air microwells, and throughputs upward of 3 mL h−1 within enclosed microfluidic systems. Using this microchip architecture, immunomagnetic exosome isolation and patterning directly from undiluted plasma samples is further achieved. Lastly, a FEA‐based modeling workflow is introduced to characterize and optimize micromagnet unit cells, simulating magnetophoretic capture zones for a given micromagnet geometry. [ABSTRACT FROM AUTHOR]

Electrically tunable optical devices present diverse functionalities for manipulating electromagnetic waves by leveraging elements capable of reversibly switching between different optical states. This adaptability in adjusting their responses to electromagnetic waves after fabrication is crucial for developing more efficient and compact optical systems for a broad range of applications, including sensing, imaging, telecommunications, and data storage. Chalcogenide‐based phase‐change materials (PCMs) have shown great promise due to their stable, nonvolatile phase transition between amorphous and crystalline states. Nonetheless, optimizing the switching parameters of PCM devices and maintaining their stable operation over thousands of cycles with minimal variation can be challenging. Herein, the critical role of PCM pattern as well as electrical pulse form in achieving reliable and stable switching is reported on, extending the operational lifetime of the device beyond 13000 switching events. To achieve this, a computer‐aided algorithm that monitors optical changes in the device and adjusts the applied voltage in accordance with the phase transformation process is developed, thereby significantly enhancing the lifetime of these reconfigurable devices. The findings reveal that patterned PCM structures show significantly higher endurance compared to blanket PCM thin films. [ABSTRACT FROM AUTHOR]

Photonic integrated circuits have been extensively explored for optical processing with the aim of breaking the speed and energy efficiency bottlenecks of digital electronics. However, the input/output (IO) bottleneck remains one of the key barriers. Here we report a photonic iterative processor (PIP) for matrix-inversion-intensive applications. The direct reuse of inputted data in the optical domain unlocks the potential to break the IO bottleneck. We demonstrate notable IO advantages with a lossless PIP for real-valued matrix inversion and integral-differential equation solving, as well as a coherent PIP with optical loops integrated on-chip, enabling complex-valued computation and a net inversion time of 1.2 ns. Furthermore, we estimate at least an order of magnitude enhancement in IO efficiency of a PIP over photonic single-pass processors and the state-of-the-art electronic processors for reservoir training tasks and multiple-input and multiple-output (MIMO) precoding tasks, indicating the huge potential of PIP technology in practical applications. Integrated photonic iterative processors provide a novel I/O-efficient computing paradigm for matrix-inversion-intensive tasks, achieving higher speed and energy efficiency than state-of-the-art electronic and photonic processors. [ABSTRACT FROM AUTHOR]

Metatronic circuits extend the concept of subwavelength-scaled lumped circuitry from electronics to optics and photonics, providing a distinctive design paradigm for versatile optical nanocircuits. Here, based on the design of optical nanocircuits using metatronics concept, we introduce a general approach for dispersion synthesis with metasurface to achieve high-selectivity filtering response. We theoretically and numerically demonstrate how to achieve basic circuit lumped elements in metatronics by tailoring the dispersion of metasurface at the frequency of interest. Then, following the Butterworth filter design method, the meticulously designed metasurface, acting as lumped elements, are properly stacked to achieve a near-rectangular filtering response. Compared to the conventional designs, the proposed approach can simultaneously combine high selectivity with the theoretically widest out-of-band rejection in a considerably simple and time-efficient manner of circuit assembly, similar to electronic circuits, without extensive numerical simulations and complex structures. This dispersion synthesis approach provides exciting possibilities for high-performance metasurface design and future integrated circuits and chips. [ABSTRACT FROM AUTHOR]

Designing efficient narrow-band near-infrared photodetectors integrated on silicon for telecommunications remains a significant challenge in silicon photonics. This paper proposes a novel silicon-based hot-electron photodetector employing Tamm plasmons (Si-based TP-HE PD) for narrow-band near-infrared photodetection. The device combines a one-dimensional photonic crystal (1DPC) structure, an Au layer, and a silicon substrate with a back electrode. Simulation results show that the absorption of the TP device with a back electrode is 1.5 times higher than without a back electrode, due to increased absorption from multiple reflections between the back electrode and the 1DPC structure. Experimentally, the responsivity of the fabricated device reaches 0.195 mA/W at a wavelength of 1400 nm. A phenomenological model was developed to analyze the photoelectric conversion mechanism, revealing reasonable agreement between the theoretically calculated and experimentally measured internal quantum efficiencies. Additional experiments and simulations demonstrate the tunability of the resonance wavelength from 1200 nm to 1700 nm by adjusting structural parameters. The Si-based TP-HE PD shows potential for silicon-based optoelectronic applications, offering the advantages of a simple structure, low cost, and compatibility with silicon photonic integrated circuits. This work represents the first demonstration of a silicon-based hot electron NIR photodetector utilizing Tamm plasmons. [ABSTRACT FROM AUTHOR]