101 results on '"Im, Donggu"'
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2. A digitally tunable small-area composite-varactor array operated with positive and negative control voltages for high linearity and low loss RF circuit applications
3. Dual Polarized Patch Antenna Array with Capacitive Proximity Sensor for Hand Grip Detection in 5G mmWave Mobile Devices
4. Design of Millimeter-Wave Broadband Antenna Array with hand-grip sensing for 5G mobile
5. A 2.4 GHz Reconfigurable Cascode/Folded-Cascode Inductive Source Degenerated LNA With Enhanced OP1dB and OIP3 Over Gain Reduction
6. Low Power RF Interface of the Near-field Communications Tag IC for Sensors
7. A Sub-GHz/2.4 GHz Highly Selective Reconfigurable RF Front-End Employing an N-Path Complementary Balun-LNA and Linearized RF-to-BB Current-Reuse Mixer
8. A Sub-GHz CMOS SPDT Antenna Switch Employing Linearity-Enhanced Biasing Strategy for Second-Order Harmonic Reduction
9. An Analog Baseband Spectrum Sensing Circuit Employing Voltage Follower-Based Multiorder Channel Selection Filters
10. A Reconfigurable Balun-LNA and Tunable Filter With Frequency-Optimized Harmonic Rejection for Sub-GHz and 2.4 GHz IoT Receivers
11. Characterization and optimization of partially depleted SOI MOSFETs for high power RF switch applications
12. 28-GHz CMOS Up-Conversion Mixer With Improved LO Second-Harmonic Leakage Signal Suppression for 5G Applications
13. A Concurrent Dual-band CMOS Partial Feedback LNA with Noise and Input Impedance Matching Optimization for Advanced WLAN Applications
14. A Wideband Sub-㎓ Receiver Front-end Supporting High Sensitivity and Selectivity Mode
15. A High Efficiency Low Noise RF-to-DC Converter Employing Gm-Boosting Envelope Detector and Offset Canceled Latch Comparator
16. A Reconfigurable Passive Mixer-Based Sub-GHz Receiver Front-End for Fast Spectrum Sensing Functionality
17. A Broadband PVT-Insensitive All-nMOS Noise-Canceling Balun-LNA for Subgigahertz Wireless Communication Applications
18. Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks
19. A Baseband Analog Spectrum Sensing Unit Employing Super Source Follower-Based Channel Selection Filters
20. A Current-link CMOS Analog Neuron with Simplified Synapse Using a Merged Switch Array
21. 360‐μW 4.1‐dB NF CMOS MedRadio receiver RF front‐end with current‐reuse Q ‐boosted resistive feedback LNA for biomedical IoT applications
22. A Reconfigurable CMOS Inverter-based Stacked Power Amplifier with Antenna Impedance Mismatch Compensation for Low Power Short-Range Wireless Communications
23. A 1.0 V, 5.4 pJ/bit GFSK Demodulator Based on an Injection Locked Ring Oscillator for Low-IF Receivers
24. A RF PVT Compensated Negative Resistance Circuit for Q-factor Improvement of Passive Elements in CMOS
25. A Hardware Efficient Reconfigurable Double-Balanced/Sub-Harmonic Down-Conversion CMOS Mixer for Cognitive Receiver Applications
26. A PVT Insensitive CMOS Negative Resistance Circuit for Q-factor Enhancement of FBAR
27. A highly linear super-source-follower-based reconfigurable RF filter with wide tuning range for TV receiver applications
28. A PVT insensitive noise canceling balun-LNA for TV receiver applications
29. A UHF CMOS Variable Gain LNA with Wideband Input Impedance Matching and GSM Interoperability
30. A TV Receiver Front-End With Linearized LNA and Current-Summing Harmonic Rejection Mixer
31. A 1.9-GHz silicon-on-insulator CMOS stacked-FET power amplifier with uniformly distributed voltage stresses
32. An up-conversion TV receiver front-end with noise canceling body-driven pMOS common gate LNA and LC-loaded passive mixer
33. A tunable power amplifier employing digitally controlled accumulation-mode varactor array for 2.4-GHz short-range wireless communication
34. A High IIP2 Broadband CMOS Low-Noise Amplifier With a Dual-Loop Feedback
35. A 50–450 MHz Tunable RF Biquad Filter Based on a Wideband Source Follower With > 26 dBm IIP$_{3}$, +12 dBm P$_{1{\rm dB}}$, and 15 dB Noise Figure
36. A Stacked-FET Linear SOI CMOS Cellular Antenna Switch With an Extremely Low-Power Biasing Strategy
37. Corrections to “A Highly Linear 1 GHz 1.3 dB NF CMOS Low-Noise Amplifier With Complementary Transconductance Linearization” [Jun 14 1286-1302]
38. A Highly Linear 1 GHz 1.3 dB NF CMOS Low-Noise Amplifier With Complementary Transconductance Linearization
39. A Wideband Digital TV Receiver Front-End With Noise and Distortion Cancellation
40. Highly Linear Silicon-on-Insulator CMOS Digitally Programmable Capacitor Array for Tunable Antenna Matching Circuits
41. Design methodology of tunable impedance matching circuit with SOI CMOS tunable capacitor array for RF FEM
42. In Vivo Silicon-Based Flexible Radio Frequency Integrated Circuits Monolithically Encapsulated with Biocompatible Liquid Crystal Polymers
43. A Low Power Antenna Switch Controller IC Adopting Input-coupled Current Starved Ring Oscillator and Hardware Efficient Level Shifter
44. SOI CMOS Miniaturized Tunable Bandpass Filter with Two Transmission zeros for High Power Application
45. A 0.1 to 5GHz ultra-wide band single-to-differential CMOS LNA with output balancing for SDRs
46. A 50–450 MHz Tunable RF Biquad Filter Based on a Wideband Source Follower With > 26 dBm IIP3, +12 dBm P1dB, and 15 dB Noise Figure.
47. An RF Front-end for Terrestrial and Cable Digital TV Tuners
48. High-power tunable matching circuit using SOI-CMOS digitally programmable capacitor array for 4G mobile handsets
49. Hardware-efficient non-decimation RF sampling receiver front-end with reconfigurable FIR filtering
50. A 1 GHz 1.3 dB NF +13 dBm output P1dB SOI CMOS low noise amplifier for SAW-less receivers
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