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Many data-driven applications, including computer vision, machine learning, speech recognition, and medical diagnostics show tolerance to computation error. These applications are often accelerated on GPUs, but the performance improvements require high energy usage. In this article, we present DRAAW, an approximate computing technique capable of accelerating GPGPU applications at a warp level. In GPUs, warps are groups of threads which issued together across multiple cores. The slowest thread dictates the pace of the warp, so DRAAW identifies these bottlenecks and avoids them during approximation. We alleviate computation costs by using an approximate lookup table which tracks recent operations and reuses them to exploit temporal locality within applications. To improve neural network performance, we propose neuron aware approximation, a technique which profiles operations within network layers and automatically configures DRAAW to ensure computations with more impact on the output accuracy are subject to less approximation. We evaluate our design by placing DRAAW within each core of an Nvidia Kepler Architecture Titan. DRAAW improves throughput by up to $2.8\times $ and improves energy-delay product (EDP) by $5.6\times $ for six GPGPU applications while maintaining less than 5% output error. We show neuron aware approximation accelerates the inference of six neutral networks by $2.9\times $ and improves EDP by $6.2\times $ with less than 1% impact on prediction accuracy. [ABSTRACT FROM AUTHOR]

Brain-inspired hyperdimensional (HD) computing models cognition by exploiting properties of high dimensional statistics—high-dimensional vectors, instead of working with numeric values used in contemporary processors. A fundamental weakness of existing HD computing algorithms is that they require to use floating point models in order to provide acceptable accuracy on realistic classification problems. However, working with floating point values significantly increases the HD computation cost. To address this issue, we proposed QuantHD, a novel framework for quantization of HD computing model during training. QuantHD enables HD computing to work with a low-cost quantized model (binary or ternary model) while providing a similar accuracy as the floating point model. We accordingly propose an FPGA implementation which accelerates HD computing in both training and inference phases. We evaluate QuantHD accuracy and efficiency on various real-world applications, and observe that QuantHD can achieve on average 17.2% accuracy improvement as compared to the existing binarized HD computing algorithms which provide a similar computation cost. In terms of efficiency, QuantHD FPGA implementation can achieve on average 42.3 × and 4.7 × (34.1 × and 4.1 × ) energy efficiency improvement and speedup during inference (training) as compared to the state-of-the-art HD computing algorithms. [ABSTRACT FROM AUTHOR]

Brain-inspired hyperdimensional (HD) computing emulates cognitive tasks by computing with long binary vectors—also know as hypervectors—as opposed to computing with numbers. However, we observed that in order to provide acceptable classification accuracy on practical applications, HD algorithms need to be trained and tested on nonbinary hypervectors. In this article, we propose SearcHD, a fully binarized HD computing algorithm with a fully binary training. SearcHD maps every data points to a high-dimensional space with binary elements. Instead of training an HD model with nonbinary elements, SearcHD implements a full binary training method which generates multiple binary hypervectors for each class. We also use the analog characteristic of nonvolatile memories (NVMs) to perform all encoding, training, and inference computations in memory. We evaluate the efficiency and accuracy of SearcHD on a wide range of classification applications. Our evaluation shows that SearcHD can provide on average 31.1 × higher energy efficiency and 12.8 × faster training as compared to the state-of-the-art HD computing algorithms. [ABSTRACT FROM AUTHOR]

Brain-inspired hyperdimensional (HD) computing emulates cognition by computing with long-size vectors. HD computing consists of two main modules: encoder and associative search. The encoder module maps inputs into high dimensional vectors, called hypervectors. The associative search finds the closest match between the trained model (set of hypervectors) and a query hypervector by calculating a similarity metric. To perform the reasoning task for practical classification problems, HD needs to store a non-binary model and uses costly similarity metrics as cosine. In this article we propose an FPGA-based acceleration of HD exploiting Computational Reuse ($\mathtt {HD}$ HD - $\mathtt {Core}$ Core ) which significantly improves the computation efficiency of both encoding and associative search modules. $\mathtt {HD}$ HD - $\mathtt {Core}$ Core enables computation reuse in both encoding and associative search modules. We observed that consecutive inputs have high similarity which can be used to reduce the complexity of the encoding step. The previously encoded hypervector is reused to eliminate the redundant operations in encoding the current input. $\mathtt {HD}$ HD - $\mathtt {Core}$ Core , additionally eliminates the majority of multiplication operations by clustering the class hypervector values, and sharing the values among all the class hypervectors. Our evaluations on several classification problems show that $\mathtt {HD}$ HD - $\mathtt {Core}$ Core can provide $4.4\times$ 4. 4 × energy efficiency improvement and $4.8\times$ 4. 8 × speedup over the optimized GPU implementation while ensuring the same quality of classification. $\mathtt {HD}$ HD - $\mathtt {Core}$ Core provides $2.4\times$ 2. 4 × more throughput than the state-of-the-art FPGA implementation; on average, 40 percent of this improvement comes directly from enabling computation reuse in the encoding module and the rest comes from the computation reuse in the associative search module. [ABSTRACT FROM AUTHOR]

Many applications, such as machine learning and sensor data analysis, are statistical in nature and can tolerate some level of inaccuracy in their computation. Approximate computing is a viable method to save energy and increase performance by controllably trading off energy for accuracy. In this paper, we propose a tiered approximate floating point multiplier, called CFPU, which significantly reduces energy consumption and improves the performance of multiplication at a slight cost in accuracy. The floating point multiplication is approximated by replacing the costly mantissa multiplication step of the operation with lower energy alternatives. We process the data by using one of the three modes: a basic approximate mode, an intermediate approximate mode, or on the exact hardware, depending on the accuracy requirements. We evaluate the efficiency of the proposed CFPU on a wide range of applications including twelve general OpenCL ones and three machine learning applications. Our results show that using the first CFPU approximation mode results in $3.5\times $ energy-delay product (EDP) improvement, compared to a GPU using traditional floating point units (FPUs), while ensuring less than 10% average relative error. Adding the second mode further increases the EDP improvement to $4.1\times $ , compared to an unmodified FPU, for less than 10% error. In addition, our results show that the proposed CFPU can achieve $2.8\times $ EDP improvement for multiply operations as compared to state-of-the-art approximate multipliers. [ABSTRACT FROM AUTHOR]

Neural networks (NNs) have shown great ability to process emerging applications such as speech recognition, language recognition, image classification, video segmentation, and gaming. It is therefore important to make NNs efficient. Although attempts have been made to improve NNs' computation cost, the data movement between memory and processing cores is the main bottleneck for NNs' energy consumption and execution time. This makes the implementation of NNs significantly slower on traditional CPU/GPU cores. In this paper, we propose a novel processing in-memory architecture, called NNPIM, that significantly accelerates neural network's inference phase inside the memory. First, we design a crossbar memory architecture that supports fast addition, multiplication, and search operations inside the memory. Second, we introduce simple optimization techniques which significantly improves NNs' performance and reduces the overall energy consumption. We also map all NN functionalities using parallel in-memory components. To further improve the efficiency, our design supports weight sharing to reduce the number of computations in memory and consecutively speedup NNPIM computation. We compare the efficiency of our proposed NNPIM with GPU and the state-of-the-art PIM architectures. Our evaluation shows that our design can achieve 131.5× higher energy efficiency and is 48.2× faster as compared to NVIDIA GTX 1,080 GPU architecture. Compared to state-of-the-art neural network accelerators, NNPIM can achieve on an average 3.6× higher energy efficiency and is 4.6× faster, while providing the same classification accuracy. [ABSTRACT FROM AUTHOR]

Today’s computing systems use a huge amount of energy and time to process basic queries in database. A large part of it is spent in data movement between the memory and processing cores, owing to the limited cache capacity and memory bandwidth of traditional computers. In this paper, we propose a nonvolatile memory-based query accelerator, called NVQuery, which performs several basic query functions in memory including aggregation, prediction, bit-wise operations, join operations, as well as exact and nearest distance search queries. NVQuery is implemented on a content addressable memory and exploits the analog characteristic of nonvolatile memory in order to enable in-memory processing. To implement nearest distance search in memory, we introduce a novel bitline driving scheme to give weights to the indices of the bits during the search operation. To further improve the energy efficiency, our design supports configurable approximation by adaptively putting memory blocks under voltage overscaling. Our experimental evaluation shows that a NVQuery can provide $49.3{\boldsymbol \times }$ performance speedup and $32.9{\boldsymbol \times }$ energy savings as compared to running the same query on traditional processor. Approximation improves the energy-delay product (EDP) of NVQuery by $7.3{\boldsymbol \times }$ , while providing acceptable accuracy. In addition, NVQuery can achieve $30.1{\boldsymbol \times }$ EDP improvement as compared to the state-of-the-art query accelerators. [ABSTRACT FROM AUTHOR]

This article reintroduces power gating technique in different hierarchical levels of static random-access memory (SRAM) design including cell, row, bank and entire cache memory in 16 nm Fin field effect transistor. Different structures of SRAM cells such as 6T, 8T, 9T and 10T are used in design of 2MB cache memory. The power reduction of the entire cache memory employing cell-level optimisation is 99.7% with the expense of area and other stability overheads. The power saving of the cell-level optimisation is 3× (1.2×) higher than power gating in cache (bank) level due to its superior selectivity. The access delay times are allowed to increase by 4% in the same energy delay product to achieve the best power reduction for each supply voltages and optimisation levels. The results show the row-level power gating is the best for optimising the power of the entire cache with lowest drawbacks. Comparisons of cells show that the cells whose bodies have higher power consumption are the best candidates for power gating technique in row-level optimisation. The technique has the lowest percentage of saving in minimum energy point (MEP) of the design. The power gating also improves the variation of power in all structures by at least 70%. [ABSTRACT FROM AUTHOR]

Silver nanoparticles (AgNPs) are potentially toxic materials that are used today in numerous consumer products. Releasing of AgNPs to aquatic environment may affect adversely aquatic animal health including fish. In this study, we examined the effects of AgNPs on hematological parameters of rainbow trout, Oncorhynchus mykiss. The parameters include red blood cells (RBCs) and hemoglobin (Hb), hematocrit (Hct), white blood cells (WBCs), mean corpuscular hemoglobin (MCH), mean corpuscular volume (MCV), mean corpuscular hemoglobin concentration (MCHC), alanine aminotransferase (ALT), aspartate aminotransferase (AST), alkaline phosphatase (ALP), lactate dehydrogenase (LDH), total protein (TP), and albumin (AL). Three treatment groups included fish treated with 0.1 mg/l AgNP solution (T1), 0.2 mg/l AgNP (T2), and 0.4 mg/l AgNP (T3), and one group without AgNP treatment was considered as control group. In the fourth and eighth days of the experiment, the values of RBCs and WBCs were higher in all treatments than those in the control group ( P < 0.05). The Hct in the T3 group showed lower values than that of the control group in the eighth day ( P < 0.05). Although the Hb concentrations were higher in the T2 and T3 groups than those in the control group in the first blood sampling, a significant decrease compared to the control group was observed in Hb values in the second sampling for the T3 group ( P < 0.05). The MCV and MCH in the treatment groups decreased as the concentration of AgNPs increased ( P < 0.05). In contrast, the MCHC values showed an increasing trend as the concentration of AgNPs increased ( P < 0.05). The concentrations of liver enzymes (i.e., ALT, AST, ALP, and LDH) were higher in all treatment groups than those in the control group ( P < 0.05). The TP and AL concentrations decreased compared to the control group as the concentration of AgNPs increased ( P < 0.05). Our results demonstrated that silver nanoparticles induce significant changes in hematologic parameters of rainbow trout. [ABSTRACT FROM AUTHOR]

Approximate computing is a promising alternative to improve energy efficiency for IoT devices on the edge. This work proposes a piecewise-linearly-approximated and unbiased floating-point approximate multiplier with run-time configurability. We provide a theoretically sound formulation that turns multiplication approximation to an optimization problem. With the formulation and findings, a multi-level architecture is proposed to easily incorporate run-time configurability and module execution parallelism. Finally, the proposed multiplier is further optimized to reduce the circuit implementation complexity, making the multiplier linearly dependent on the precision requirement, instead of quadratically or exponentially as in prior work. When compared to the prior state-of-the-art approximate floating-point multiplier, ApproxLP M. Imani et al, “ApproxLP: Approximate multiplication with linearization and iterative error control,” in Proc. ACM/IEEE Des. Autom. Conf., 2019, pp. 1–6., the proposed multiplier outperforms in all the aspects including accuracy, area, and delay. By replacing a full-precision floating-point multiplier in GPU, the proposed design can improve the energy efficiency for various edge computing tasks. Even with Level 1 approximation, the proposed multiplier improves energy efficiency up to 20× for machine learning on CIFAR-10, with almost negligible accuracy loss. [ABSTRACT FROM AUTHOR]

Deep random forest (DRF), which combines deep learning and random forest, exhibits comparable accuracy, interpretability, low memory and computational overhead to deep neural networks (DNNs) in edge intelligence tasks. However, efficient DRF accelerator is lagging behind its DNN counterparts. The key to DRF acceleration lies in realizing the branch-split operation at decision nodes. In this work, we propose implementing DRF through associative searches realized with ferroelectric analog content addressable memory (ACAM). Utilizing only two ferroelectric field effect transistors (FeFETs), the ultra-compact ACAM cell performs energy-efficient branch-split operations by storing decision boundaries as analog polarization states in FeFETs. The DRF accelerator architecture and its model mapping to ACAM arrays are presented. The functionality, characteristics, and scalability of the FeFET ACAM DRF and its robustness against FeFET device non-idealities are validated in experiments and simulations. Evaluations show that the FeFET ACAM DRF accelerator achieves ~106x/10x and ~106x/2.5x improvements in energy and latency, respectively, compared to other DRF hardware implementations on state-of-the-art CPU/ReRAM. [ABSTRACT FROM AUTHOR]

Introduction: Leishmania infantum is the causative agent of autochthonous cutaneous and visceral cases of leishmaniasis and transmitted by female sandflies. The dogs are considered the main reservoir hosts; however, there are the reports on Leishmania infection in other animals. In this study, occurrence types of L. infantum isolates have been analyzed by polymerase chain reaction-restriction fragment length polymorphism (PCR-RFLP) technique. Materials and Methods: In this experimental study, 77 samples were cultured and prepared for microscopic study and examined through PCR-RFLP. The samples were used for both deoxyribonucleic acid (DNA) and smear-slide preparations. The DNAs were amplified by PCR for the detection of Leishmania subgenus and PCR products were restricted with HaeIII for the species differentiation. Results: The visceral Leishmania parasites were genotyped as L. infantum. It was also determined sensitivity in PCR (100%) was higher than microscopic examination. Conclusion: PCR-RFLP technique appears to be most sensitive for the detection and differentiation of L. infantum. There exists a relationship between genetic heterogeneousness and clinical manifestation and geographical regions of this disease in human. [ABSTRACT FROM AUTHOR]

Recently, brain-inspired computing models have shown great potential to outperform today's deep learning solutions in terms of robustness and energy efficiency. Particularly, Spiking Neural Networks (SNNs) and HyperDimensional Computing (HDC) have shown promising results in enabling efficient and robust cognitive learning. Despite the success, these two brain-inspired models have different strengths. While SNN mimics the physical properties of the human brain, HDC models the brain on a more abstract and functional level. Their design philosophies demonstrate complementary patterns that motivate their combination. With the help of the classical psychological model on memory, we propose SpikeHD, the first framework that fundamentally combines Spiking neural network and hyperdimensional computing. SpikeHD generates a scalable and strong cognitive learning system that better mimics brain functionality. SpikeHD exploits spiking neural networks to extract low-level features by preserving the spatial and temporal correlation of raw event-based spike data. Then, it utilizes HDC to operate over SNN output by mapping the signal into high-dimensional space, learning the abstract information, and classifying the data. Our extensive evaluation on a set of benchmark classification problems shows that SpikeHD provides the following benefit compared to SNN architecture: (1) significantly enhance learning capability by exploiting two-stage information processing, (2) enables substantial robustness to noise and failure, and (3) reduces the network size and required parameters to learn complex information. [ABSTRACT FROM AUTHOR]

Hyperdimensional computing (HDC) is a brain-inspired computational framework that relies on long hypervectors (HVs) for learning. In HDC, computational operations consist of simple manipulations of hypervectors and can be incredibly memory-intensive. In-memory computing (IMC) can greatly improve the efficiency of HDC by reducing data movement in the system. Most existing IMC implementations of HDC are limited to binary precision which inhibits the ability to match software-equivalent accuracies. Moreover, memory arrays used in IMC are restricted in size and cannot immediately support the direct associative search of large binary HVs (a ubiquitous operation, often over 10,000+ dimensions) required to achieve acceptable accuracies. We present a multi-bit IMC system for HDC using ferroelectric field-effect transistors (FeFETs) that simultaneously achieves software-equivalent-accuracies, reduces the dimensionality of the HDC system, and improves energy consumption by 826x and latency by 30x when compared to a GPU baseline. Furthermore, for the first time, we experimentally demonstrate multi-bit, array-level content-addressable memory (CAM) operations with FeFETs. We also present a scalable and efficient architecture based on CAMs which supports the associative search of large HVs. Furthermore, we study the effects of device, circuit, and architectural-level non-idealities on application-level accuracy with HDC. [ABSTRACT FROM AUTHOR]

This paper describes the characteristics of a new 10T structure for SRAM cell that works quite well in the sub-threshold region. This new architecture has good characteristics in write and read delay and energy compared with other new structures. This new 10T topology improves read static noise margin (SNM) and write operation speed with respect to other topologies in the same or even lower power consumption. The new topology has at least 13% lower power consumption compared with the best of recent architectures. Its write characteristics also are similar to those of 6T-SRAM, which has improved write delay and energy. The new 10T SRAM cell also consumes lower power compared with other cells. The stacking is used to suppress the standby leakage through the read path. The simulations were performed using HSPICE 2011 in a 16 nm bulk CMOS Berkeley predictive technology model (BPTM). [ABSTRACT FROM PUBLISHER]

Recently, brain-inspired computing models have shown great potential to outperform today's deep learning solutions in terms of robustness and energy efficiency. Particularly, Spiking Neural Networks (SNNs) and HyperDimensional Computing (HDC) have shown promising results in enabling efficient and robust cognitive learning. Despite the success, these two brain-inspired models have different strengths. While SNN mimics the physical properties of the human brain, HDC models the brain on a more abstract and functional level. Their design philosophies demonstrate complementary patterns that motivate their combination. With the help of the classical psychological model on memory, we propose SpikeHD, the first framework that fundamentally combines Spiking neural network and hyperdimensional computing. SpikeHD generates a scalable and strong cognitive learning system that better mimics brain functionality. SpikeHD exploits spiking neural networks to extract low-level features by preserving the spatial and temporal correlation of raw event-based spike data. Then, it utilizes HDC to operate over SNN output by mapping the signal into high-dimensional space, learning the abstract information, and classifying the data. Our extensive evaluation on a set of benchmark classification problems shows that SpikeHD provides the following benefit compared to SNN architecture: (1) significantly enhance learning capability by exploiting two-stage information processing, (2) enables substantial robustness to noise and failure, and (3) reduces the network size and required parameters to learn complex information. [ABSTRACT FROM AUTHOR]

A total of 1,187 Vibrio cholerae isolates were received during 2011 cholera outbreaks from 16 provinces in different geographical location to Iranian reference Health laboratory. A random selection was performed, and 61 isolates were subjected to further investigations. Cholera cases were come up from May with nine cases and reached to its maximum rate at August (57 cases) and continued to October after which a fall occurred in September. All of the isolates were susceptible to three antimicrobial agents including ciprofloxacin, cefixime, and ampicillin. The highest rate of resistance was seen to nalidixic acid (96.7 %) and co-trimoxazole (91.8 %). Clonality of isolates was investigated through genotyping by PFGE method. A total of seven pulsotypes were obtained from 61 isolates under study. The pulsotypes were highly related with only 1-3 bands differences. Three pulsotypes (PT5, PT6, and PT7) constituted 93.4 % of total isolates. One environmentally isolated strain showed distinct pattern from clinical specimens. This strain although had no any evidence in identified cholera infections, highlighted selecting more environmental specimens in any future outbreaks as long as human samples. In conclusion, emergence and dominance of Ogawa serotypes after about 7 years in Iran are alarming due to fear of import of new V. cholerae clones from out of the country. Approximately, one third of patients in 2011 cholera outbreak in Iran were of Afghan or Pakistani nationality which makes the hypothesis of import of Ogawa serotype strains from neighboring countries more documented and signifies the need to monitor and protect the boundaries. [ABSTRACT FROM AUTHOR]

Objective: In-time diagnosis of Streptococcus pneumoniae (S. pneumonia) can play a significant role in decreasing morbidity and mortality rate. Applying molecular methods has gained popularity due to the existing limits of routine diagnostic methods. Examining the expression of different genes of this bacterium through different molecular methods suggests that lytA gene has a higher sensitivity and specificity in diagnosis of Streptococcus pneumoniae. The aim of this study was to evalutate lytA gene expression in diagnosis of invasive S. pneumonia in culture positive specimens by real-time polymerase chain reaction (PCR). Materials and Methods: IIn this a descriptive study, All received specimens were isolated to identify S. pneumoniae. DNA was then extracted and after optimizing the test and determining the detection limit, samples were tested by real-time PCR using lytA gene primers. Results: Twenty seven isolates were diagnosed as S. pneumoniae. In all, the extracted DNA was positive in real-time method. The electrophoresis of the products also confirmed the presence of single product b along with the 53 base pair fragment. The detection limit of the test was less 6 colony forming unit (CFU). Conclusion: Real-Time PCR seems to provide reliable and rapid results. We suggest that this test should be conducted on the preliminary isolated specimens, since applying various biochemical tests need one extra working day. [ABSTRACT FROM AUTHOR]