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In this study, we present a preprocess method using radiation energy intervals on a gamma-ray spectrum based on a deep learning algorithm to achieve real-time radionuclide identification. Data preprocessing is performed by classifying energy intervals, distinctly corresponding to pulse amplitudes of each radiation measurement system. Since the energy intervals are distinguished with noise, backscatter area, Compton edge, and photopeaks depending on radionuclides, raw data are sorted in each interval in preprocessed dataset using a deep learning algorithm. Using60Co,137Cs, and the energy interval preprocessing, the multi-source identification shows 100% accuracy in 2000 measured data compared with 70% accuracy for those without the preprocessing method. The measured time is 72 s for 2000 test data, dramatically reduced from the conventional data collection time of 60 min for 100 000 data. The proposed approach reduces the minimum number of data to identify radionuclides before visualizing the spectrum. With the preprocess method, radionuclide identification is completed in tens of seconds, applicable for low radiation activity areas such as decommissioning reactor sites.

Many studies are undertaken into nuclear power plants (NPPs) in preparation for accidents exceeding design standards. In this paper, we analyze the applicability of various wireless communication technologies as accident countermeasures in different NPP environments. In particular, a commercial wireless communication module (WCM) is investigated by measuring leakage current and packet error rate (PER), which vary depending on the intensity of incident radiation on the module, by testing at a Co-60 gamma-ray irradiation facility. The experimental results show that the WCMs continued to operate after total doses of 940 and 1097 Gy, with PERs of 3.6% and 0.8%, when exposed to irradiation dose rates of 185 and 486 Gy/h, respectively. In short, the lower irradiation dose rate decreased the performance of WCMs more than the higher dose rate. In experiments comparing the two communication protocols of request/response and one-way, the WCMs survived up to 997 and 1177 Gy, with PERs of 2% and 0%, respectively. Since the request/response protocol uses both the transmitter and the receiver, while the one-way protocol uses only the transmitter, then the electronic system on the side of the receiver is more vulnerable to radiation effects. From our experiments, the tested module is expected to be used for design-based accidents (DBAs) of “Category A″ type, and has confirmed the possibility of using wireless communication systems in NPPs.

Radiation sensor interface circuits can be mounted on sensor nodes in wireless sensor networks to detect radiation signals. They respond quickly to operators and command centers, allowing appropriate decisions to be made to mitigate nuclear power plant accidents. For instance, high-level radiation leaked from a reactor building during a nuclear plant accident can degrade the performance of the radiation sensor interface implemented by integrated circuits due to threshold voltage shift, leakage current change, and noise increase induced by radiation impact events. To obtain reliable signal measurements in the high radiation environment, radiation-hardening technologies must be applied to radiation sensor interface circuits. The radiation-hardened sensor interface circuit proposed in this article exploits a pair of charge-sensitive amplifiers (CSAs) in dual paths to equivalently cancel out the distorted output signals caused by radiation impacts on the circuits. In addition, a low-power, fully differential successive approximation register (SAR) analog-to-digital converter (ADC) is used to reduce the radiation effects by subtracting the radiation-induced noise of one input from the other. The implemented radiation sensor interface circuit can maintain its performance up to 1.0 mrad (SiO2) of irradiation with only 2.5 mW power consumption, while successfully sensing and transferring the radiation information to the downstream signal-processing network.

According to the continuous development of metal-oxide semiconductor (MOS) fabrication technology, transistors have naturally become more radiation-tolerant through steadily decreasing gate-oxide thickness, increasing the tunneling probability between gate-oxide and channel. Unfortunately, despite this radiation-hardened property of developed transistors, the field of nuclear power plants (NPPs) requires even higher radiation hardness levels. Particularly, total ionizing dose (TID) of approximately 1 Mrad could be required for readout circuitry under severe accident conditions with 100 Mrad around a reactor in-core required. In harsh radiating environments such as NPPs, sensors such as micro-pocket-fission detectors (MPFD) would be a promising technology to be operated for detecting neutrons in reactor cores. For those sensors, readout circuits should be fundamentally placed close to sensing devices for minimizing signal interferences and white noise. Therefore, radiation hardening ability is necessary for the circuits under high radiation environments. This paper presents various integrated circuit designs for a radiation hardened charge-sensitive amplifier (CSA) by using SiGe 130 nm and Si 180 nm fabrication processes with different channel widths and transistor types of complementary metal-oxide-semiconductor (CMOS) and bipolar CMOS (BiCMOS). These circuits were tested under &gamma, &ndash, ray environment with Cobalt-60 of high level activity: 490 kCi. The experiment results indicate amplitude degradation of 2.85%&ndash, 34.3%, fall time increase of 201&ndash, 1730 ns, as well as a signal-to-noise ratio (SNR) of 0.07&ndash, 11.6 dB decrease with irradiation dose increase. These results can provide design guidelines for radiation hardening operational amplifiers in terms of transistor sizes and structures.

Radiation-hardened-by-design (RHBD) techniques have kept evolving for the past decades to satisfy the requirements of irradiating environments; however, the possibilities of severe nuclear accidents still remain. To prevent and be well prepared for extreme events, advanced circuit designs reliable under harsh conditions are necessary. Successive approximation register (SAR) analog-to-digital converter (ADC) has advantages in regards to low power consumption and simple structure compared to any other types of ADCs. Various schemes of calibration for nonlinearity issues are reducing capacitor sizes. The main purpose is to design SAR ADC that sustains performance under radiating environments by optimizing sizes of MOSFETs. In the conference presentation, the proposed Successive Approximation Register Analog to Digital Converter size optimizations and layout for robust-to radiation device will be discussed with initial simulation results. General aspects of the circuit are left unchanged, only simple modifications have been made, thus easily adaptable to radiation hardening applications.

We investigated the scintillation properties of Ce:GPS (Ce:Gd2Si2O7), Pr:LuAG (Pr:Lu3Al5O12), and LYSO (Lu2(1 − x)Y2xSiO5) scintillators in high-temperature and high-radiation environments to evaluate their potential application in harsh environments. The temperature dependence of the scintillators was investigated from room temperature to 350 °C. The LYSO scintillator was very vulnerable to high temperatures while the light output of Pr:LuAG scintillator decreased rapidly above 200 °C. The Ce:GPS scintillator demonstrated almost constant light output to 250 °C and decrease about 30% at 300 °C. We also measured the changes in the light yield and transmittance of the scintillators in the range of 0–3.83 MGy. At the highest gamma rays radiation dose, the light output of Ce:GPS, Pr:LuAG, and LYSO compared to the reference scintillator were 15.3% ± 1.8%, 36.7% ± 3.1%, and 73.4% ± 2.6%, respectively. However, Ce:GPS demonstrated a pronounced and fast recovery via thermal annealing, and it recovered within 30 minutes at 400 °C and 1 hour at 300 °C. These properties permit the potential application of Ce:GPS in extreme environments.

This paper presents measurement results of a method by which the shapes of the output signals derived from a front-end readout circuit can be made insensitive to the input detector capacitance, to a degree limited only by the accuracy with which one can make an amplifier with unity gain. A charge sensitive amplifier including the detector capacitance compensation technique was implemented in a standard 180-nm CMOS technology with a 3.3-V supply voltage. The results show that the technique can successfully mitigate the performance degradation that accompanies large detector capacitance derived from either large-area radiation sensors and/or high permittivity materials, such as nanocrystalline assemblies. In order to verify the feasibility of the technique, we measured alpha particle spectra on two different sized silicon detectors that have detector capacitances of 1.26 pF and 21.84 pF, derived from 2-mm- and 10-mm-diameter devices, respectively. A configuration for integrating the fabricated preamplifier with a detector is also described to exploit the technique for any other application or experiment.

High-speed pulse-shape analysis can allow one to extract the physical parameters that govern radiation interaction. This brief presents a transimpedance preamplifier that can replace conventional configurations that contain a charge-sensitive preamplifier and shaping amplifier chain, particularly for high-speed radiation measurement systems. A transimpedance amplifier is a primary circuit of the preamplifier design based on a feedback structure with cascade inverting amplifiers and a feedback resistor, but it incorporates a bandwidth and gain enhancement technique that utilizes a series $LC$ circuit at the input of the amplifier. This configuration is designed to reduce the size, power consumption, and complexity of the front-end circuitry traditionally used in radiation measurements while enhancing pulse-shape analyses by preserving the temporal information of the carriers following radiation impingement. The preamplifier implemented in the 180-nm CMOS process exhibits an 83- $\mbox{dB}\Omega$ transimpedance gain and a 1.75-GHz bandwidth while consuming 48.6 mW using a 1.8-V supply.

This work experimentally compares total ionizing dose (TID) effects on various inverter designs, which are fundamental components for implementing radiation hardening by design (RHBD) digital circuits. Based on prior works, which reported that leakage current variation of NMOS transistors is significantly larger than that of PMOS, this work suggests design methodologies to alleviate TID effects on NMOS transistors with the following inverter topologies: stacked NMOS inverter, pseudo PMOS inverter, PMOS-only inverter, and dummy transistor inverter. We have also investigated different sizes of the inverters as well as different PN ratios to optimize them for a more robust design that can operate under high radiation environments. These designs are fabricated in the 180 nm CMOS process and measured performance degradations by using a 60Co source. Experimental results show that the stacked NMOS inverter provides best performance in terms of switching point variation, area, and power consumption. In addition, one with larger transistor size and PN ratio is more helpful in TID hardening. Given that an inverter is an essential and basic building block of digital systems, the proposed techniques can be adopted in any systems requiring operation under radiation-emitting circumstances, e.g., measurement devices in nuclear power plants or electronics in space.

This paper presents a neural network approach for the identification of gamma emitting radionuclides measured by Silicon Photomultipliers (SiPMs). SiPMs have wide-ranging applications in the field of radiation monitoring and medical imaging due to their high quantum efficiency, high gain, and compactness. For better accuracy on the measured information, however, we should consider the disadvantages: dark count rate, optical crosstalk, and temperature sensitivity. Regarding temperature dependencies, conventional approaches are mainly focused on compensating gain variances against temperature by adding circuits or calibrating signals. In contrast with previous works, we propose a new approach exploiting two-layer fully connected neural network with a SiPM. The neural network is composed of rectified linear unit (ReLU) layers and a softmax layer. A Saint-Gobain Lutetium-yttrium oxyorthosilicate (LYSO) and a SensL MicroFJ SiPM combined with a charge sensitive amplifier (CSA) circuit were used in the data acquisition to detect 137Cs and 152 Eu. The decreasing logistic regression cost function shows that the proposed neural network converges to a global minimum, verifying the possibility of distinguishing Cesium from Europium in the mixed radioactive environment.

This work presents a detector capacitance compensation circuit for array-type SiPM-based radiation detectors while maintaining high-quality pulse information, including energy and time resolution. The major component of the proposed configuration, a unity-gain amplifier exploiting the Miller effect, maintains the same AC voltages on two sides of a detector, resulting in no effective detector capacitance between the nodes. This technique ideally allows combining channels without performance degradation in terms of rise time and amplitude of signals that can be caused due to the accumulated capacitance when SiPM cells are shorted in parallel in a signal multiplexing scheme. In order to verify the configuration, we designed and built a test board inserting a unity-gain amplifier between a 16-pixel SiPM array and a conventional charge-sensitive amplifier as a preamplifier . The measured pulses at the output of the front-end system show that the detector compensation technique can successfully mitigate performance degradation of rise time and amplitude as well as coincidence time. This technique can be adopted in many applications that require a multiplexed readout of a large number of array-type detectors, e.g., in cargo scanning technologies, radiation monitoring in nuclear plant facilities, and advanced medical imaging instruments such as PET and SPECT.

This paper describes an integrated circuit design for a modified charge-sensitive amplifier (CSA) that compensates for the effect of capacitance presented by nuclear radiation detectors and other sensors. For applications that require large area semiconductor detectors or for those semiconductor sensors derived from high permittivity materials such as PbSe, the detector capacitance can degrade the system gain and bandwidth of a front-end preamplifier, resulting in extended rise times and attenuated output voltage signals during pulse formation. In order to suppress the effect of sensor capacitance, we applied a bootstrap technique into a traditional CSA. The technique exploits the Miller effect by reducing the effective voltage difference between the two sides of a radiation detector which minimizes the capacitance presented to the differential common-source amplifier. This new configuration is successfully designed to produce effective gain even at high detector capacitance. The entire circuit, including a core CSA with feedback components and a bootstrap amplifier, are implemented in a 0.18 μm CMOS process with a 3.3 V supply voltage.

This paper presents Razor-Lite, which is a low-overhead register for use in error detection and correction (EDAC) systems. These systems are able to eliminate timing margins by using specialized registers to detect setup time violations. However, these EDAC registers incur significant area and energy overheads, which mitigates some the system benefits. Razor-Lite is a new EDAC register that addresses this issue by adding only 8 additional transistors to a conventional flip-flop design. The Razor-Lite flip-flop achieves low overhead via a charge-sharing technique that attaches to a standard flip-flop without modifying its design. Side-channels connected to the floating nodes generate error flags through simple logic gates totaling 8 transistors, enabling register energy/area overheads of 2.7%/33% over a conventional DFF, while also not incurring extra clock or datapath loading or delay. Razor-Lite is demonstrated in a 7-stage Alpha architecture processor in a 45nm SOI CMOS technology with a measured energy improvement of 83% while incurring a 4.4% core area overhead compared to a baseline design.

Temperature is an essential factor for stable performance of the positron emission tomography (PET). Some of the PET detector components produce significant heat (e.g. readout integrated circuits) that affects its performance. The temperature alters the breakdown voltage of photodetectors, which in turn affects the gain, cross talk, dark count rate and after-pulsing. One of the thermal regulation methods is to use an air/liquid cooling pipe embedded in a cold plate broadly distributing the temperature to the PC board; the gold vias in the board then conduct the temperature to the other side of the board. This paper concentrates on investigating the temperature distribution from various cooling structure configurations. The simulation software COMSOL was used with heat transfer and pipe flow modules to assess the thermal behavior of the cooling system. Two types of cooling pipe arrangements were simulated; a simple and a more complex curve arrangement. For the cold plates, a ceramic (92 W/m-K) and a thermally conductive plastic (10 W/m-K) were simulated. Full as well as “patchy” gold via configurations were also simulated. The simulation was performed for 300 seconds (real time) and the average and the standard deviation temperature of each SiPM was analyzed. With the complex cooling pipe arrangement, the temperature variation throughout all SiPMs was on average 37.9±5.2% higher for ceramic cold plates. For the cold plate materials, the ceramic showed 33.9±15.4% smaller thermal variation and −1.1±0.6% lower temperature compared to the thermally conductive plastic. The patchy vias resulted in 218.2±74.9% larger thermal variation when compared to the patchy vias. In summary, we have simulated various cooling pipe designs, cold plates and gold via distribution configurations to analyze the temperature variation across a PET detector PC board. The thermally conductive ceramic cold plate with as many vias as possible resulted in the most stable temperature variation.

For a PET insert to be placed inside an MR system, shielding for the detector modules is crucial as otherwise there can be mutual interference between the two modalities. In this work, we have assessed various shielding designs for both RF shielding effectiveness and gradient-induced eddy current performances. We designed six shielding configurations with various thicknesses, patterns and materials: 36, 18 and 9 urn thick solid copper; 36 urn thick segmented copper; 36 urn thick phosphor bronze mesh; and 0.8 mm thick carbon fiber composite. To evaluate the shielding performance, we performed transmission measurements (S21) and acquired the induced voltage from a MRI spin echo sequence using an RF probe. The eddy current performance was evaluated by the reflection measurement (S11) and observing the ghosting artifact and temperature rise from a MRI echo planar imaging (EPI) sequence. For the shielding effectiveness in both in/outside the MR system, the S21 magnitude for the solid copper (−43.1±1.7, −42.5±3.4, and −42.3±2.6 dB) and phosphor bronze mesh (−37.6±3.6 dB) configurations performed significantly better compared to other configurations (carbon fiber −29.2±1.5 dB and segmented copper −11.0±0.7 dB). For the eddy current performance, the phase delay acquired from the S11 measurement was less than 45° for segmented copper, phosphor bronze mesh and carbon fiber composites and significantly higher at ∼120° for the solid copper configurations. The EPI ghosting artifact and temperature measurements showed similar trends inside the MR system as seen in the outside. In summary, we have evaluated the shielding effectiveness and the eddy current performances of several shielding designs, with the phosphor bronze mesh showing the best overall outcomes.

Advanced CMOS technologies are highly susceptible to process, voltage, and temperature (PVT) variations due to sub-wavelength lithography and other manufacturing challenges. These variations cause performance uncertainty for which timing margins must be added to guarantee correct operation. Ultimately, this results in lost performance or energy: performance is lost directly through reduced clock frequency, while energy is sacrificed by operating at a higher voltage than necessary to meet non-margined timing requirements.