261 results on '"Isao Shirakawa"'
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2. Implementation of dynamic-range enhancement and super-resolution algorithms for medical image processing.
3. Implementation of super-resolution scaler for Full HD and 4K video.
4. An automatic layout method for timing pulse generator of small LCD driver.
5. A design scheme for sampling switch in active matrix LCD.
6. Interconnect capacitance extraction for system LCD circuits.
7. 3D sound movement system for embedded applications.
8. C-based hardware design of IMDCT accelerator for Ogg Vorbis decoder.
9. SoC design of Ogg Vorbis decoder using embedded processor.
10. Interactive interface of realtime 3D sound movement for embedded applications.
11. Real-time face object extraction for video phone.
12. OCEAN: Object Communication Environment for Arbitrary Network.
13. VLSI architecture of digital matched filter and prime interleaver for W-CDMA.
14. Error correction block based ARQ protocol for wireless digital video transmission.
15. Parasitic capacitance modeling for multilevel interconnects.
16. Embedded implementation of acoustic field enhancement for stereo headphones.
17. Realtime face object extraction algorithm for video phone.
18. Burst mode: a new acceleration mode for 128-bit block ciphers.
19. Two-dimensional array layout for NMOS 4-phase dynamic logic.
20. DSP implementation of 3D sound localization algorithm for monaural sound source.
21. VLSI architecture of dynamically reconfigurable hardware-based cipher.
22. High Performance Java Hardware Engine and Software Kernel for Embedded Systems.
23. Evaluation of processor code efficiency for embedded systems.
24. VLSI implementation of a realtime wavelet video coder.
25. VLSI Implementation of a Reduced Memory Bandwidth Realtime EZW Video Coder.
26. Layout generation of array cell for NMOS 4-phase dynamic logic (short paper).
27. Recursive maximum likelihood decoder for high-speed satellite communication.
28. Hybrid media-processor core for natural and synthetic video decoding.
29. A layout approach to monolithic microwave IC.
30. Implementation of H.324 audiovisual codec for mobile computing.
31. A low-power DSP core architecture for low bitrate speech codec.
32. An adaptive quantization algorithm for MPEG-2 video coding.
33. Low-Power Implementation of H.324 Audiovisual Codec Dedicated to Mobile Computing.
34. Area-Efficient Reconfigurable Architecture for Media Processing.
35. An object code compression approach to embedded processors.
36. Low-power H.263 video CoDec dedicated to mobile computing.
37. Low power architecture for high speed infrared wireless communication system.
38. A high performance FIR filter dedicated to digital video transmission.
39. Transistor Sizing of LCD Driver Circuit for Technology Migration.
40. A low-complexity FEC assignment scheme for motion JPEG2000 over wireless network.
41. Real-Time Human Object Extraction Method for Mobile Systems Based on Color Space Segmentation.
42. A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays.
43. W-CDMA Channel Codec by Configurable Processors.
44. Optimal Scheduling for Conditional Recource Sharing.
45. Embedded 3D sound movement system based on feature extraction of head-related transfer function.
46. Architecture of IEEE802.11i Cipher Algorithms for Embedded Systems.
47. Design of Ogg Vorbis Decoder System for Embedded Platform.
48. A New Approach of Fractional-Dimension Based Module Clustering for VLSI Layout.
49. Multi-Threaded Processor for Image Generation.
50. Optimal layout recycling based on graph theoretic linear programming approach.
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