1. Low-complexity low-density parity check decoding algorithm for high-speed very large scale integration implementation
- Author
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Javier Valls, J. Marin-Roig, F. Angarita, and Vicenc Almenar
- Subjects
Very-large-scale integration ,Computer science ,Decoding ,Parallel computing ,Computer Science Applications ,VLSI ,Low complexity ,TECNOLOGIA ELECTRONICA ,Message passing ,TEORIA DE LA SEÑAL Y COMUNICACIONES ,Parity check codes ,Electrical and Electronic Engineering ,Low-density parity-check code ,LDPC CODES ,Algorithm ,Decoding methods ,Parity bit - Abstract
This study proposes a new low-complexity decoding algorithm for low-density parity check codes, which is a variation of the offset min-sum algorithm and achieves a similar performance with lower hardware cost. A finite precision study is presented and the hardware cost of the implementation of three very large scale integration architectures is evaluated. As a conclusion, the proposed algorithm achieves similar performance with an area saving of around 18, 10 and 14% for the memory-based partially parallel, fully parallel and sliced message passing implementations, respectively., This research was supported by Fondo Europeo de Desarrollo Regional (FEDER), the Spanish Ministerio de Ciencia e Innovacion, under grant numbers TEC2008-06787 and TEC2011-27916.
- Published
- 2012