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Byline: Tejal. Khande, Avinash. Joshi, Siddhi. Khandeparkar, Maithili. Kulkarni, Bageshri. Gogate, Aniket. Kakade, Piyush. Sahu, Chaitnya. Khillare Background: Breast cancer (BCA) is the second most common cancer among women in [...]

We presented a case report of a 1-day-old female child admitted to the neonatal intensive care unit (NICU) with abdominal distension. Prenatal ultrasonography in the second trimester had revealed a large abdominal cyst. On examination, a common cloaca was noted along with a distended abdomen. Radiographic imaging confirmed the presence of collapsed small bowel pushed to the right, while a single large bowel filled most of the abdominal cavity. Further investigations, including ultrasound, indicated a 5.2 cm distended large bowel containing fecal material but no free fluid. The patient underwent exploratory laparotomy, during which an end ileostomy was performed following closure of the fistula with the urogenital tract. The postoperative period was uneventful, and the patient was discharged on postoperative day 5 with regular follow-up scheduled. Type I congenital pouch colon associated with common cloaca is an extremely rare condition involving complex malformations of the gastrointestinal and urogenital systems. This case report describes the clinical presentation, management, and outcomes of a 1-day-old female child with Type I congenital pouch colon and associated common cloaca. [ABSTRACT FROM AUTHOR]

Bilateral congenital mid ureteric stenosis is a very rare entity causing hydroureteronephrosis. The pathophysiology and aetiology of this condition is uncertain. Congenital functional obstruction of the mid ureter has only 17 reported cases, that too of unilateral pathology. We report a case of an 11-year-old male child who was presented with left sided lump in abdomen since one year. On bilateral retrograde ureteropyelography (RGP), bilateral mid ureteric stenosis was documented at the level of pelvic brim. Tc99m Diethylene Triamine Pentacaetic Acid (DTPA) scan showed non functioning left kidney and decreased function and retention on right side. We did a left nephroureterectomy and uretero-ureterostomy without tapering over a Double-J stent (DJ), with excision of stenosed segment on right side. Pathological review of the ureteric segments of both sides revealed proximal dilatation with non-specific thickening of the muscular wall of the stenosed segments of ureter. The differential diagnosis must additionally include ureteral valves and fibro epithelial polyps. Important role of intravenous pyelography in such cases must be emphasized to localize the pathology site. In addition, retrograde ureteropyelography is essential in management of this anomaly to delineate the stenosed segment of the ureter preoperatively, so that the surgeon can be well prepared with final plan of management.

In this paper, a fixed-switching-frequency closed-loop modulation of a voltage-source inverter (VSI), upon the digital implementation of the modulation process, is analyzed and characterized. The sampling frequency of the digital processor is considered as an integer multiple of the modulation switching frequency. An expression for the determination of the modulation design parameter is developed for smooth modulation at a fixed switching frequency. The variation of the sampling frequency, switching frequency, and modulation index has been analyzed for the determination of the switching condition under closed loop. It is shown that the switching condition determined based on the continuous-time analysis of the closed-loop modulation will ensure smooth modulation upon the digital implementation of the modulation process. However, the stability properties need to be tested prior to digital implementation as they get deteriorated at smaller sampling frequencies. The closed-loop modulation index needs to be considered maximum while determining the design parameters for smooth modulation. In particular, a detailed analysis has been carried out by varying the control gain in the sliding-mode control of a two-level VSI. The proposed analysis of the closed-loop modulation of the VSI has been verified for the operation of a distribution static compensator. The theoretical results are validated experimentally on both single- and three-phase systems. Index Terms--Closed-loop modulation, distribution static compensator (DSTATCOM), field-programmable gate array (FPGA), multisampled, switching condition.

This paper examines the application of a diodeclamped multilevel inverter (DCMLI)-based distribution static compensator (DSTATCOM) connected to a three-phase, four-wire (3p4w) distribution system. The DCMLI has an inherent unbalancing problem among its dc capacitor voltages. Additionally, when the load contains a dc part, the neutral point of the compensator also becomes unbalanced. In this paper, the effects of different loading conditions on the dc capacitor voltages of the inverter are studied. Two new control circuits are proposed for equalizing the capacitor voltages. Different control techniques are presented for the equalizing circuits. Equations of the proposed equalizing controllers are developed corresponding to the control of the switching devices. Comparative studies of different control techniques and the performances of the two controllers are performed. Simulation studies are performed using PSCAD/EMTDC to validate the efficacy of the proposed equalizing controller circuits. Index Terms--Capacitor voltage equalization, dc-dc converter control, diode-clamped multilevel inverter (DCMLI), distribution static compensator (DSTATCOM), equalizing circuit.

This paper focuses on the development of multilevel hysteresis current regulation strategies. Two such strategies have been discussed and some modifications in their control tasks have been proposed to achieve more reliable and improved performance. In general, the multiband concept has been used while making the proposals. The hysteresis band size considerations have also been presented by taking into account the desired and existing system conditions. The proposed modulation schemes have been applied to a five-level flying-capacitor inverter, whose operation under hysteresis current control mode is much less established. A new method of flying-capacitor voltage balancing is proposed which ensures balanced flying-capacitor voltages and, at the same time, maintains the desired current profile. It uses a time-based approach for controlling the capacitor voltages and achieves appreciable voltage spectrum under wide range of load power factor conditions. The performance of the proposed strategies is confirmed through both simulation and experimental investigations. Index Terms--Flying-capacitor multilevel inverters (FCMLI), flying-capacitor voltage, hysteresis, multilevel inverter, time-based control.

In this paper, the method of triangular carrier switching control of two-level inverters is extended to cascaded multilevel inverters using phase-shifted multicarrier unipolar pulsewidth modulation (PWM). The condition for smooth modulation is obtained using the Bessel's function representation of the PWM output and the switching condition of the multilevel-inverter-controlled system. A method is proposed for the determination of the minimum amplitude of the triangular carrier for smooth modulation at fixed switching frequency. It is shown that the multilevel modulation based on the phase-shifted carriers significantly reduces the ripple magnitude in the switching function and allows the use of a smaller carrier amplitude under closed loop. This increases the forward gain and, hence, improves the tracking characteristics. The proposed cascaded multilevel inverter control is implemented for the operation of a distribution static compensator (DSTATCOM) in the voltage control mode. The experimental verification of the theoretical and simulation results is provided through a field-programmable gate array (FPGA) based control of a laboratory model of a single-phase DSTATCOM. Index Terms--Bessel's function, carrier amplitude, cascaded multilevel inverter, distribution static compensator (DSTATCOM), field-programmable gate array (FPGA), multilevel modulation, switching control.

In this paper, load compensation using multilevel inverter-based distribution static compensator (DSTATCOM) is presented. The DSTATCOM is connected to a three-phase four-wire (3p4w) distribution system. Two different multilevel inverter topologies are used to realize the DSTATCOM. They are diode-clamped multilevel inverter (DCMLI) and flying capacitor multilevel inverter (FCMLI). A compensating technique has been derived, which uses the state feedback control to the multilevel inverters-based DSTATCOMs. A switching strategy for the multilevel inverters that ensures utilization of all output voltage states of the inverter for efficient tracking of references has been proposed. The schemes of dc-link capacitor voltage control for DCMLI and flying capacitor voltage control for FCMLI have been discussed. Comparative studies of performances of the two DSTATCOM topologies are performed. The simulation studies are performed using PSCAD/EMTDC to validate the efficacy of the proposed control scheme. Index Terms--Diode-clamped multilevel inverter (DCMLI), distribution static compensator (DSTATCOM), flying capacitor multilevel inverter (FCMLI), switching control.

Flying capacitor multilevel inverter (FCMLI) is a multiple voltage level inverter topology intended for high voltage and power operations with low distortion. It uses capacitors, called flying capacitors for clamping the voltage across the power semiconductor devices. In this paper, the implementation of a distribution static compensator (DSTATCOM) using an FCMLI is presented. A hysteresis current control technique for controlling the injected current by the FCMLI-based DSTATCOM is discussed. A new method for controlling the flying capacitor voltages is proposed which ensures that their voltages remain constant and at the same time maintain the desired current profile under the hysteresis current control operation. Simulation studies are performed using PSCAD/EMTDC to validate the efficacy of the control scheme and the FCMLI-based DSTATCOM. Index Terms--Distribution static compensator (DSTATCOM), flying capacitor multilevel inverter (FCMLI), hysteresis, voltage-source converter (VSC).

This paper proposes a new connection for a unified power quality conditioner (UPQC) to improve the power quality of two feeders in a distribution system. A UPQC consists of a series voltage-source converter (VSC) and a shunt VSC both joined together by a common dc bus. It is demonstrated how this device is connected between two independent feeders to regulate the bus voltage of one of the feeders while regulating the voltage across a sensitive load in the other feeder. Since the UPQC is connected between two different feeders (fines), this connection of the UPQC will be called an interline UPQC (IUPQC). The structure, control and capability of the IUPQC are discussed in this paper. The efficacy of the proposed configuration has been verified through simulation studies using PSCAD/EMTDC. Index Terms--Distribution system, power quality, sensitive load, voltage sag, voltage-source converter (VSC).

In this paper, load compensation techniques under unbalanced and distorted voltages have been discussed. Two kinds of compensation methods are considered. In the first category, synchronous detection and modified equal current strategies are used under the unbalanced but sinusoidal source voltages. In the second method, load compensation based on instantaneous symmetrical component theory with positive sequence extraction is proposed and is shown to work under unbalanced and the non-sinusoidal source voltages. To support the proposed method, a 440 V (L-L) three-phase, four-wire distribution system is considered. The compensator is realized using a three-phase voltage source inverter (VSI) operated in the current control mode. Detailed digital simulation and experimental results are presented to validate the approach. Index Terms--Load compensation, unbalanced and distorted voltages, voltage source inverter.

The flying capacitor multilevel inverter (FCMLI) is a multiple voltage level inverter topology intended for high-power and high-voltage operations at low distortion. It uses capacitors, called flying capacitors, to clamp the voltage across the power semiconductor devices. A method for controlling the FCMLI is proposed which ensures that the flying capacitor voltages remain nearly constant using the preferential charging and discharging of these capacitors. A static synchronous compensator (STATCOM) and a static synchronous series compensator (SSSC) based on five-level flying capacitor inverters are proposed. Control schemes for both the FACTS controllers are developed and verified in terms of voltage control, power flow control, and power oscillation damping when installed in a single-machine infinite bus (SMIB) system. Simulation studies are performed using PSCAD/EMTDC to validate the efficacy of the control scheme and the FCMLI-based flexible alternating current transmission system (FACTS) controllers. Index Terms--FCMLI, multilevel inverter, power oscillation damping, SMIB, SSSC, STATCOM.

The paper discusses the concept of a mini custom power park in which the voltage inside the park is tightly regulated by a distribution static compensator (DSTATCOM). It will be shown on the basis of simulations with ideal components that solid state protection devices, along with the DSTATCOM will eliminate many transients in all the loads of the park during disturbances. Moreover, the DSTATCOM, backed by a diesel generator, will supply the most sensitive loads during the total line outages, thereby nearly making them both transient and interruption free. In this paper, a configuration of the park is proposed and then various issues involved with the operation of the park are discussed. The proposed operation of the custom power park is verified through extensive digital computer simulation studies. Index Terms--Custom power park, distribution static compensator (DSTATCOM), static transfer switch (STS), voltage control mode, voltage sag.

The paper discusses the operating principles and control characteristics of a dynamic voltage restorer (DVR) that protects sensitive but unbalanced and/or distorted loads. The main aim of the DVR is to regulate the voltage at the load terminal irrespective of sag/swell, distortion, or unbalance in the supply voltage. In this paper, the DVR is operated in such a fashion that it does not supply or absorb any active power during the steady-state operation. Hence, a dc capacitor rather than a dc source can supply the voltage source inverter realizing the DVR. The proposed DVR operation is verified through extensive digital computer simulation studies. Index Terms--Deadbeat control, distribution system, dynamic voltage restorer, unbalanced and distorted load, voltage source inverter.

In this paper, a static synchronous series compensator (SSSC), along with a fixed capacitor, is used to avoid torsional mode instability in a series compensated transmission system. A 48-step harmonic neutralized inverter is used for the realization of the SSSC. The system under consideration is the IEEE first benchmark model on SSR analysis. The system stability is studied both through eigenvalue analysis and EMTDC/PSCAD simulation studies. It is shown that the combination of the SSSC and the fixed capacitor improves the synchronizing power coefficient. The presence of the fixed capacitor ensures increased damping of small signal oscillations. At higher levels of fixed capacitor compensation, a damping controller is required to stabilize the torsional modes of SSR. Index Terms--SSSC, torsional interaction, IEEE first benchmark model, eigenvalue analysis.

Voltage imbalance in capacitors is a well-known problem in compensator topologies which use two or more capacitors. This imbalance may exist even if the load does not contain any dc component, due to practical factors. However, when the load contains a dc part, the voltage imbalance problem becomes critical. In this paper, a two-quadrant chopper has been used to regulate the capacitor voltages in a two-capacitor compensator structure. Two different control strategies for the two-quadrant chopper to equalize the voltage of the capacitors have been proposed. The strategies are validated through detailed simulation studies. Experiments have also been carried out to validate the hysteresis control of chopper. Index Terms--Active shunt compensators, chopper control, dc load, voltage equalization, voltage imbalance.

The paper presents the operating principles of a distribution static compensator (DSTATCOM) that is used to maintain the voltage of a distribution bus. A three-phase, four-wire distribution system is assumed in this study. A three-phase bridge inverter circuit that is supplied by two neutral-clamped dc storage capacitors realizes the DSTATCOM. Three filter capacitors, one for each phase, are connected in parallel with the DSTATCOM to eliminate high-frequency switching components. The voltage across the filter capacitor is controlled by a dead-beat controller to maintain the ac bus voltage. The magnitude of the bus voltage is chosen as nominal value, i.e., 1.0 p.u., while its phase angle is obtained through a feedback loop that maintains the voltage across the dc storage capacitors. Through detailed simulation and experimental results, it has been shown that the DSTATCOM can maintain the voltage against any unbalance and distortion in either the load or supply side. Index Terms--Deadbeat control and neutral clamped inverter, distribution static compensator (DSTATCOM), voltage regulation.

Introduction: Oral squamous cell carcinoma (OSCC) is the most common malignant tumor occurring in the oral cavity. Aim: The present study was conducted to evaluate the biomarkers such as epidermal growth factor receptor (EGFR), human epidermal growth factor receptor 2 (HER2/neu), p53 and Ki67 expression in OSCC cases, and its correlation with other well-established clinicopathological parameters. Materials and Methods: Seventy cases of OSCC cases diagnosed between 2015 and 2019 were included in the study. A technique of manual tissue microarray was employed for the analysis of expression of IHC markers such as EGFR, HER2/neu, p53, and Ki67 in all cases. Results were subjected to the statistical analysis. Results: A statistically significant positive association was noted between EGFR expression and tumor grade, tumor stage, and p53 immunoexpression in OSCC cases. Increased EGFR expression was noted insignificantly in OSCC cases with lymph node (LN) metastasis and Ki67 positive cases. Statistically significant positive association was noted between HER2/neu expression and tumor grade and stage of oral SCC cases. Increased HER2/neu expression was noted insignificantly in OSCC cases with LN metastasis, p53 and Ki67 positive OSCC cases. A statistically significant positive association was noted between percent of tumor cells expressing EGFR, HER2/neu, p53 and Ki67, and grade of OSCC. Conclusion: This study intends to document prognostic utility of EGFR and HER2/neu expression in OSCC cases in the Indian setting and contribute to the data pool which could aid in formulating individual tailored therapy that includes targeted therapy in oral SCC cases. [ABSTRACT FROM AUTHOR]

A new public-domain simulator for power electronic circuits is described. The organization of the simulator is briefly discussed. The most important feature of the simulator is that the user can define new elements in a flexible manner. The differences between the new simulator and other simulators are enumerated. Some simulation examples are discussed to demonstrate the applications of the simulator. It is pointed out that the new simulator is particularly attractive for engineering institutes in developing countries where access to expensive commercial packages with similar capabilities may be difficult. Index Terms--Circuit simulation, power electronics, public-domain package.