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The increasing computational demands of Deep Reinforcement Learning (DRL) models, particularly for embedded systems in autonomous vehicles and drones, present significant challenges owing to their extensive neural network complexities. Previous DRL compression strategies predominantly focused on unstructured pruning, effective for reducing model size but requiring specialized hardware for computational acceleration. Conversely, DRL models with structured pruning applied can be accelerated on standard hardware, though they typically encounter performance issues at higher pruning rates due to structural constraints. In response to these challenges, this paper introduces an advanced structured pruning methodology, combined with scaled policy constraints (SPC) for DRL models. Our approach overcomes the performance limitations of conventional structured pruning, achieving high pruning rates while maintaining robust model performance. Enhanced performance restoration after pruning is achieved by fine-tuning with SPC and applying structural regularization, thus ensuring efficient decision-making with a minimal computational burden. Extensive evaluations on the D4RL benchmark and in a drone control simulation environment confirm the effectiveness of our method. Our approach maintains performance integrity even at high pruning rates, with less than a 2% decrease in normalized score at 90% pruning in D4RL and preserving cumulative reward at 87% pruning in drone control simulation. Significantly, our approach also enables considerable computational acceleration on standard hardware. We implemented our method on the NVIDIA Jetson Xavier NX board and achieved a 2.5-fold speed-up on devices with NVIDIA Volta GPUs and over double the speed-up on those with NVIDIA Carmel ARMv8.2 CPUs. These outcomes highlight our method’s suitability for real-time, resource-constrained applications, demonstrating its practicality and efficiency.

Recently, multi-hop flying ad hoc networks (FANETs) have received considerable attention because of their various advantages, such as ease of deployment, scalability, cost, and latency reduction. However, FANETs still encounter serious problems such as a highly dynamic network topology and the limited on-board battery of unmanned aerial vehicles (UAVs). Thus, to increase the coverage probability while reducing unnecessary packet transmissions, realizing efficient and effective relay selection is important. To resolve these issues, this paper proposes a proactive and probabilistic uncovered neighbor-aware relay selection (P2URE) method that considers FANET’s topological dynamics. Specifically, the relay decision factor to identify relay UAV candidates and the probabilistic relay decision to reduce coverage overlaps and minimize redundant packet transmissions are devised. Through extensive simulations, it has been validated that the proposed P2URE method surpasses the benchmark methods in terms of the total number of transmissions, coverage probability, and energy efficiency. This superiority is observed across various network dynamics resulting from variations in the UAV density, speed, neighbor-information update period, and delay interval.

Nanoparticle-based thin films are increasingly being used in various applications. One of the key factors that determines the properties and performances of these films is the type of ligands attached to the nanoparticle surfaces. While long-chain surfactants, such as oleic acid, are commonly employed to stabilize nanoparticles and ensure high monodispersity, these ligands often hinder charge transport due to their insulating nature. Although thermal annealing can remove the long-chain ligands, the removal process often introduces defects such as cracks and voids. In contrast, the use of short-chain organic or inorganic ligands can minimize interparticle distance, improving film conductivity, though challenges such as incomplete ligand exchange and residual barriers remain. Polymeric ligands, especially block copolymers, can also be employed to create films with tailored porosity. This review discusses the effects of various ligand types on the morphology and performance of nanoparticle-based films, highlighting the trade-offs between conductivity, structural integrity, and functionality.

Abstract Metallic aerogels have attracted tremendous interest because of their superior properties, such as low density, high electrical conductivity, and large specific surface area. However, extremely brittle connections in their 3D networks remain a challenge. In this study, compressible aerogels with microporous fiber-like structure consisting of freeze-dried cellulose nanofibers (CNFs) and silver nanowires (AgNWs) were fabricated by unidirectional freeze-casting process. To improve the robustness, elasticity, and deformability of the aerogel, freeze-dried microfiber-structured CNFs assembled with AgNWs were used. The freeze-dried CNF/AgNW-based aerogels exhibited a low density (8.51–13.5 mg/cm3) and high porosity (up to 98.2%). Furthermore, these aerogels demonstrated impressive mechanical properties with high compressive strength (up to 4.85 kPa at 70% strain), elastic modulus (up to 16.3 kPa), and yield strength (up to 2 kPa). Additionally, the aerogels exhibited reversible deformability up to a 10% strain and maintained their durability over 200 cycles of compressive strain at 10%. The fabricated aerogels also showed a low electrical resistivity (

Abstract The stable recovery of gas sensors is an important indicator for evaluating their performance. Hitherto, the use of external light sources and/or an increase in the operating temperature has been effective in improving the recovery rate of gas sensors. Herein, heterojunctions were formed between the two-dimensional transition metal dichalcogenide nanosheets and zero-dimensional ZnO nanoparticles to improve the recovery rate of a NO2 sensor. Scanning electron microscopy and Raman spectroscopy suggested a successful deposition of ZnO nanoparticles onto the MoS2 and WSe2 nanosheets. The sensing response to 10 ppm NO2 gas at 100 °C indicated that the heterojunction formed by ZnO and MoS2 or WSe2 successfully improved the recovery rate of the sensor by 11.87% and 19.44%, respectively, whereas the sensitivity remained constant. The proposed approach contributes to improving the performance of gas sensors.

Abstract The development of high-performance strain sensors has attracted significant attention in the field of smart wearable devices. However, stretchable strain sensors usually suffer from a trade-off between sensitivity and sensing range. In this study, we investigate a highly sensitive and stretchable piezoresistive strain sensor composed of a hybrid film of 1D multi-walled carbon nanotube (MWCNT) and 2D graphene that forms a percolation network on Ecoflex substrate by spray coating. The mass of spray-coated MWCNT and graphene and their mass ratio are modulated to overcome the trade-off between strain sensitivity and sensing range. We experimentally found that a stable percolation network is formed by 0.18 mg of MWCNTs (coating area of 200 mm2), with a maximum gauge factor (GF) of 1,935.6 and stretchability of 814.2%. By incorporating the 0.36 mg of graphene into the MWCNT film (i.e., a mass ratio of 1:2 between MWCNT and graphene), the GF is further improved to 12,144.7 in a strain range of 650–700%. This high GF is caused by the easy separation of the graphene network under the applied strain due to its two-dimensional (2D) shape. High stretchability originates from the high aspect ratio of MWCNTs that bridges the randomly distributed graphenes, maintaining a conductive network even under sizeable tensile strain. Furthermore, a small difference in work function between MWCNT and graphene and their stable percolation network enables sensitive UV light detection even under a significant strain of 300% that cannot be achieved by sensors composed of MWCNT- or graphene-only. The hybrids of MWCNT and graphene provide an opportunity to achieve high-performance stretchable devices.

Abstract Soft devices that are mechanically flexible and stretchable are considered as the building blocks for various applications ranging from wearable devices to robotics. Among the many candidate materials for constructing soft devices, carbon nanomaterials such as carbon nanotubes (CNTs) and graphene have been actively investigated owing to their outstanding characteristics, including their intrinsic flexibility, tunable conductivity, and potential for large-area processing. In particular, hybrids of CNTs and graphene can improve the performance of soft devices and provide them with novel capabilities. In this review, the advances in CNT-graphene hybrid-based soft electrodes, transistors, pressure and strain sensors, and actuators are discussed, highlighting the performance improvements of these devices originating from the synergistic effects of the hybrids of CNT and graphene. The integration of multidimensional heterogeneous carbon nanomaterials is expected to be a promising approach for accelerating the development of high-performance soft devices. Finally, current challenges and future opportunities are summarized, from the processing of hybrid materials to the system-level integration of multiple components.

Tiny embedded devices are cost and energy-sensitive, and high-density emerging non-volatile memory (NVM) can help reduce energy consumption at a fraction of the cost. However, high-density NVM has low write endurance compared to volatile memory, so it is vulnerable to write concentration. Most NVM lifetime improvement studies in the existing embedded environment have distributed writes by modifying the mapping relationship between physical and logical addresses. However, applying the existing wear leveling techniques in low-end MCUs such as ARM Cortex M3/M4 that use only physical addresses is hard. Therefore, we wear-level the write-heavy stack area to improve the NVM lifetime in low-end MCUs. However, since the stack of bare metal applications is difficult to move during runtime, we implement the migration function targeting the task stack of FreeRTOS. The task stack moves based on time, and to avoid the pointer validation problem caused by the movement of the task stack, we migrate the stack under safe conditions. In addition, FreeRTOS uses a single heap to preferentially allocate to low free space, which reduces the degree of freedom where the stack moves, reducing the effect of distributing the writes. To alleviate this problem, we add another heap for the stack migration and introduce circular dynamic allocation in the heap. Through our experiments, the proposed method was about 19.6% larger than the ideal case of maximum write, and the computational overhead was about 0.2%.

Recently, semantic segmentation based on deep neural network (DNN) has attracted attention as it exhibits high accuracy, and many studies have been conducted on this. However, DNN-based segmentation studies focused mainly on improving accuracy, thus greatly increasing the computational demand and memory footprint of the segmentation network. For this reason, the segmentation network requires a lot of hardware resources and power consumption, and it is difficult to be applied to an environment where they are limited, such as an embedded system. In this paper, we propose a binarized encoder-decoder network (BEDN) and a binarized deconvolution engine (BiDE) accelerating the network to realize low-power, real-time semantic segmentation. BiDE implements a binarized segmentation network with custom hardware, greatly reducing the hardware resource usage and greatly increasing the throughput of network implementation. The deconvolution used for upsampling in a segmentation network includes zero padding. In order to enable deconvolution in a binarized segmentation network that cannot express zero, we introduce zero-aware binarized deconvolution which skips padded zero activations and zero-aware batch normalization embedded binary activation considering zero-skipped convolution. The BEDN, which is a binarized segmentation network proposed to be accelerated on BiDE, has acceptable accuracy while greatly reducing the computational and memory demands of the segmentation network through full-binarization and simple structure. BEDN has a network size of 0.21 MB, and its maximum memory usage is 1.38 MB. BiDE was implemented on Xilinx ZU7EV field-programmable gate array (FPGA) to operate at 187.5 MHz. BiDE accelerated the proposed BEDN within CamVid11 images of $480\times {360}$ size at 25.89 frames per second (FPS) achieving a performance of 1.682 Tera operations per second (TOPS) and 824 Giga operations per second per watt (GOPS/W).

Many NAND flash storage systems access flash memories by generating flash commands to process input/output (I/O) requests from a host system. Because the order in which flash commands are processed affects the I/O performance, command scheduling has been performed in previous studies to prioritize flash read commands for improving the read performance. However, in addition to the flash commands for accessing user data requested by the host, flash commands for internal tasks that improve the I/O performance and operation efficiency of the flash storage are issued. Particularly in embedded flash storage, the flash commands by the map cache management have a significant influence on the latency of I/O requests. The processing time of the I/O request depends on the execution time of the flash commands for mapping information and the flash commands for user data. In this paper, we propose command scheduling to improve read performance to address the occurrence of map flash commands. Priority is given to the flash read and program command from the read request, and among these commands, the flash command originating from the read request, which has a shorter processing time, is executed first. Consequently, the waiting time of the flash command is reduced, thereby improving the read latency. Experiments conducted with real workloads show that the proposed scheduling scheme reduces the average read latency by up to 51% compared with the existing scheduling scheme and demonstrates an effective performance improvement in a small map cache.

The number of applications that can access a storage device simultaneously has increased as a result of the increase in storage capacity and the emergence of hyperscale environments. In multi-application environments, the request for append-only data to storage from applications such as log-structured merge-tree-based key-value (LSMKV) stores can negatively affect the storage-internal buffer hit ratio of other applications. This is because frequently re- accessed data can be evicted from the buffer via the intensive requests of append-only data that are rarely re- accessed. This degradation in the buffer hit ratio increases the storage access latency of applications. Herein, we propose a buffer management method to increase the buffer hit ratio of non-append-only data (or applications) in multi-application environments. The proposed method (1) defines large-sequential writes (that are not overwritten) and all reads on them as append-only input/output (I/O), (2) detects I/O, matching the access pattern of append-only data of LSMKVs, (3) allocates the append-only read/write requests into separate small buffer spaces, and (4) evicts the append-only data from the buffer when free buffer space is required. Because the proposed method stores append-only data of an LSMKV in buffer spaces with a limited size, it can increase the buffer hit ratio of applications that frequently re- access its data. Experimental results show that the proposed method can increase the buffer hit ratio of hot-data-intensive applications and the total buffer hit ratio by 31.72% and 20.06%, on average, respectively, in comparison to the existing buffer management techniques.

Time-division multiple access (TDMA)-based medium access control (MAC) protocol has been widely used for avoiding access conflicts in wireless multi-hop ad hoc networks, where the time synchronization among wireless nodes is essential. In this paper, we propose a novel time synchronization protocol for TDMA-based cooperative multi-hop wireless ad hoc networks, which are also called barrage relay networks (BRNs). The proposed time synchronization protocol is based on cooperative relay transmissions to send time synchronization messages. We also propose a network time reference (NTR) selection technique for improving the convergence time and average time error. In the proposed NTR selection technique, each node overhears the user identifier (UID) of other nodes, hop count (HC) from them to itself, and network degree, which denotes the number of 1-hop neighbor nodes. Then, the node with the minimum HC from all other nodes is selected as the NTR node. If there are multiple nodes with the minimum HC, the node with the larger degree is selected as the NTR node. To the best of our knowledge, the proposed time synchronization protocol with the NTR selection is introduced for the first time for cooperative (barrage) relay networks in this paper. Through computer simulations, we validate the proposed time synchronization protocol in terms of the average time error under various practical network scenarios. Furthermore, we also compare the performance of the proposed protocol with the conventional time synchronization methods. It is shown that the proposed protocol significantly outperforms the conventional methods in terms of the average time error and convergence time. The proposed protocol is shown to be more robust against packet loss as well.

Physically-addressable solid-state drives (PASSDs) are secondary storage devices that provide a physical address-based interface for a host system to directly control NAND flash memory. PASSDs overcome the shortcomings such as latency variability, resource under-utilization, and log-on-log that are associated with legacy SSDs. However, in some operating environments, the write response time significantly increases because the PASSD reports the completion of a host write command synchronously (i.e., write-through) owing to reliability problems. It contrasts asynchronous processing (i.e., write-back), which reports a completion immediately after data are received in a high-performance volatile memory subsequently used as a write buffer to conceal the operation time of NAND flash memory. Herein, we propose a new scheme that guarantees write reliability to enable a reliable asynchronous write operation in PASSD. It is designed to use a large-granularity mapping table for minimizing the memory requirements and performing internal operations at an idle time to avoid response delays. Results demonstrate that the proposed PASSD reduces the average write response time by up to 88% and guarantees reliability without performance degradation.

Many flash storage systems divide input/output (I/O) requests that require large amounts of data into sub-requests to exploit their internal parallelism. In this case, an I/O request can be completed only after all sub-requests have been completed. Thus, non-critical sub-requests that are completed quickly do not affect I/O latency. To efficiently reduce I/O latency, we propose a buffer management scheme that allocates buffer space by considering the relationship between the processing time of the sub-request and I/O latency. The proposed scheme prevents non-critical sub-requests from wasting ready-to-use buffer space by avoiding the situation in which buffer spaces that are and are not ready to use are allocated to an I/O request. To allocate the same type of buffer space to an I/O request, the proposed scheme first groups sub-requests derived from the same I/O request and then applies a policy for allocating buffer space in units of sub-request groups. When the ready-to-use buffer space is insufficient to be allocated to the sub-request group being processed at a given time, the proposed scheme does not allocate it to the sub-request group but it instead sets it aside for future I/O requests. The results of the experiments to test the proposed scheme show that it can reduce I/O latency by up to 24% compared with prevalent buffer management schemes.

A log-structured merge-tree-based key value store (LSMKV) is an append-only database for storing and retrieving unstructured data, especially in a write-intensive environment. This database uses hierarchical components to store and manage data. Upper-level components have a shorter data lifespan and a higher access locality than lower-level components. Hence, the data access latency of the upper-level components significantly affects the performance of the entire database. Hybrid solid-state drives (SSD) composed of media with different access speeds can improve the performance of an LSMKV by storing the upper-level components using a fast storage space. However, many hybrid SSDs use fast storage spaces to store data that are frequently allocated to the same logical address; they are not suitable for storing append-only component data, which are allocated to adjacent logical addresses. This article proposes a hybrid SSD-management method to reduce the data access latency of append-only LSMKVs and increase the durability of hybrid SSDs. The proposed method allocates the data of upper-level components to a fast storage space using the level information of the data as a hint. This study utilizes dynamic data separation to determine the components to be placed in the fast storage space, NAND block management to store the data with similar lifespans in the same fast NAND block, and a data-relocation method to migrate long-lived data from the fast NAND region to another NAND region. Experimental results indicate that the proposed method reduces the average I/O latency by an average of 12% and increases the device durability by an average of 22%.

We propose a method for minimizing global buffer access within a deep learning accelerator for convolution operations by maximizing the data reuse through a local register file, thereby substituting the local register file access for the power-hungry global buffer access. To fully exploit the merits of data reuse, this study proposes a rearrangement of the computational sequence in a deep learning accelerator. Once input data are read from the global buffer, repeatedly reading the same data is performed only through the local register file, saving significant power consumption. Furthermore, different from prior works that equip local register files in each computation unit, the proposed method enables sharing a local register file along the column of the 2D computation array, saving resources and controlling overhead. The proposed accelerator is implemented on an off-the-shelf field-programmable gate array to verify the functionality and resource utilization. Then, the performance improvement of the proposed method is demonstrated relative to popular deep learning accelerators. Our evaluation indicates that the proposed deep learning accelerator reduces the number of global-buffer accesses to nearly 86.8%, consequently saving up to 72.3% of the power consumption for the input data memory access with a minor increase in resource usage compared to a conventional deep learning accelerator.

This article describes two studies that demonstrate that cultural display rules (Study 1) and emotion regulation (ER; Study 2) are linked to judgments of emotional expressions of others. In Study 1, American and Japanese judges saw faces expressed at four levels of intensity and rated the intensity of the external display and presumed internal experience. They also completed measures of cultural display rules and psychological culture. Display rules accounted for 69% of the variance in cultural differences in ratings across the expression intensities; psychological culture accounted for an additional 14%. In Study 2 American judges saw the same faces and made the same ratings; this time, however, they completed two measures of ER. ER accounted for nearly all of the rating differences across the expression intensities. These studies report the first evidence of a link between an individual’s display rules and ER and judgments of emotion management in others.

In a wireless sensor network, sensor nodes are deployed in an ad hoc fashion and they deliver data packets using multihop transmission. However, transmission failures occur frequently in the multihop transmission over wireless media. Thus, a loss recovery mechanism is required to provide end-to-end reliability. In addition, because the sensor nodes are very small devices and have insufficient resources, energy-efficient data transmission is crucial for prolonging the lifetime of a wireless sensor network. This paper proposes a transmission power control mechanism for reliable data transmission, which satisfies communication reliability through recovery of lost packets. The proposed method calculates packet reception rate (PRR) of each hop to maintain end-to-end packet delivery rate (PDR), which is determined based on the desired communication reliability. Then, the transmission power is adjusted based on the PRR to reduce energy consumption. The proposed method was evaluated through extensive simulations, and the results show that it leads to more energy-efficient data transmission compared to existing methods.

Multi-vibrational-mode electrostatic energy harvesters are designed and micro-machined utilizing a simple silicon-on-insulator (SOI) wafer-based process. Enhanced adaptability to various vibrational environments is achieved in the proposed design by using serpentine springs attached to the fishbone-shaped inertial mass. The experimental results show that the developed device could convert an input vibration of 6 g at 1272 Hz to 2.96, 3.28, and 2.30 μW for different vibrational directions of 0°, 30°, and 45° with respect to a reference direction, respectively, when all serpentine springs are identical. An alternative device design using serpentine springs with different stiffnesses between x- and y-axes exhibited resonance frequencies at 1059 and 1635 Hz for an input vibrational direction of 45° and acceleration amplitude of 4 g, successfully generating 0.723 and 0.927 μW of electrical power at each resonance, respectively.