Search

Post cleaning experiments for front end of the line (FEOL) CMP with silica and ceria slurries are carried out on commercial polishers with 300 mm oxide, nitride, and integrated shallow trench isolation (STI) wafers. Considering the charge attraction or repulsion between particles and wafer surface, both acidic and basic clean chemicals are applied at different stages in the post CMP process sequence. Diluted hydrogen peroxide in a non-contact megasonic cleaner is used to remove ceria abrasive particles and polish residues with high efficiency. On-platen buff clean with or without pad conditioning can make an impact on the post CMP cleaning performance. Post CMP cleaning splits are executed in order to evaluate the effectiveness of each of the process steps and their roles in the overall cleaning performance.

Polishing debris generated by pad surface conditioning has been suspected as a major source of microscratches in the chemical–mechanical planarization (CMP) process. In this study, we investigated the pad debris generated by an in situ conditioning process during oxide CMP as one of the major scratch sources. We evaluated the relationship between the size of pad debris and the shape of microscratches on a wafer to find the cause of scratches. Pad debris was gathered in real time during the polishing process. Then, by transmission electron microscopy we observed a mixed layer of pad material and abrasive particles on the surface of the pad debris and the pad surface, which hardened the pad debris and pad surface. The results reveal a size range of pad debris that led to a minimum scratch count. Pad debris size smaller or larger than the minimum scratch region seems to cause higher scratch count due to the hardened pad surface and pad debris.

Semiconductor industry faces a continuous challenge to increase the production yield by eliminating defect sources. The majority of the defect is caused by synthesized nano-materials in the process chamber. So analysis and removal of these nano-materials are important to prevent defect. In this paper, the prevention method of silicon whisker generation during dichlorosilane-based WSi2 deposition process has been studied by analysis and modification of equipment. First, silicon whiskers were formed to observe the shape, distribution, and composition at general dichlorosilane-based WSi2 deposition conditions. These distributed as a ring with a diameter between 0.2 μm and 2 μm on the graphite susceptor surface. Second, experiments according to gas flow rate, susceptor material, and susceptor structure were studied systematically to remove these silicon whiskers. Silicon whisker generation and transportation are defined as a major reason of wafer contamination in this study. And it has also been revealed that silicon whisker generation can be effectively controlled by an Aluminum Nitride coated susceptor with modified structure.

In this study, we analyzed the coefficient of friction (COF) of film surface and pad interface during the wafer polishing process to make a correlation with the existence of polyelectrolyte additive in the slurry, which is adsorbed onto the wafer surface. The poly-acrylic acid (PAA) polymer was added to the slurry in this study because of its proven effect on SiO2 (Oxide)/Si3N4 (Nitride) removal selectivity. Different contact conditions between the wafer surface and the slurry with PAA were established for various PAA concentrations and slurry pHs in polishing experiments. The COF was increased with the adsorption amount of PAA on the wafer surface whereas the dissolved PAA in the slurry served as lubricant that lowered the COF. The lateral force microscope (LFM) with a pad debris particle attached tip, which simulates single asperity contact, confirmed the COF result in a wafer scale experiment. Finally, the direct measurement of absorbed PAA by atomic force microscopy (AFM) in aqueous condition revealed that COF increased with changes of surface morphology and roughness.

Wafer removal rates and defects were investigated for 200 mm tetraethyl orthosilicate (TEOS) oxide chemical mechanical planarization (CMP) processes using two types of CMP pads: a porous pad and a solid pad with micro-holes. An initial CMP test conducted with fumed silica based-slurry and a conditioner with 180 μm diamond revealed that the wafer removal rates by the solid pad with micro-holes were approximately 10% lower than those by the porous pad, but scratch type defects were reduced. In order to increase the removal rate of a solid pad with micro-holes to the comparable level of a regular porous pad without changing process parameters, it was decided to modify conditioner design by using different diamond size from 70 to 130 μm. It was found that wafer removal rates increased from 2973 to 2587 A/min and defect counts reduced from 5.3 to 1.7 by decreasing the diamond size from 180 to 70 μm in the case of the solid pad with micro-holes. Various pad surface analysis results, including contact area estimation and microscopic observations, also revealed that a smaller diamond conditioner generated the pad texture with finer and more regular pad asperities.

The step height reduction mechanism of chemical mechanical planarization (CMP) was studied to increase the removal rate of ceria (CeO2) abrasive, which is based on slurry application to high aspect ratio patterns. Four kinds of nano-abrasives at 0.5 wt% abrasive concentration were prepared, including jet-milled ceria, ball-milled ceria, silica, and colloidal silica. Three kinds of ceria and four kinds of colloidal silica were used to evaluate the removal effect with respect to nano-particle size. The step height reduction was investigated with the edge of a rectangular pattern and the top area of a saw tooth pattern. We found that the removal shapes of the rectangular and saw tooth patterns depended on the nano-particle shapes and sizes. In particular, the spherical abrasive was effective at edge removal in both ceria and silica abrasives, while the smaller abrasive sizes showed good rectangular edge pattern removal after relatively short polishing times. These results can be explained by different friction mechanisms, e.g. rolling and sliding frictions. We conclude that a spherically shaped and small-sized ceria abrasive is effective at increasing the ceria removal rate in high aspect ratio patterns.

Temperature control to stabilize the microscale contact surface between the pad and wafer, especially to prevent pad surface degradation, plays an important role in chemical mechanical polishing (CMP) processing of sub- 50-nm devices. In this work, we investigated the phenomenon of pad surface hardening for various process temperatures and developed an effective method to minimize changes of the mechanical properties of the pad surface using diamond conditioner. The pad hardening characteristics were measured based on the force–distance (F-D) curve obtained by atomic force microscopy (AFM), and thermogravimetric analysis (TGA). F-D curve data showed that the increase of the elastic modulus with pad usage time at high process temperature was ~1.5 times higher than at low process temperature. Also, TGA of a used polishing pad revealed a link between the endothermic peak intensity at 600°C and pad surface hardening. To prevent surface glazing or hardening throughout the lifetime of a pad at high process temperature, the optimum diamond size was investigated. Pad wear was investigated for various diamond conditioners with diamond grit size ranging from 100 μm to 270 μm. The results of pad surface analysis using scanning electron microscopy (SEM) and three-dimensional optical profiling showed that the 210 μm grit size was best for removing deformed layers, with the pad surface remaining consistent during the lifetime of the pad as verified by TGA and the F-D curve. The results of pad surface analysis are important for the design of conditioners that can produce pads with stable dynamic mechanical properties and prolonged lifetime at high process temperature.

The fundamental tribological characteristics of 1H,1H,2H,2H-perfluorodecyltrichlorosilane (FDTS), octadecyltrichlorosilane (OTS), and single chain alkanethiol self-assembled monolayers (SAMs) with various chain lengths were investigated in order to identify the mechanical scribing condition for micro-machining applications. The concept of the novel surface micro-machining explored in this work is to mechanical scribe away the SAM resist coated on the workpiece surface where, pattern formation by subsequent chemical etching is desired. From the experimental results, it was found that the FDTS surface was damaged about 20% more rapidly than the OTS surface due to higher friction, even though the surface energy of FDTS was lower than that of OTS. Also, it was found that thiol on a copper surface could be removed even under a few nN normal load. The nano-tribological characteristics of alkanethiol SAM on various metals were largely dependent on the native oxide layer of metals. Based on these findings, FDTS and 1-hexadecanethiol (HDT) were chosen as the resists for silicon and metal surfaces, respectively. By using the mechano-chemical process with a diamond-coated tip, nano-patterns with sub-micrometer width and depth on surfaces of Au, Ag, Cu and Si could be fabricated.

Poly silicon is the preferred gate material in terms of fabrication process in the fab, and gate height control is one of the factors determining transistor performance. If we can have a better uniformity control of poly CMP, it will be beneficial not only to CMP but also to the downstream etch process. Thus, we evaluated two poly slurries (Slurry A, B), analyzed each characteristic and performance on the device area and applied to 7nm CMP process furthermore. We found that slurry A, ceria-based poly slurry, has excellent WiD uniformity, less than 2nm, and good end-point (motor torque) detection point which is good in terms of manufacturing perspective. However, shelf life is a big challenge that we loss the selectivity of nitride and oxide after 15 days and also found visible white precipitate in the slurry loop. We did the shelf life test for both the additive only and the slurry. Data shows that the removal rate, pH and particle size of the additive only did not change a lot; however, the slurry became more unstable after 11 days with the increasing of the nitride loss, ten times the baseline. Chemical reaction happened between the abrasive and the additive. We can avoid the slurry deterioration by using the in-line mixing instead of pre-mixing. Table 2 shows the center die uniformity of slurry A is 1.9nm, much less than our target, 5nm. We also measured the CMP house pad topography for the slurry marginality test. Slurry A also has the better capability to stop on nitride, however, slurry B, the silica based slurry, has no removal rate at donut and center area. It can be caused by the slurry distribution on the pad or the high additive concentration. We will have a completed analysis of the ratio of slurry B and additive analysis and also dig more deeply about how slurry react with additive and what factor would be the major driving force of poly process in the full paper. Figure 1

Scratches are the most common defect in typical CMP (Chemical Mechanical Planarization) Processing. Since the micro and macro scratches during CMP processing directly affect the yield and reliability in IC devices, many fields of engineers and researchers have tried to eliminate these troublesome scratches. Numerous root causes and methods were discussed and introduced to at this site, but still scratches are the top on the defect list in overall integration failure analysis. The most important thing is to understand 2-body and 3-body contact phenomena in each different polishing process. And control of irregular and instantaneous stress concentration on specific wafer areas are key points to minimize the scratch defects. It's difficult to catch the tribological phenomena in real polishing, it could be estimated based on consumable analysis like simplifiing experimental tools and analysis results of used consumables. It was found that each consumable, such as pad, disk and slurry, should be changed and redesigned based on the full understanding of CMP polisher configuration. In this talk, several fundamental study and effective ways for reducing scrathes will be introduced and discussed.

The surface Cu flake particle generation mechanism during Cu Chemical Mechanical Planarization (CMP) process was studied to propose optimal tribological conditions. Cu flake defects are the main impact on yield and reliability in Logic Devices. Fig.1 shows typical Cu Flake images and their components. The particle components are copper and copper oxide based on EDX analysis with Cu flake sizes ranging from a hundred nm to a few um. Engineering polishing wafers with five kinds of pattern densities and three different line widths were prepared to evaluate defect density changes and elucidate the effects of surface topography and geometry. All polishing experiments were performed on a 300 mm polisher (LKPS, AMAT) with Hitachi Cu Barrier Slurry (HS-915TS). Defect density changes were calculated by two steps: 1) scanned with KLA-Tencor 2915 Bright Field Inspection Tool, 2) reviewed by Applied-Materials SEMVision with 30 nm horizontal resolution. Determining the defect generation mechanism was approached by three different methodologies. Firstly, wafer friction torque was analyzed to estimate the mechanical impact dependency of defect generation during the brushing part of the cleaning process with these different patterns. Usually, friction torque is a well-known method to check the macro-scale impact in the defect investigation process. However, there were no correlation between torque difference and defect density. It is assumed that the wafer level friction sensor could not detect the patterning pitch scale’s impact difference. Secondly, a nano-scale approaching method was utilized to investigate the Cu flake phenomena. Interestingly, the highest defect density showed in the smallest patterned density and in the 72 nm line width by repeatable tests. What it found was that the Cu protrusion amount, as shown in Fig.2, linearly decreases with pattern density, with 3 nm range of difference between the minimum and maximum pattern density. It could be suspected that a higher Cu protrusion profile may be one of the big distributors in making more mechanical impaction in sub 100 nm pitch scales. To verify protrusion volume effects, the slurry selectivity was changed to encourage more protrusion by changing the H2O2 mixing ratio. Experimental results showed that higher H2O2 resulted in a lower defect density. Lastly, the sliding velocity effect was studied with three different conditions: 1.0, 1.2, and 1.35 m/s. Fig.3 clearly showed the density effect of flake generation with each patterning wafer. In particular, a higher pattern density did not show defect density changes during the sliding speed tests, while a lower density pattern had increasing defects with higher sliding speeds. These results can explain the Cu flake generation mechanism by mechanical impact force, e.g. higher velocity speed and higher shear force during wafer cleaning process. We conclude that lower speed and less pattern selectivity is preferable to reduce the Cu flake defect level to overcome various pattern densities in the real production. We will explain in detail the experimental results and mechanism in the presentation. Figure 1

Although Chemical Mechanical Planarization (CMP) process is a still promising technology for the fabrication of the next generation devices, CMP-induced defects tackle further development of CMP process. In particular, even nano-sized scratches generated by CMP process kill the device directly. However mechanism of scratch formation was not clearly understood yet. CMP-induced scratches are classified as razor, chatter mark and skipping scratch. Among them, chatter mark scratch (or chatter scratch) is the most critical defect for the device yield loss. Chatter scratch has a periodic pattern of scars, which is reminiscent of a stick-slip friction pattern. Based on that similarity, stick-slip model was proposed in this paper in order to explain how chatter scratch is formed. And controlling parameters for chatter scratch are defined. During stick period the friction force that exceeds the yield strength of wafer surface makes chatter scratch and the distance between chatter marks is determined by slip period.

In this paper, the optimization of the chemical mechanical planarization (CMP) pad design is investigated to reduce defect generation during the CMP process. Recently, obtaining the optimum performance from the viewpoint of scratch generation has become the most challenging area in the CMP process. To achieve uniform performance of the process at the defect level, the surface texture and/or groove of the CMP pads should be designed effectively, and their original surface should be maintained throughout their lifetime. Because the transport of slurry and wear debris, which is the source of CMP scratches, is highly dependent on the surface geometry of the CMP pad, maintaining suitable process conditions is considered the most important design factor. In this work, the surface geometries of two CMP pads with different body structures are modified by a laser-induced micro hole; one is a porous-type pad and the other is a nonporous type. Based on the experimental and numerical simulation results, the micro-hole induced pads had a lower defect level than the conventional porous pads without holes because the micro holes acted as a defect source or coarse particle reservoir to prevent micro scratch during the process. In addition, the micro holes of the porous pad showed a lower defect generation than the holes of the nonporous pad as the process time increased.

In this study, the abrasive size distribution of ceria-based slurry below wafer and its effect on in-wafer uniformity were examined. Based on our observation, the abrasive size varies depending on the location on the wafer. Hence process parameters such as pad surface morphology and slurry viscosity were thoroughly investigated to observe their effect on the distribution on the wafer surface. It was found that the small size particles were considerably reduced near the center location of the wafer surface during the pad lifetime with reduced slurry viscosity and high polishing pressure. Hence, the contact conditions and the characteristic of fluid should be simultaneously considered in order to obtain the stable in-wafer uniformity.

In this study, the monodisperse abrasive deposition (MDAD) system was developed to investigate the polishing mechanism of ceria abrasives for the chemical mechanical planarization of a wafer. Using the MDAD system, groups of ceria particles with a specific size were collected from slurry with various particle size distributions, and each group was deposited on a blanket silicon wafer to study the size effect of the ceria particle on polishing results. The effects of the ceria particle size on surface roughness, contact area ratio, and subsurface damages on the surface and subsurface crystallographic structure were investigated using atomic force microscopy, transmission electron microscopy, and a surface inspection system. A similar set of experiments was performed with types of ceria abrasive particles with the same diameter but different morphologies to investigate the effect of the ceria abrasive geometry on polishing results. In addition, the effect of the ceria particle size on the pattern loading was investigated by polishing the shallow trench isolation and high aspect ratio patterned wafers.

This article introduces an abrasive particle size measurement by a scanning mobility particle sizer (SMPS) to measure precise size distribution in the nanoregime. Static light scattering (SLS), which is a conventional method, is compared with the SMPS-based technique. Both measurement techniques differ in the measurement of SiO 2 and CeO 2 abrasive particle sizes. Results showed that SMPS is more sensitive than the SLS equipment due to a single-particle count, which is suitable for representing nanoparticle abrasives. To the best of our knowledge, there has been no article yet about the use of an SMPS for the measurement of abrasive size in chemical mechanical planarization (CMP) technology.