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The production of textiles has undergone a considerable transformation, progressing from its primitive origins in hand-weaving to the implementation of contemporary automated systems. Weaving yarn into fabric is a crucial process in the textile industry that requires meticulous attention to output quality products, particularly in the tension control section. The efficiency of the tension controller in relation to the yarn tension significantly affects the quality of the resulting fabric, as proper tension control leads to strong, uniform, and aesthetically pleasing fabric, while poor tension control can cause defects and yarn breakage, leading to production downtime and increased costs. Maintaining the desired yarn tension during textile production is crucial, although it poses several problems, such as the continuous diameter change of the unwinder and rewinder sections leading to system change. Another problem faced by the industrial operation is maintaining proper tension on the yarn while changing the roll-to-roll operation velocity. In this paper, an optimized method for controlling yarn tension through the cascade control of tension and position, incorporating feedback controllers, feedforward, and disturbance observers, has been proposed to make the system more robust and suitable for industrial use. In addition, an optimum signal processor has been designed to obtain sensor data with reduced noise and minimal phase difference. [ABSTRACT FROM AUTHOR]

A CMOS amplifier employing the frequency selective feedback technique using a shunt feedback capacitor is designed and measured. The proposed amplifier can achieve a high IIP3 (input referred third-order intercept point) by reducing the third- and second-order nonlinearity contributions to the IMD3 (third-order intermodulation distortion), which is accomplished using a capacitor as the frequency selective element. Also, the shunt feedback capacitor improves the noise performance of the amplifier. By applying the technique to a cascode LNA using 0.18-µm CMOS technology, we obtain the NF of 0.7 dB, an IIP3 of +8.2 dBm, and a gain of 15.1 dB at 14.4 mW of power consumption at 900 MHz. Copyright © 2015 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

A capacitance desensitization technique is proposed for a multiple gated transistors amplifier with source degeneration to relax second-order distortion contribution to a third-order intermodulation distortion (IMD3), as well as an induced-gate noise contribution to noise figure. An extra capacitance, which is added between gate and source nodes of input transistors in a parallel manner, can desensitize the contribution of second-order harmonic feedback to IMD3. The capacitance is useful for optimizing noise figure, as well by controlling the input matching network quality factor (Q), which can desensitize the induced-gate noise contribution to noise figure. The low-noise amplifier is implemented with the proposed technique using 1P6M 0.18-\mum CMOS technology for 900-MHz code division multiple access (CDMA) receivers. It shows a third-order intercept point of +9.4 dBm and noise figure of 1.8 dB while consuming 5.5 mW at 1.5 V. [ABSTRACT FROM PUBLISHER]

This letter presents a gm^\prime\prime-cancellation range extension method with bulk-bias control that was applied to a Multiple Gated Transistors (MGTR) technique, which is a linearity enhancement technique for RF amplifiers. Instead of adjusting the gate-biasing voltage of the auxiliary transistor (AT) (Vshift) in conventional gm^\prime\prime-cancellation, we propose to use the bulk-biasing voltage, VBS, which allows for range extension of the gm^\prime\prime-cancellation of AT. The proposed technique does not require any other additional biasing circuits and has the benefit of consuming less power. The proposed low noise amplifier (LNA) is implemented in 0.18 \mum 1-poly-6-metal CMOS technology. Our results show that the LNA achieves a noise figure of 1.76 dB, a +12.45 dBm input third order intercept point (IIP3), and a 15 dB power gain at 0.9 GHz, with the core LNA consuming 4.5 mA from a 1.5 V power supply. [ABSTRACT FROM PUBLISHER]