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In order to solve the problem of frequent body and buffer layer discharge ablation of Corrugated Aluminum Sheath XLPE cable in China, in this paper, the discharging principle and influencing factors caused by corrugated aluminum sheathed cables are analyzed, and a smooth aluminum sheathed cable design scheme to slow down the discharge ablation phenomenon is proposed. Furthermore, the production process of smooth aluminum sheath high voltage cable is deeply studied, and the integrated new process production line is designed. The nano-mold drawing process of the aluminum sheath (Compact Wheel Diameter Reduction), the multi-layer co-extrusion process of the anti-corrosion layer (Hot Melt Adhesive), the outer sheath and the conductive layer are developed, the buffer layer structure is optimized, and a number of technologies such as wire cloth are added. Finally, the application and technical effect of the smooth aluminum sheath are analyzed, which provides a reference for the production and practical engineering application of the smooth aluminum sheath technology.

Ultrasonic water meters have current widespread problems of poor site adaptability, low measurement accuracy, and poor stability. A high-precision intelligent ultrasonic water meter with self-diagnosis function and adaptive technology was proposed in this paper, which is focus on improving the measurement accuracy and repeatability of the small pipe diameters. The hardware circuit design of the ultrasonic water meter studied in this paper adopts the low-power STM32L053 microcontroller with Cortex-M0 core architecture and the high-precision 11 ps time resolution timing chip TDC-GP30 to complete the metering function. The software combines pulse width ratio and amplitude voltage measurement technology to make the water meter have self-diagnosis function, avoid measurement errors caused by accidental factors, improve adaptability and measurement accuracy, also the application of adaptive measurement period method is used to improve measurement repeatability. The software adopts the moving average filtering algorithm, which effectively reduces the fluctuation of the time-of-flight(ToF) difference and improve the measurement accuracy of the flow point in the low zone (between the minimum flow and the boundary flow). The experimental verification results show that the accuracy of the small-caliber ultrasonic water meter can reach within ±1.5 %, and the repeatability is less than 0.5 %. In the face of fluid disturbances, adaptive technology is used in this water meter to adjust the measurement period and carry out self-diagnostic function research, and automatically respond to deal with abnormal faults, thereby realizing the demand for intelligence.

The compressibility factor is an essential parameter for natural gas exploitation and processing. The method based on the equation of state (EoS) represents the most popular method for compressibility factor calculations. In this paper, the accuracy of compressibility factor calculations for two traditional cubic-EoSs (Soave-Redlich-Kwong (SRK) EoS, the Peng–Robinson(PR) EoS), the Benedict–Webb–Rubin-Starling (BWRs) EoS, and the Cubic-Plus-Association (CPA) EoS are evaluated based on experimental data for high-pressure H2S-containing natural gases. A total of 234 sets of experimental compressibility factors are applied to validate the above four EoSs, which cover pressures from 70MPa to 131MPa. Results show that for the high-pressure and low H2S content natural gas (35MPa≤P

In this work, degradations of dynamic characteristics for silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors under repetitive avalanche shocks are investigated in details. With the help of Silvaco TCAD simulations, gate capacitance versus gate voltage ( Cg – Vg ) measurement, and three-terminal charge pumping test, the main damaged position is demonstrated to be the SiC/SiO2 interface along junction FET (JFET) region instead of the body diode where most of the avalanche current passes through. Dominant avalanche degradation mechanism is then confirmed to be the injection of holes into the gate oxide above the JFET region. Since the channel region and the main junction of body diode are not seriously damaged by the avalanche stress, static parameters all remain stable. Meanwhile, due to the injection of holes, the depletion layer beneath the JFET region gets thinner, resulting in the increase of gate-drain capacitance ( C gd) under low drain-source voltage ( V ds) bias condition. It further takes responsibilities for the increments in input capacitance ( Ciss ), output capacitance ( Coss ), and reverse transfer capacitance ( Crss ). Moreover, it results in the extension of Miller plateau. Therefore, the increase of gate charge and delay of turn- off time after being stressed by repetitive avalanche shocks are monitored. Moreover, turn- on and turn- off dissipated energies after different unclamped-inductive-switching stress cycles are extracted. They are rarely influenced by the stress for the overlapping areas of voltage and current during switching procedures are relatively stable.

The degradations of electrical parameters for double-trench silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) under repetitive avalanche stress are investigated in this paper. The injection of hot holes into the bottom oxide of the gate trench during avalanche process is demonstrated to be the dominant degradation mechanism, while the channel is rarely influenced by the stress. The injected holes attract extra electrons in the SiC layer along the SiC/SiO2 interface, decreasing the ON-state drain–source resistance ( ${R}_{{dson}}$ ). Due to this reason, the threshold voltage ( ${V}_{{th}}$ ) of the device also reduces slightly. Moreover, other than static electrical parameters, dynamic characteristics including the gate–drain capacitance ( ${C}_{{gd}}$ ) and the switching characteristics of the device also degrade. After being stressed by repetitive avalanche stress, the depletion region beneath the bottom of the gate trench gets thinner, leading to the increase in ${C}_{{gd}}$ , which further influences the switching behaviors. The turn- ON and turn- OFF switching times of the device are calculated. It illustrates that the repetitive avalanche stress results in an obvious delay in the turn- OFF procedure, but hardly influences the turn- ON behaviors of the double-trench SiC MOSFET.

The degradations of electrical parameters for silicon carbide power MOSFETs under repetitive short-circuit (SC) stress are investigated in detail in this paper. It demonstrates that the generation of negative charges along the gate–oxide interface of the channel region is the dominant degradation mechanism, which results in the increase in the threshold voltage ( ${V}_{\text {th}}$ ) and the rise of ON-state resistance ( ${R}_{\text {dson}}$ ) under low gate voltage bias condition. Furthermore, degradations of dynamic characteristics including gate charge ( ${Q}_{\text {g}}$ ) and switching behaviors of the device after the repetitive SC stress are extracted and analyzed for the first time. It illustrates that the increased ${V}_{\text {th}}$ contributes to the rise of the Miller plateau voltage ( ${V}_{\text {gp}}$ ), which further leads to the increase in gate–source charge ( ${Q}_{\text {gs}}$ ). Meanwhile, the increase in the turn-ON time and the reduction of turn-OFF time are observed, which are also resulted from the positive shifts of ${V}_{\text {th}}$ and ${V}_{\text {gp}}$ , leading to the rise of turn-ON switching energy ( ${E}_{{ \text {on}}}$ ) and the decline of turn-OFF switching energy ( ${E}_{\text {off}}$ ), respectively.

An improved novel extraction method which can characterize the injected charges along the gate oxide interface for silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) is proposed. According to the different interface situations of the channel region and the junction FET (JFET) region, the gate capacitance versus gate voltage (Cg-Vg) curve of the device can be divided into three relatively independent parts, through which the locations and the types of the charges injected in to the oxide above the interface can be distinguished. Moreover, the densities of these charges can also be calculated by the amplitudes of the shifts in the Cg-Vg curve. The correctness of this method is proved by TCAD simulations. Moreover, experiments on devices stressed by unclamped-inductive-switching (UIS) stress and negative bias temperature stress (NBTS) are performed to verify the validity of this method.

Symmetric continuously tunable three-dimensional (3D) liquid photonic crystals have been investigated using self-organized blue-phase liquid crystal films. The photonic band gap in the overall visible spectrum can be tuned continuously, reversibly, and rapidly as the applied electric field changes. After driven by the applied field, four-time enhancement of the reflectivity results in more vivid reflection colors. A lasing emission of tuning working wavelength has been demonstrated by using the dye-doped blue-phase liquid crystal film. With the advantages of fast response speed, no alignment layer, large-scale electrically shift of the photonic band gap, and macro optical isotropy, this self-assembled soft material has many potential applications in high-performance reflective full-color display, 3D tunable lasers, and nonlinear optics.

In this paper, the degradation mechanism of silicon carbide (SiC) power metal-oxide-semiconductor field-effect transistors (MOSFETs) under long-term short-circuit (SC) stress is investigated. With the help of Silvaco TCAD simulations and measurements on degraded parameters, the injection of electrons into gate oxide above channel region of the device is demonstrated to be the dominant degradation mechanism. It results in the positive shift of threshold voltage (V th ) and the increase of on-state resistance (R dson ) under low gate voltage bias condition. Simulated electrical properties of the device with electrons trapped into gate oxide above channel region share similar degradation trend with measured ones, proving the correctness of our analysis. Furthermore, an improved device structure with an additional shallow inverted-doping p-well, which can effectively lower the impact ionization rate (I.I.) along the SiC/SiO 2 interface above channel region during SC process, is proposed to restrict the degradations under long-term SC stress.