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An intra-panel interface addressing all of the high-speed, low-power, and low-electromagnetic interference (EMI) requirements for tablet personal computer applications is presented. This work proposes an adaptive clock window scheme to achieve 1.4-Gbps data-rate. For EMI suppression, data scrambling, horizontal blank period pattern scrambling, and novel clock and data recovery circuit are introduced. Lastly, for power-saving, the proposed interface dynamically biases source driver's output buffers and employs early charge sharing by controlling the configuration data. For verification, a WQXGA thin-film transistor liquid crystal display system is implemented with the timing controller and source driver ICs that are fabricated using 65-nm and 180-nm complementary metal-oxide semiconductor (CMOS) processes, respectively. The liquid crystal display system demonstrates maximum operation speed of 1.4 Gbps and suppression of EMI noise in LTE Band-20 and GSM 850 bands. The proposed power-saving schemes achieve 4.3% reduction in total power consumption by source driver IC, which reaches about 85% of power consumption by enhanced reduced-voltage differential signaling interface circuit.

An enhanced reduced voltage differential signaling (eRVDS) intra-panel interface addressing both low-power and low-EMI requirements for tablet PC applications is presented. The proposed interface features a novel function called scrambled transition-minimized coding (STMC) to perform both data pattern randomization and toggle reduction. Additionally, automatic skew calibration (ASC) is proposed to further reduce dynamic power and EMI radiation in the eRVDS interface. For verification, a WQXGA (2560times1600) TFT-LCD system is implemented with the timing controller and source driver ICs that are fabricated using 65-nm and 180-nm CMOS processes, respectively. At the maximum operation speed of 1.8-Gbps, the display module adopting the eRVDS interface demonstrated 24.3% power saving and 6.2-dB suppression in EMI level.

This paper has reviewed several key features of intra-panel interfaces for high-resolution tablet personal computers to satisfy essential requirements such as high-speed operation, low power consumption, and low radio frequency interference (RFI). The clock-embedding scheme and the type of transmitter driver affect maximum data rate and minimum power consumption. Power saving can be achieved through physical layer implementation as well as protocol layer design by optimizing current consumption of column drivers. RFI from signal channels on PCB can be effectively suppressed by modified data scrambling scheme with low toggle ratio and pattern randomization. These techniques of intra-panel interfaces will realize future tablets with high display resolution.

The enhanced Reduced Voltage Differential Signaling eRVDS is a new intrapanel interface with clock embedded scheme for ChipOnGlass TFTLCD panel. The source driver IC with eRVDS interface operates at higher data rate up to 720Mbps, lower power consumption, and lower EMI and reduces signal line to one third compared to conventional pointtopoint COG interface.

— Reduced-voltage differential signaling (RVDS) is a novel interface for TFT-LCD panels with a chip-on-glass (COG) structure, which has a point-to-point topology and a voltage mode differential signaling scheme. The voltage-driving interface scheme has advantages in high-speed operation owing to its relatively small time constant for the resistive channel condition. And reduced-voltage signaling can reduce the power consumption of a transmitter. The display source driver IC with an RVDS interface, which is fabricated by using a 0.25-μm CMOS process with a 2.5-V logic supply voltage, offers a high data rate up to 500 Mbps, low-current consumption of 2.2 mA, and good EMI characteristics. Also, an RVDS interface has programmable options that control the bandwidth, system power, and EMI performance. Therefore, the RVDS interface is a competitive solution for low-power, low-cost, and slim notebook applications.

A characteristic analysis of an ultrasonic motor (USM) at the design stage has thus far been impossible. Therefore, a characteristic analysis method is suggested on the basis of a proposed model describing the complex nonlinear contact condition between the rotor and stator. The proposed contact model and analysis method can guide theoretical research on the minimization of the main disadvantages of the USM, which mainly result from the contact mechanism. The validity and usefulness of the suggested analysis method is verified by experimental data from a prototyped USM.

Reduced Voltage Differential Signaling (RVDS) is a new interface for TFT-LCD panel with Chip-On-Glass (COG) structure which has point-to-point topology and voltage mode differential signaling scheme. The display source driver IC with RVDS interface performs higher data rate up to 500Mbps, lower current consumption of 2.2mA, and lower EMI compared with conventional current mode interface.

A 720-channel LCD source driver with a 12-bit segmented R-C DAC has been designed and fabricated by a 16V CMOS process. The proposed DAC consists of a conventional resistor string and a sample-and-hold buffer. DNL less than 0.3LSB and output voltage deviations less than 3mV were measured. Die area is 24.9mm2.