789 results on '"Kaczer, B."'
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2. Impact of work function metal stacks on the performance and reliability of multi-Vth RMG CMOS technology
3. Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K
4. Process implications on the stability and reliability of 300 mm FAB MoS2 field-effect transistors
5. Characterization and Advanced Modeling of Dielectric Defects in Low-Thermal Budget RMG MOSFETs Using 1/f Noise Analysis
6. Exploring manufacturability of novel 2D channel materials: 300 mm wafer-scale 2D NMOS & PMOS using MoS2, WS2, & WSe2
7. Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions
8. The impact of self-heating and its implications on hot-carrier degradation – A modeling study
9. Degradation Mapping and Impact of Device Dimension on IGZO TFTs BTI
10. Dangling bond defects in silicon-passivated strained-Si1−xGex channel layers
11. Process implications on the stability and reliability of 300 mm FAB MoS2 field-effect transistors.
12. Variability in Planar FeFETs—Channel Percolation Impact
13. Comphy — A compact-physics framework for unified modeling of BTI
14. A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability
15. Modeling Analysis of BTI-driven degradation of a Ring Oscillator Designed in a 28-nm CMOS Technology
16. Impact of the Device Geometric Parameters on Hot-Carrier Degradation in FinFETs
17. Analysis of the Features of Hot-Carrier Degradation in FinFETs
18. A Comprehensive Cryogenic CMOS Variability and Reliability Assessment using Transistor Arrays
19. On The Contribution of Secondary Holes in Hot-Carrier Degradation – a Compact Physics Modeling Perspective
20. Reliability challenges in Forksheet Devices: (Invited Paper)
21. Using dedicated device arrays for the characterization of TDDB in a scaled HK/MG technology
22. The Role of Mobility Degradation in the BTI-Induced RO Aging in a 28-nm Bulk CMOS Technology: (Student paper)
23. Analysis of TDDB lifetime projection in low thermal budget HfO2/SiO2 stacks for sequential 3D integrations
24. Impact of gate stack processing on the hysteresis of 300 mm integrated WS2 FETs
25. Unveiling the Vulnerability of Oxide-Breakdown-Based PUF
26. The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits
27. Recent Trends in Bias Temperature Instability
28. Towards Complete Recovery of Circuit Degradation by Annealing With On-Chip Heaters
29. Trapping of Hot Carriers in the Forksheet FET Wall: A TCAD Study
30. A HydroDynamic Model for Trap-Assisted Tunneling Conduction in Ovonic Devices
31. Characterizing and Modelling of the BTI Reliability in IGZO-TFT using Light-assisted I-V Spectroscopy
32. Low thermal budget PBTI and NBTI reliability solutions for multi-Vth CMOS RMG stacks based on atomic oxygen and hydrogen treatments
33. New insights on the excess 1/f noise at cryogenic temperatures in 28 nm CMOS and Ge MOSFETs for quantum computing applications
34. Characterization of Individual Traps in High-κ Oxides
35. Statistical Distribution of Defect Parameters
36. Understanding the EOT–Jg degradation in Ru/SrTiOx/Ru metal–insulator–metal capacitors formed with Ru atomic layer deposition
37. SrTiOx for sub-20 nm DRAM technology nodes—Characterization and modeling
38. A Defect-Centric perspective on channel hot carrier variability in nMOSFETs
39. Modeling Analysis of BTI-Driven Degradation of a Ring Oscillator Designed in a 28-nm CMOS Technology
40. Degradation mapping of IGZO TFTs
41. Assessment of Transistor Aging Models in a 28nm CMOS Technology at a Wide Range of Stress Conditions
42. First principles investigation of charge transition levels in monoclinic, orthorhombic, tetragonal, and cubic crystallographic phases of HfO2.
43. Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs
44. Dedicated ICs for the Characterization of Variability and Aging Studies and their Use in Lightweight Security Applications : Invited paper
45. Analysis of BTI in 300 mm integrated dual-gate WS2 FETs
46. Insight to Data Retention loss in ferroelectric Hf0.5Zr0.5O2 pFET and nFET from simultaneous PV and IV measurements
47. Germanium Deep-Submicron p-FET and n-FET Devices, Fabricated on Germanium-On-Insulator Substrates
48. Gate current random telegraph noise and single defect conduction
49. Analytical model for anomalous Positive Bias Temperature Instability in La-based HfO2 nFETs based on independent characterization of charging components
50. Towards understanding hole traps and NBTI of Ge/GeO2/Al2O3 structure
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